A9.8-30.1GHzCMOSlow-noise amplifier with a 3.2-dB noise figure using inductor-and transformer-based gm-boosting techniques

A 9.8–30.1 GHz CMOS low-noise amplifier(LNA)with a 3.2-dB minimum noise figure(NF)is presented.At the architecture level,a topology based on common-gate(CG)cascading with a common-source(CS)amplifier is proposed for simultaneous wideband input matching and relatively high gain.At the circuit level,multiple techniques are proposed to improve LNA performance.First,in the CG stage,loading effect is properly used instead of the conventional feedback technique,to enable simultaneous impedance and noise matching.Second,based on in-depth theoretical analysis,the inductor-and transformer-based gm-boosting techniques are employed for the CG and CS stages,respectively,to enhance the gain and reduce power consumption.Third,the floating-body method,which was originally proposed to lower NF in CS amplifiers,is adopted in the CG stage to further reduce NF.Fabricated in a 65-nm CMOS technology,the LNA chip occupies an area of only 0.2 mm^(2)and measures a maximum power gain of 10.9 dB with−3 dB bandwidth from 9.8 to 30.1 GHz.The NF exhibits a minimum value of 3.2 dB at 15 GHz and is below 5.7 dB across the entire bandwidth.The LNA consumes 15.6 mW from a 1.2-V supply.

Novel pre-equalization transimpedance amplifier for 10 Gb/s optical interconnects

This paper presents a modified regulated cascode （RGC） transimpedance amplifier （TIA） with a novel pre-equalized technique. The pre-equalized circuit employed the broadband series inductive Jr-network and Gin- boosting technique. The introduction of this technique compensates the transferred signal at the input port of the TIA without an increase in power dissipation. Furthermore, a novel miller capacitance degeneration method is designed in the gain stage for further bandwidth improvement. The TIA is realized in UMC 0.18 μm CMOS technology and tested with an on-chip 0.3 pF capacitor to emulate a photodetector （PD）. The measured transimpedance gain amounts to 57 dBf2 with a -3 dB bandwidth of about 8.2 GHz and consumes only 22 mW power from a single 1.8 V supply.

A new wideband LNA using a g_m-boosting technique

A new broadband low-noise amplifier （LNA） is proposed. The conventional common gate （CG） LNA exhibits a relatively high noise figure, so active gin-boosting technology is utilized to restrain the noise generated by the input transistors and reduce the noise figure. Theory, simulation and measurement are shown. An implemented prototype using 0.13 μm CMOS technology is evaluated using on-wafer probing. S11 and S22 are below -10 dB across 0.1-5 GHz. Measurements also show a gain of 18.3 dB with a 3 dB bandwidth from 100 MHz to 2.1 GHz and an ⅡP3 of-7 dBm at 2 GHz. The measured noise figure is better than 2.5 dB below 2.1 GHz, is better than 4.5 dB below 5 GHz, and at 500 MHz, it gets its minimum value 1.8 dB. The LNA consumes 9 mA from 1.5 V supply and occupies an area of 0.04 mm^2.