为了保证一定视频质量下编码器输出的码率符合给定的目标码率,提出一种考虑视频内容特性的H.265/HEVC帧层码率分配算法。首先从率失真理论分析的角度推导出影响输出码率的主要因素,然后根据视频编码原理,预测出帧内容复杂度参数,从而建...为了保证一定视频质量下编码器输出的码率符合给定的目标码率,提出一种考虑视频内容特性的H.265/HEVC帧层码率分配算法。首先从率失真理论分析的角度推导出影响输出码率的主要因素,然后根据视频编码原理,预测出帧内容复杂度参数,从而建立一种更有效的帧层码率分配算法。实验结果表明,所提算法可以使帧层目标码率与编码码率保持更好的一致性,且重构视频质量平均提高了0.103 d B。展开更多
In this paper, efficient one-dimensional (1-D) fast integer transform algorithms of the DCT matrix for the H.265 stan-dard is proposed. Based on the symmetric property of the integer transform matrix and the matrix op...In this paper, efficient one-dimensional (1-D) fast integer transform algorithms of the DCT matrix for the H.265 stan-dard is proposed. Based on the symmetric property of the integer transform matrix and the matrix operations, which denote the row/column permutations and the matrix decompositions, along with using the dyadic symmetry modification on the standard matrix, the efficient fast 1-D integer transform algorithms are developed. Therefore, the computational complexities of the proposed fast integer transform are smaller than those of the direct method. In addition to computational complexity reduction one of the proposed algorithms provides transformation quality improvement, while the other provides more computational complexity reduction while maintaining almost the same transformation quality. With lower complexity and better transformation quality, the first proposed fast algorithm is suitable to accelerate the quality-demanding video coding computations. On the other hand, with the significant lower complexity, the second proposed fast algorithm is suitable to accelerate the video coding computations.展开更多
Fractional motion estimation(FME) improves the video encoding efficiency significantly. However, its high computational complexity limits the real-time processing capability. Therefore, it is a key problem to reduce t...Fractional motion estimation(FME) improves the video encoding efficiency significantly. However, its high computational complexity limits the real-time processing capability. Therefore, it is a key problem to reduce the implementation complexity of FME, especially in hardware design. This paper presents a novel deeply pipelined interpolation architecture of FME for the real-time realization of H.265/HEVC full Ultra-HD video encoder. First, a pipelined interpolation architecture together with an elegant processing order is proposed to deal with different search positions in parallel without pipeline stall and data conflict. Second, interpolation results sharing strategies are exploited among search positions to reduce the memory cost. Finally, the structure of the interpolation filter is further optimized for an area efficient implementation. As a result, the proposed design costs 41 917 slice LUTs on the Xilinx Kintex-7 FPGA platform with a 308 MHz working frequency. The measured throughput reaches a record of 1.238 Gpixels/s, which is sufficient for the real-time encoding of 8192×4320@ 30 fps video.展开更多
文摘为了保证一定视频质量下编码器输出的码率符合给定的目标码率,提出一种考虑视频内容特性的H.265/HEVC帧层码率分配算法。首先从率失真理论分析的角度推导出影响输出码率的主要因素,然后根据视频编码原理,预测出帧内容复杂度参数,从而建立一种更有效的帧层码率分配算法。实验结果表明,所提算法可以使帧层目标码率与编码码率保持更好的一致性,且重构视频质量平均提高了0.103 d B。
文摘In this paper, efficient one-dimensional (1-D) fast integer transform algorithms of the DCT matrix for the H.265 stan-dard is proposed. Based on the symmetric property of the integer transform matrix and the matrix operations, which denote the row/column permutations and the matrix decompositions, along with using the dyadic symmetry modification on the standard matrix, the efficient fast 1-D integer transform algorithms are developed. Therefore, the computational complexities of the proposed fast integer transform are smaller than those of the direct method. In addition to computational complexity reduction one of the proposed algorithms provides transformation quality improvement, while the other provides more computational complexity reduction while maintaining almost the same transformation quality. With lower complexity and better transformation quality, the first proposed fast algorithm is suitable to accelerate the quality-demanding video coding computations. On the other hand, with the significant lower complexity, the second proposed fast algorithm is suitable to accelerate the video coding computations.
基金Supported by the Zhejiang Provincial Natural Science Foundation of China(No.LQ15F010001,LY16F020029)the General Research Project of Zhejiang Provincial Education Department(No.Y201430479)
文摘Fractional motion estimation(FME) improves the video encoding efficiency significantly. However, its high computational complexity limits the real-time processing capability. Therefore, it is a key problem to reduce the implementation complexity of FME, especially in hardware design. This paper presents a novel deeply pipelined interpolation architecture of FME for the real-time realization of H.265/HEVC full Ultra-HD video encoder. First, a pipelined interpolation architecture together with an elegant processing order is proposed to deal with different search positions in parallel without pipeline stall and data conflict. Second, interpolation results sharing strategies are exploited among search positions to reduce the memory cost. Finally, the structure of the interpolation filter is further optimized for an area efficient implementation. As a result, the proposed design costs 41 917 slice LUTs on the Xilinx Kintex-7 FPGA platform with a 308 MHz working frequency. The measured throughput reaches a record of 1.238 Gpixels/s, which is sufficient for the real-time encoding of 8192×4320@ 30 fps video.
