This investigation deals with the intelligent system for parallel fault-tolerant diagnostic tests construction. A modified parallel algorithm for fault-tolerant diagnostic tests construction is proposed. The algorithm...This investigation deals with the intelligent system for parallel fault-tolerant diagnostic tests construction. A modified parallel algorithm for fault-tolerant diagnostic tests construction is proposed. The algorithm is allowed to optimize processing time on tests construction. A matrix model of data and knowledge representation, as well as various kinds of regularities in data and knowledge are presented. Applied intelligent system for diagnostic of mental health of population which is developed with the use of intelligent system for parallel fault-tolerant DTs construction is suggested.展开更多
Complex dynamical phenomenon was studied in the single phase H-bridge inverter which was controlled by either a peak current or a valley current. The state functions and the discrete iterative map equations were estab...Complex dynamical phenomenon was studied in the single phase H-bridge inverter which was controlled by either a peak current or a valley current. The state functions and the discrete iterative map equations were established to analyze the dynamical phenomenon in the single phase H-bridge inverter. The dynamical characteristics of the single phase H- bridge inverter, such as time domain waveform diagram, bifurcation diagram, and folding map, were obtained by using the numerical calculation when the circuit parameters varied in specific range. Moreover, the simulation results were obtained by using the OrCAD-PSpice software to validate the numerical calculation. Both the numerical calculation and the circuit simulation show that the symmetrical dynamical phenomenon occurs in the single phase H-bridge inverter controlled by the peak current or the valley current.展开更多
This paper describes an 8-bit 125 MHz low-power CMOS fully-folding analog-to-digital converter （ADC） A novel mixed-averaging distributed T/H circuit is proposed to improve the accuracy. Folding circuits are not only...This paper describes an 8-bit 125 MHz low-power CMOS fully-folding analog-to-digital converter （ADC） A novel mixed-averaging distributed T/H circuit is proposed to improve the accuracy. Folding circuits are not only used in the fine converter but also in the coarse one and in the bit synchronization block to reduce the number of comparators for low power. This ADC is implemented in 0.5μm CMOS technology and occupies a die area of 2 × 1.5 mm^2. The measured differential nonlinearity and integral nonlinearity are 0.6 LSB/-0.8 LSB and 0.9 LSB/-1.2 LSB, respectively. The ADC exhibits 44.3 dB of signal-to-noise plus distortion ratio and 53.5 dB of spurious-free dynamic range for 1 MHz input sine-wave. The power dissipation is 138 mW at a sampling rate of 125 MHz at a 5 V supply.展开更多
文摘This investigation deals with the intelligent system for parallel fault-tolerant diagnostic tests construction. A modified parallel algorithm for fault-tolerant diagnostic tests construction is proposed. The algorithm is allowed to optimize processing time on tests construction. A matrix model of data and knowledge representation, as well as various kinds of regularities in data and knowledge are presented. Applied intelligent system for diagnostic of mental health of population which is developed with the use of intelligent system for parallel fault-tolerant DTs construction is suggested.
基金Project supported by the National Natural Science Foundation of China(Grant No.51107016)the National Basic Research Program of China(Grant No.2013CB035605)the Postdoctoral Science Research Developmental Foundation of Heilongjiang Province,China(Grant No.LHB-Q12086)
文摘Complex dynamical phenomenon was studied in the single phase H-bridge inverter which was controlled by either a peak current or a valley current. The state functions and the discrete iterative map equations were established to analyze the dynamical phenomenon in the single phase H-bridge inverter. The dynamical characteristics of the single phase H- bridge inverter, such as time domain waveform diagram, bifurcation diagram, and folding map, were obtained by using the numerical calculation when the circuit parameters varied in specific range. Moreover, the simulation results were obtained by using the OrCAD-PSpice software to validate the numerical calculation. Both the numerical calculation and the circuit simulation show that the symmetrical dynamical phenomenon occurs in the single phase H-bridge inverter controlled by the peak current or the valley current.
文摘This paper describes an 8-bit 125 MHz low-power CMOS fully-folding analog-to-digital converter （ADC） A novel mixed-averaging distributed T/H circuit is proposed to improve the accuracy. Folding circuits are not only used in the fine converter but also in the coarse one and in the bit synchronization block to reduce the number of comparators for low power. This ADC is implemented in 0.5μm CMOS technology and occupies a die area of 2 × 1.5 mm^2. The measured differential nonlinearity and integral nonlinearity are 0.6 LSB/-0.8 LSB and 0.9 LSB/-1.2 LSB, respectively. The ADC exhibits 44.3 dB of signal-to-noise plus distortion ratio and 53.5 dB of spurious-free dynamic range for 1 MHz input sine-wave. The power dissipation is 138 mW at a sampling rate of 125 MHz at a 5 V supply.
