H.264/MPEG-4 AVC standard appears highly competitive due to its high efficiency, flexibility and error resilience. In order to maintain universal multimedia access, statistical multiplexing, or adaptive video content ...H.264/MPEG-4 AVC standard appears highly competitive due to its high efficiency, flexibility and error resilience. In order to maintain universal multimedia access, statistical multiplexing, or adaptive video content delivery, etc., it induces an immense demand for converting a large volume of existing multimedia content from other formats into the H.264/AVC format and vice versa. In this work, we study the remultiplexing and resynchronization issue within system coding after transcoding, aiming to sustain the management and time information destroyed in transcoding and enable synchronized decoding of decoder buffers over a wide range of retrieval or receipt conditions. Given the common intention of multiplexing and synchronization mechanism in system coding of different standards, this paper takes the most widely used MPEG-2 transport stream (TS) as an example, and presents a software system and the key technologies to solve the time stamp mapping and relevant buffer management. The solution reuses previous information contained in the input streams to remultiplex and resynchronize the output information with the regulatory coding and composition structure. Experimental results showed that our solutions efficiently preserve the performance in multimedia presentation.展开更多
This paper proposes an efficient H.264/AVC entropy decoder.It requires no ROM/RAM fabrication process that decreases fabrication cost and increases operation speed.It was achieved by optimizing lookup tables and inter...This paper proposes an efficient H.264/AVC entropy decoder.It requires no ROM/RAM fabrication process that decreases fabrication cost and increases operation speed.It was achieved by optimizing lookup tables and internal buffers,which significantly improves area,speed,and power.The proposed entropy decoder does not exploit embedded processor for bitstream manipulation, which also improves area,speed,and power.Its gate counts and maximum operation frequency are 77515 gates and 175MHz in 0.18um fabrication process,respectively.The proposed entropy decoder needs 2303 cycles in average for one macroblock decoding.It can run at 28MHz to meet the real-time processing requirement for CIF format video decoding on mobile applications.展开更多
An adaptive pipelining scheme for H.264/AVC context-based adaptive binary arithmetic coding(CABAC) decoder for high definition(HD) applications is proposed to solve data hazard problems coming from the data dependenci...An adaptive pipelining scheme for H.264/AVC context-based adaptive binary arithmetic coding(CABAC) decoder for high definition(HD) applications is proposed to solve data hazard problems coming from the data dependencies in CABAC decoding process.An efficiency model of CABAC decoding pipeline is derived according to the analysis of a common pipeline.Based on that,several adaptive strategies are provided.The pipelining scheme with these strategies can be adaptive to different types of syntax elements(SEs) and the pipeline will not stall during decoding process when these strategies are adopted.In addition,the decoder proposed can fully support H.264/AVC high4:2:2 profile and the experimental results show that the efficiency of decoder is much higher than other architectures with one engine.Taking both performance and cost into consideration,our design makes a good tradeoff compared with other work and it is sufficient for HD real-time decoding.展开更多
Given the substantially increasing complexity of embedded systems, the use of relatively detailed clock cycle-accurate simulators for the design-space exploration is impractical in the early design stages. Raising the...Given the substantially increasing complexity of embedded systems, the use of relatively detailed clock cycle-accurate simulators for the design-space exploration is impractical in the early design stages. Raising the abstraction level is nowadays widely seen as a solution to bridge the gap between the increasing system complexity and the low design productivity. For this, several system-level design tools and methodologies have been introduced to efficiently explore the design space of heterogeneous signal processing systems. In this paper, we demonstrate the effectiveness and the flexibility of the Sesame/Artemis system-level modeling and simulation methodology for efficient peformance evaluation and rapid architectural exploration of the increasing complexity heterogeneous embedded media systems. For this purpose, we have selected a system level design of a very high complexity media application;a H.264/AVC (Advanced Video Codec) video encoder. The encoding performances will be evaluated using system-level simulations targeting multiple heterogeneous multiprocessors platforms.展开更多
To improve the coding performance of H.264/AVC, this paper proposes a rate control scheme composed of a novel flame complexity optimized selection and a quantization parameter (QP) value computation approach. First,...To improve the coding performance of H.264/AVC, this paper proposes a rate control scheme composed of a novel flame complexity optimized selection and a quantization parameter (QP) value computation approach. First, it extracts the frame coding complexity from two rate distortion models, and then introduces five statistic modes to estimate the frame coding complexity. An optimal mode is selected according to the coding efficiency. Finally the paper presents a novel QP calculation method for the H.264/AVC rate control. Experimental results show that the proposed algorithra outperforms the algorithm integrated in the 3M model in obtaining precise frame coding complexity, achieving robust buffer control and improving coding quality. And the improving visual quality is high up to 0.90dB for CIF sequences.展开更多
This paper presents a reversible data hiding(RDH)method,which is designed by combining histogram modification(HM)with run-level coding in H.264/advanced video coding(AVC).In this scheme,the run-level is changed for em...This paper presents a reversible data hiding(RDH)method,which is designed by combining histogram modification(HM)with run-level coding in H.264/advanced video coding(AVC).In this scheme,the run-level is changed for embedding data into H.264/AVC video sequences.In order to guarantee the reversibility of the proposed scheme,the last nonzero quantized discrete cosine transform(DCT)coefficients in embeddable 4×4 blocks are shifted by the technology of histogram modification.The proposed scheme is realized after quantization and before entropy coding of H.264/AVC compression standard.Therefore,the embedded information can be correctly extracted at the decoding side.Peak-signal-noise-to-ratio(PSNR)and Structure similarity index(SSIM),embedding payload and bit-rate variation are exploited to measure the performance of the proposed scheme.Experimental results have shown that the proposed scheme leads to less SSIM variation and bit-rate increase.展开更多
This paper presents a quantization skipping method for H. 264/AVC video coding standard. In order to reduce the conputational-cost of quantization process coming from integer discrete cosine transform of H. 264/AVC, a...This paper presents a quantization skipping method for H. 264/AVC video coding standard. In order to reduce the conputational-cost of quantization process coming from integer discrete cosine transform of H. 264/AVC, a quantization skipping condition is derived by the analysis of integer transform and quantization procedures. The expeerimental results show that the proposed algorithm has the capability to reduce the computional cost about 10% -2.5%.展开更多
In this paper, we propose a new method for very low bit-rate video coding that combines H.264/AVC standard and two-dimensional discrete wavelet transform. In this method, first a two dimensional wavelet transform is a...In this paper, we propose a new method for very low bit-rate video coding that combines H.264/AVC standard and two-dimensional discrete wavelet transform. In this method, first a two dimensional wavelet transform is applied on each video frame independently to extract the low frequency components for each frame and then the low frequency parts of all frames are coded using H.264/AVC codec. On the other hand, the high frequency parts of the video frames are coded by Run Length Coding algorithm, after applying a threshold to neglect the low value coefficients. Experiments show that our proposed method can achieve better rate-distortion performance at very low bit-rate applications below 16 kbits/s compared to applying H.264/AVC standard directly to all frames. Applications of our proposed video coding technique include video telephony, video-conferencing, transmitting or receiving video over half-rate traffic channels of GSM networks.展开更多
基金Project supported by the National Natural Science Foundation of China(No.60502033),the Natural Science Foundation of Shanghai (No.04ZRl4084)and the Research Fund for the Doctoral Program of Higher Eduction(No.20040248047),China
文摘H.264/MPEG-4 AVC standard appears highly competitive due to its high efficiency, flexibility and error resilience. In order to maintain universal multimedia access, statistical multiplexing, or adaptive video content delivery, etc., it induces an immense demand for converting a large volume of existing multimedia content from other formats into the H.264/AVC format and vice versa. In this work, we study the remultiplexing and resynchronization issue within system coding after transcoding, aiming to sustain the management and time information destroyed in transcoding and enable synchronized decoding of decoder buffers over a wide range of retrieval or receipt conditions. Given the common intention of multiplexing and synchronization mechanism in system coding of different standards, this paper takes the most widely used MPEG-2 transport stream (TS) as an example, and presents a software system and the key technologies to solve the time stamp mapping and relevant buffer management. The solution reuses previous information contained in the input streams to remultiplex and resynchronize the output information with the regulatory coding and composition structure. Experimental results showed that our solutions efficiently preserve the performance in multimedia presentation.
基金sponsored by ETRI System Semiconductor Industry Promotion Center,Human Resource Development Project for SoC Convergence.
文摘This paper proposes an efficient H.264/AVC entropy decoder.It requires no ROM/RAM fabrication process that decreases fabrication cost and increases operation speed.It was achieved by optimizing lookup tables and internal buffers,which significantly improves area,speed,and power.The proposed entropy decoder does not exploit embedded processor for bitstream manipulation, which also improves area,speed,and power.Its gate counts and maximum operation frequency are 77515 gates and 175MHz in 0.18um fabrication process,respectively.The proposed entropy decoder needs 2303 cycles in average for one macroblock decoding.It can run at 28MHz to meet the real-time processing requirement for CIF format video decoding on mobile applications.
基金Supported by the National Natural Science Foundation of China(No.61076021)the National Basic Research Program of China(No.2009CB320903)China Postdoctoral Science Foundation(No.2012M511364)
文摘An adaptive pipelining scheme for H.264/AVC context-based adaptive binary arithmetic coding(CABAC) decoder for high definition(HD) applications is proposed to solve data hazard problems coming from the data dependencies in CABAC decoding process.An efficiency model of CABAC decoding pipeline is derived according to the analysis of a common pipeline.Based on that,several adaptive strategies are provided.The pipelining scheme with these strategies can be adaptive to different types of syntax elements(SEs) and the pipeline will not stall during decoding process when these strategies are adopted.In addition,the decoder proposed can fully support H.264/AVC high4:2:2 profile and the experimental results show that the efficiency of decoder is much higher than other architectures with one engine.Taking both performance and cost into consideration,our design makes a good tradeoff compared with other work and it is sufficient for HD real-time decoding.
文摘Given the substantially increasing complexity of embedded systems, the use of relatively detailed clock cycle-accurate simulators for the design-space exploration is impractical in the early design stages. Raising the abstraction level is nowadays widely seen as a solution to bridge the gap between the increasing system complexity and the low design productivity. For this, several system-level design tools and methodologies have been introduced to efficiently explore the design space of heterogeneous signal processing systems. In this paper, we demonstrate the effectiveness and the flexibility of the Sesame/Artemis system-level modeling and simulation methodology for efficient peformance evaluation and rapid architectural exploration of the increasing complexity heterogeneous embedded media systems. For this purpose, we have selected a system level design of a very high complexity media application;a H.264/AVC (Advanced Video Codec) video encoder. The encoding performances will be evaluated using system-level simulations targeting multiple heterogeneous multiprocessors platforms.
基金Supported by the Nat:onal Natural Science Foundation of China (No. 60873185) and the Foundation of Science & Technology Department of Sichuan Province (No. 2011HH0037).
文摘To improve the coding performance of H.264/AVC, this paper proposes a rate control scheme composed of a novel flame complexity optimized selection and a quantization parameter (QP) value computation approach. First, it extracts the frame coding complexity from two rate distortion models, and then introduces five statistic modes to estimate the frame coding complexity. An optimal mode is selected according to the coding efficiency. Finally the paper presents a novel QP calculation method for the H.264/AVC rate control. Experimental results show that the proposed algorithra outperforms the algorithm integrated in the 3M model in obtaining precise frame coding complexity, achieving robust buffer control and improving coding quality. And the improving visual quality is high up to 0.90dB for CIF sequences.
基金This work was supported by the National Natural Science Foundation of China(NSFC)under the grant No.61972269the Fundamental Research Funds for the Central Universities under the grant No.YJ201881Doctoral Innovation Fund Program of Southwest Jiaotong University under the grant No.DCX201824.
文摘This paper presents a reversible data hiding(RDH)method,which is designed by combining histogram modification(HM)with run-level coding in H.264/advanced video coding(AVC).In this scheme,the run-level is changed for embedding data into H.264/AVC video sequences.In order to guarantee the reversibility of the proposed scheme,the last nonzero quantized discrete cosine transform(DCT)coefficients in embeddable 4×4 blocks are shifted by the technology of histogram modification.The proposed scheme is realized after quantization and before entropy coding of H.264/AVC compression standard.Therefore,the embedded information can be correctly extracted at the decoding side.Peak-signal-noise-to-ratio(PSNR)and Structure similarity index(SSIM),embedding payload and bit-rate variation are exploited to measure the performance of the proposed scheme.Experimental results have shown that the proposed scheme leads to less SSIM variation and bit-rate increase.
基金supported by the Seoul Future Contents Convergence(SFCC)Cluster established by Seoul R&BD Program
文摘This paper presents a quantization skipping method for H. 264/AVC video coding standard. In order to reduce the conputational-cost of quantization process coming from integer discrete cosine transform of H. 264/AVC, a quantization skipping condition is derived by the analysis of integer transform and quantization procedures. The expeerimental results show that the proposed algorithm has the capability to reduce the computional cost about 10% -2.5%.
文摘In this paper, we propose a new method for very low bit-rate video coding that combines H.264/AVC standard and two-dimensional discrete wavelet transform. In this method, first a two dimensional wavelet transform is applied on each video frame independently to extract the low frequency components for each frame and then the low frequency parts of all frames are coded using H.264/AVC codec. On the other hand, the high frequency parts of the video frames are coded by Run Length Coding algorithm, after applying a threshold to neglect the low value coefficients. Experiments show that our proposed method can achieve better rate-distortion performance at very low bit-rate applications below 16 kbits/s compared to applying H.264/AVC standard directly to all frames. Applications of our proposed video coding technique include video telephony, video-conferencing, transmitting or receiving video over half-rate traffic channels of GSM networks.