In this paper, the complexity of intra coding is first analyzed so as to achieve a weight of complexity measurement for each intra mode. Then, a new complexity scalable control algorithm for intra coding in H. 264 is ...In this paper, the complexity of intra coding is first analyzed so as to achieve a weight of complexity measurement for each intra mode. Then, a new complexity scalable control algorithm for intra coding in H. 264 is proposed, based on the rearrangement of the order of candidate modes and an efficient complexity allocation and control （CAAC） scheme at the macroblock （MB） level. The candidate modes of each MB are rearranged according to the local-edge information. Experimental results show that our proposed algorithm can make an appropriate cut-off point of the candidate modes sequence adaptively according to the current energy condition of a mobile device, so as to adjust the complexity at any level while maximizing the video quality, which can prolong the operational lifetime of the battery with minimum degradation in video quality.展开更多
The purpose of this paper is to improve allocation of the number of bits by estimating the target bits in H.264/AVC rate control.In the scheme,an enhancement method of the target unit-layer bit allocation is proposed,...The purpose of this paper is to improve allocation of the number of bits by estimating the target bits in H.264/AVC rate control.In the scheme,an enhancement method of the target unit-layer bit allocation is proposed,which uses a frame and unit complexity estimation to improve the existing mean absolute difference(MAD)complexity measurement.Using the statistical characteristics,we obtain change of occurrence bit about QP to apply the bit amount by QP from the video characteristics in the estimated bit amount of the current frame.Simulation results show that not only the proposed rate control scheme could achieve time saving of more than 99% over existing rate control algorithm,but also PSNR and bit rate were almost the same as the performance in all the sequences.展开更多
Image sequences processing and video encoding are extremely time consuming problems. The time complexity of them depends on image contents. This paper presents an estimation of a block motion method for video coding w...Image sequences processing and video encoding are extremely time consuming problems. The time complexity of them depends on image contents. This paper presents an estimation of a block motion method for video coding with edge alignment. This method uses blocks of size 4 × 4 and its basic idea is to find motion vector using the edge position in each video coding block. The method finds the motion vectors more accurately and faster than any known classical method that calculates all the possibilities. Our presented algorithm is compared with known classical algorithms using the evaluation function of the peak signal-to-noise ratio. For comparison of the methods we are using parameters such as time, CPU usage, and size of compressed data. The comparison is made on benchmark data in color format YUV. Results of our proposed method are comparable and in some cases better than results of standard classical algorithms.展开更多
In this paper, a fast half-pixel motion estimation algorithm and its corresponding hardware architecture is presented. Unlike three steps are needed in typical half-pixel motion estimation algorithm, the presented alg...In this paper, a fast half-pixel motion estimation algorithm and its corresponding hardware architecture is presented. Unlike three steps are needed in typical half-pixel motion estimation algorithm, the presented algorithm needs only two steps to obtain all the interpolated pixels of an entire 8x8 block. The proposed architecture works in a parallel way and is simulated by Modelsirn 6.5 SE, synthesized to the Xilinx Virtex4 XC4VLX15 FPGA device. The implementation results show that this architecture can achieve 190 MHz and 10 clock cycles are reduced to complete the entire interpolation process when compared with typical half-pixel interpolation, which meets the requirements of real-time application for very high defination videos.展开更多
基金Supported by the National High Technology Research and Development Program of China （2008AA01A313 ）, the National Natural Science Foundation of China （60772069）, and a Grant from the Centre for Signal Processing of the Hang Kong Polytechnic University （1-BB9c）.
文摘In this paper, the complexity of intra coding is first analyzed so as to achieve a weight of complexity measurement for each intra mode. Then, a new complexity scalable control algorithm for intra coding in H. 264 is proposed, based on the rearrangement of the order of candidate modes and an efficient complexity allocation and control （CAAC） scheme at the macroblock （MB） level. The candidate modes of each MB are rearranged according to the local-edge information. Experimental results show that our proposed algorithm can make an appropriate cut-off point of the candidate modes sequence adaptively according to the current energy condition of a mobile device, so as to adjust the complexity at any level while maximizing the video quality, which can prolong the operational lifetime of the battery with minimum degradation in video quality.
基金supported by the MKE(The Ministry of Knowledge Economy),Korea,under the ITRC(Information Technology Research Center)support program supervised by the NIPA(National IT Industry Promotion Agency)(NIPA-2011-C1090-1121-0010)
文摘The purpose of this paper is to improve allocation of the number of bits by estimating the target bits in H.264/AVC rate control.In the scheme,an enhancement method of the target unit-layer bit allocation is proposed,which uses a frame and unit complexity estimation to improve the existing mean absolute difference(MAD)complexity measurement.Using the statistical characteristics,we obtain change of occurrence bit about QP to apply the bit amount by QP from the video characteristics in the estimated bit amount of the current frame.Simulation results show that not only the proposed rate control scheme could achieve time saving of more than 99% over existing rate control algorithm,but also PSNR and bit rate were almost the same as the performance in all the sequences.
文摘Image sequences processing and video encoding are extremely time consuming problems. The time complexity of them depends on image contents. This paper presents an estimation of a block motion method for video coding with edge alignment. This method uses blocks of size 4 × 4 and its basic idea is to find motion vector using the edge position in each video coding block. The method finds the motion vectors more accurately and faster than any known classical method that calculates all the possibilities. Our presented algorithm is compared with known classical algorithms using the evaluation function of the peak signal-to-noise ratio. For comparison of the methods we are using parameters such as time, CPU usage, and size of compressed data. The comparison is made on benchmark data in color format YUV. Results of our proposed method are comparable and in some cases better than results of standard classical algorithms.
文摘In this paper, a fast half-pixel motion estimation algorithm and its corresponding hardware architecture is presented. Unlike three steps are needed in typical half-pixel motion estimation algorithm, the presented algorithm needs only two steps to obtain all the interpolated pixels of an entire 8x8 block. The proposed architecture works in a parallel way and is simulated by Modelsirn 6.5 SE, synthesized to the Xilinx Virtex4 XC4VLX15 FPGA device. The implementation results show that this architecture can achieve 190 MHz and 10 clock cycles are reduced to complete the entire interpolation process when compared with typical half-pixel interpolation, which meets the requirements of real-time application for very high defination videos.
