self-oscillating mixer is introduced in this paper, with fundamental signal generated by the oscillator subcircuit in the process of mixing. The oscillator core consumes 3 mA of the current from a 1.8 V DC supply and ...self-oscillating mixer is introduced in this paper, with fundamental signal generated by the oscillator subcircuit in the process of mixing. The oscillator core consumes 3 mA of the current from a 1.8 V DC supply and leads to an output power of –0.88 dBm per oscillator, and a measured phase noise of –91, –102 and –107 dBc/Hz at 100 KHz, 600 KHz and 1 MHz from the carrier, respectively. The proposed mixer achieved IIP3 of 0 dBm in the process of mixing, with conversation gain of 1.93 dB. Designing and simulation the circuit was done in 0.18 μm CMOS technology by ADS2010.展开更多
This paper presents the design of an ultralow power receiver front-end designed for a wireless sensor network （WSN） in a 0.18 μm CMOS process. The author designs two front-ends working in the saturation region and ...This paper presents the design of an ultralow power receiver front-end designed for a wireless sensor network （WSN） in a 0.18 μm CMOS process. The author designs two front-ends working in the saturation region and the subthreshold region respectively. The front-ends contain a two-stage cross-coupling cascaded common-gate （CG） LNA and a quadrature Gilbert IQ mixer. The measured conversion gain is variable with high gain at 24 dB and low gain at 7 dB for the saturation one, and high gain at 22 dB and low gain at 5 dB for the subthreshold one. The noise figure （NF） at high gain mode is 5.1 dB and 6.3 dB for each. The input 1 dB compression point （IPldB） at low gain mode is about -6 dBm and -3 dBm for each. The front-ends consume about 2.1 mA current from 1.8 V power supply for the saturation one and 1.3 mA current for the subthreshold one. The measured results show that, comparing with the power consumption saving, it is worth making sacrifices on the performance for using the subthreshold technology.展开更多
文摘self-oscillating mixer is introduced in this paper, with fundamental signal generated by the oscillator subcircuit in the process of mixing. The oscillator core consumes 3 mA of the current from a 1.8 V DC supply and leads to an output power of –0.88 dBm per oscillator, and a measured phase noise of –91, –102 and –107 dBc/Hz at 100 KHz, 600 KHz and 1 MHz from the carrier, respectively. The proposed mixer achieved IIP3 of 0 dBm in the process of mixing, with conversation gain of 1.93 dB. Designing and simulation the circuit was done in 0.18 μm CMOS technology by ADS2010.
基金supported by the National High Technology Research and Development Program of China(No.2007AA01Z2A7)the Special Fund of Jiangsu Province for the Transformation of Scientific and Technological Achievements(No.BA2010073)
文摘This paper presents the design of an ultralow power receiver front-end designed for a wireless sensor network （WSN） in a 0.18 μm CMOS process. The author designs two front-ends working in the saturation region and the subthreshold region respectively. The front-ends contain a two-stage cross-coupling cascaded common-gate （CG） LNA and a quadrature Gilbert IQ mixer. The measured conversion gain is variable with high gain at 24 dB and low gain at 7 dB for the saturation one, and high gain at 22 dB and low gain at 5 dB for the subthreshold one. The noise figure （NF） at high gain mode is 5.1 dB and 6.3 dB for each. The input 1 dB compression point （IPldB） at low gain mode is about -6 dBm and -3 dBm for each. The front-ends consume about 2.1 mA current from 1.8 V power supply for the saturation one and 1.3 mA current for the subthreshold one. The measured results show that, comparing with the power consumption saving, it is worth making sacrifices on the performance for using the subthreshold technology.
