Canonic Realizations of Voltage-Controlled Floating Inductors Using CFOAs and Analog Multipliers

New voltage-controlled floating inductors employing CFOAs and an analog multiplier have been presented which have the attractive features of using a canonic number of passive components (only two resistors and a capacitor) and not requiring any component-matching conditions and design constraints for the intended type of inductance realization. The workability and applications of the new circuits have been demonstrated by SPICE simulation and hardware experimental results based upon AD844-type CFOAs and AD633-type/MPY534 type analog multipliers.

Fabrication of Meander and Spiral Type Micro Inductors

To obtain microstructure of magnetic devices, the thin film inductors were fabricated by the process such as thin film manufacturing, photolithography and wet etching. The frequency characteristics of these devices are measured at high frequency range. When the inductor sizes of the spiral and the meander type are same, the inductance and the quality factor of the spiral type inductor are larger than those of the meander type inductor, but the driving frequency of the spiral type inductor is lower than that of the meander type inductor.

The coupling effect of air-bridges on broadband spiral inductors in SiC-based MMIC technology

The coupling effect of air-bridges on broadband spiral inductors in SiC-based MMIC technology has been investigated deeply. The fabricated 1-nH spiral inductor on SiC substrate demonstrates a self-resonant frequency of 51.6 GHz, with a peak Q-fact of 12.14 at 22.1 GHz. From the S-parameters measurements, the exponential decay phenomenon is observed for L, Q-factor, and SRF with the air-bridge height decreasing, and an analytic expression is concluded to exactly fit the measured data which can be used to predict the performance of the spiral inductor. All the coefficients in the formula have specific meaning. By means of establishing the lumped model, the parasitic coupling capacitance of the air-bridge has been extracted and presents the exponential decay with the air-bridge heights decreasing which indicates that this capacitor is directly related to the coupling effect of the air-bridge. Through the electromagnetic field distribution simulation, the details of the electric field around the air-bridge have been presented which demonstrate the formation and the variation principles of the coupling effect.

Magnetic-Particle-Composite-Medium-Filled Stacked-Spiral Inductors for Radio-Frequency CMOS Applications

Magnetic-particle-composite-medium-filled stacked-spiral inductors for rf complementary metal oxide semiconductor(CMOS)applications in GHz are demonstrated.The new inductor features a nearly closed magnetic circuit loop,an optimized high-permeability and low-loss sub-1μm magnetic particles'composite core,and a developed 0.18-μm CMOS-compatible device fabrication process.An equivalent circuit model with structural amplifying factors is proposed and modeled.The prototype of the 6-level stacked inductor with Co_(2)Z magnetic-particles-composite-medium filling increases the inductance L by 50%,and quality factor Q by 37%at frequencies as high as 1 GHz,with high inductance density as 825 nH/mm2 and a reduced size area by 80%compared to the planar spiral inductor.

Effect of lateral structure parameters of SiGe HBTs on synthesized active inductors

The effect of lateral structure parameters of transistors including emitter width, emitter length, and emitter stripe number on the performance parameters of the active inductor （AI）, such as the effective inductance Ls, quality factor Q, and self-resonant frequency too is analyzed based on 0.35%tm SiGe BiCMOS process. The simulation results show that for AI operated under fixed current density Jc, the HBT lateral structure parameters have significant effect on Ls but little influence on Q and 090, and the larger Ls can be realized by the narrow, short emitter stripe and few emitter stripes of SiGe HBTs. On the other hand, for AI with fixed HBT size, smaller Jc is beneficial for AI to obtain larger Ls, but with a cost of smaller Q and 090. In addition, under the fixed collector current Ic, the larger the size of HBT is, the larger Ls becomes, but the smaller Q and ab become. The obtained results provide a reference for selecting geometry of transistors and operational condition in the design of active inductors.

Fabrication and Performance of Novel RF Spiral Inductors on Silicon

This paper discusses fabrication and performance of novel circular spiral inductors on silicon. The substrate materials underneath the inductor coil are removed by wet etching process. In the fabrication process, fine polishing of the photoresist is used to simplify the processes and ensure perfect contact between the seed layer and the top of pillars. Dry etching technique is used to remove the seed layer. The results show that Q-factor of the inductor is greatly improved by removing silicon underneath the inductor coil. The spiral inductor with line width of 50 μm has a peak Q-factor of 10 for the inductance of 2.5 nH at frequency of 1 GHz, and the resonance frequency of the inductor is about 8.5 GHz. For the inductor of conductor width 80 μm, the peak Q-factor increases to about 17 for inductance of 1.5 nH in the frequency range of 0.05 -3.00 GHz.

A compact and reconfigurable low noise amplifier employing combinational active inductors and composite resistors feedback techniques

A compact and reconfigurable low noise amplifier(LNA)is proposed by combining an input transistor,composite transistors with Darlington configuration as the amplification and output transistor,T-type structure composite resistors instead of a simplex structure resistor,a shunt inductor feedback realized by a tunable active inductor(AI),a shunt inductor peaking technique realized by another tunable AI.The division and collaboration among different resistances in the T-type structure composite resistor realize simultaneously input impedance matching,output impedance matching and good noise performance;the shunt feedback and peaking technique using two tunable AIs not only extend frequency bandwidth and improve gain flatness,but also make the gain and frequency band can be tuned simultaneously by the external bias of tunable AIs;the Darlington configuration of composite transistors provides high gain;furthermore,the adoption of the small size AIs instead of large size passive spiral inductor,and the use of composite resistors make the LNA have a small size.The LNA is fabricated and verified by GaAs/InGaP hetero-junction bipolar transistor(HBT)process.The results show that at the frequency of 7 GHz,the gain S_(21)is maximum and up to 19 dB;the S_(21)can be tuned from 17 dB to 19 dB by tuning external bias of tunable AIs,that is,the tunable amount of S_(21)is 2 dB,and similarly at 8 GHz;the tunable range of 3 dB bandwidth is 1 GHz.In addition,the gain S_(21)flatness is better than 0.4 dB under frequency from 3.1 GHz to 10.6 GHz;the size of the LNA only has 760μm×1260μm(including PADs).Therefore,the proposed strategies in the paper provide a new solution to the design of small size and reconfigurable ultra-wideband(UWB)LNA and can be used further to adjust the variations of gain and bandwidth of radio frequency integrated circuits(RFICs)due to package,parasitic and the variation of fabrication process and temperature.

Reluctance Network Analysis for Complex Coupled Inductors

The use of reluctance networks has been a conventional practice to analyze transformer structures. Basic transformer structures can be well analyzed by using the magnetic-electric analogues discovered by Heaviside in the 19th century. However, as power transformer structures are getting more complex today, it has been recognized that changing transformer structures cannot be accurately analyzed using the current reluctance network methods. This paper presents a novel method in which the magnetic reluctance network or arbitrary complexity and the surrounding electrical networks can be analyzed as a single network. The method presented provides a straightforward mapping table for systematically linking the electric lumped elements to magnetic circuit elements. The methodology is validated by analyzing several practical transformer structures. The proposed method allows the analysis of coupled inductor of any complexity, linear or non-linear.

A 65 nm CMOS high efficiency 50 GHz VCO with regard to the coupling effect of inductors

A 50 GHz cross-coupled voltage controlled oscillator（VCO） considering the coupling effect of inductors based on a 65 nm standard complementary metal oxide semiconductor（CMOS） technology is reported.A pair of inductors has been fabricated,measured and analyzed to characterize the coupling effects of adjacent inductors. The results are then implemented to accurately evaluate the VCO＇s LC tank.By optimizing the tank voltage swing and the buffer＇s operation region,the VCO achieves a maximum efficiency of 11.4%by generating an average output power of 2.5 dBm while only consuming 19.7 mW（including buffers）.The VCO exhibits a phase noise of-87 dBc/Hz at 1 MHz offset,leading to a figure of merit（FoM） of-167.5 dB/Hz and a tuning range of 3.8%（from 48.98 to 50.88 GHz）.

An improved single-π equivalent circuit model for on-chip inductors in GaAs process

An improved single-π equivalent circuit model for on-chip inductors in the GaAs process is presented in this paper. Considering high order parasites, the model is established by comprising an improved skin effect branch and a substrate lateral coupling branch. The parameter extraction is based on an improved characteristic function approach and vector fitting method. The model has better simulation than the previous work over the measured data of 2.5r and 4.5r on-chip inductors in the GaAs process.

Scalable modeling and comparison for spiral inductors using enhanced 1-π and 2-π topologies

Two different scalable models developed based on enhanced 1-πand 2-πtopologies are presented for onchip spiral inductor modeling.All elements used in the two topologies for accurately predicting the characteristics of spiral inductors at radio frequencies are constructed in geometry-dependent equations for scalable modeling.Then a comparison between the 1-πand 2-πscalable models is made from the following aspects：the complexity of equivalent circuit models and parameter-extraction procedures,scalable rules and the accuracy of scalable models.The two scalable models are further verified by the excellent match between the measured and simulated results on extracted parameters up to self-resonant frequency（SRF） for a set of spiral inductors with different L,R and N,which are fabricated by employing 0.18-μm 1P6M RF CMOS technology.

Analyses of mechanically-assembled 3D spiral mesostructures with applications as tunable inductors

Mechanically-guided assembly allows the formation of 3D spiral-shaped inductors through controlled buckling, which could provide an increased quality(Q) factor and broadened working angle in near field communication, as compared to the planar design. An understanding of the microstructure-property relationship is essential in the design optimization of the assembly process. This work presents a theoretical model to analyze the deformations during the assembly of the 3D spiral-shaped mesostructure from a bilayer precursor that consists of a supporting ribbon and a 2D coil on its top. As validated by both the experiments and finite element analyses(FEA), this mechanics model allows accurate predictions of the assembled 3D configurations. In combination of electromagnetic simulations, we investigated the effects of various key design parameters on the final 3D configuration and the Q factor when operated as an inductor. The results suggest a significant role of the gravity effect on the assembled spiral configuration, especially for flexible coil designs with relative small cross-sectional areas or long wires.This study can serve as a reference for the design of spiral-shaped 3D inductors in different device applications.

Design of MCI single and symmetrical on-chip spiral inductors

In this paper,the MCI（multipath crossover interconnection）technique for octagon single and symmetrical spiral inductors has been presented to improve the quality factor.The metal wires of the single and symmetrical inductors formed by the top metal are divided into multiple segments according to the depth of the skin effects.The outermost path of the metal is crossover-interconnected to the innermost path by the underlayer metal and via The crossover technique makes the lengths of the total current paths between two ports approximately equal to each other.Therefore,the induced magnetic flux and resistance of each path can be balanced and the Q-factor of spiral inductors can be enhanced.The proposed MCI technique has been validated by the electromagnetic simulation with the 130-nm 1P6M SiGe BiCMOS process.For the devices with occupying areas of 240 240 μm^2,results of electromagnetic simulation show that about 24%improvement in the Q-peak（3.3 GHz）of the MCI single inductor as compared to conventional single inductors（3.1 GHz）,and about 88.1%improvement in the Q-peak（3.2 GHz）of the MCI symmetrical inductor as compared to conventional symmetrical inductors（1.8 GHz）.

Double-πfully scalable model for on-chip spiral inductors

A novel double-n equivalent circuit model for on-chip spiral inductors is presented. A hierarchical structure, similar to that of MOS models is introduced. This enables a strict partition of the geometry scaling in the global model and the model equations in the local model. The major parasitic effects, including the skin effect, the proximity effect, the inductive and capacitive loss in the substrate, and the distributed effect, are analytically calculated with geometric and process parameters in the locaMevel. As accurate values of the layout and process parameters are difficult to obtain, a set of model parameters is introduced to correct the errors caused by using these given inaccurate layout and process parameters at the local level. Scaling rules are defined to enable the formation of models that describe the behavior of the inductors of a variety of geometric dimensions. A series of asymmetric inductors with different geometries are fabricated on a standard 0.18-μm SiGe BiCMOS process with 100 Ω/cm substrate resistivity to verify the proposed model. Excellent agreement has been obtained between the measured results and the proposed model over a wide frequency range.

Fabrication of 3D air-core MEMS inductors for very-highfrequency power conversions

We report a fabrication technology for 3D air-core inductors for small footprint and very-high-frequency power conversions.Our process is scalable and highly generic for fabricating inductors with a wide range of geometries and core shapes.We demonstrate spiral,solenoid,and toroidal inductors,a toroidal transformer and inductor with advanced geometries that cannot be produced by wire winding technology.The inductors are embedded in a silicon substrate and consist of through-silicon vias and suspended windings.The inductors fabricated with 20 and 25 turns and 280-350μm heights on 4-16 mm2 footprints have an inductance from 34.2 to 44.6 nH and a quality factor from 10 to 13 at frequencies ranging from 30 to 72 MHz.The air-core inductors show threefold lower parasitic capacitance and up to a 140% higher-quality factor and a 230% higher-operation frequency than silicon-core inductors.A 33 MHz boost converter mounted with an air-core toroidal inductor achieves an efficiency of 68.2%,which is better than converters mounted with a Si-core inductor(64.1%).Our inductors show good thermal cycling stability,and they are mechanically stable after vibration and 2-m-drop tests.

Research on Control Strategy of 2-phase Interleaving Magnetic Integrated VRM

A kind of 2-phase interleaving coupled magnetic integrated VRM is studied and the corresponding passivity-based control strategy is put forward. The model of this kind of magnetic integrated VRM is constructed, and the performance of this 2-phase interleaving magnetic integrated VRM of passivity-based control is verified by simulation experiments. The results proved that this kind of passivity-based control strategy can decrease the steady state current ripple and the dynamic output voltage under load disturbance.

Mitigating Time Interval Error (TIE) in High-Speed Baseband Digital Transports: Design for Delay Compensation at Baseband Infrastructure of Smart-Phones Using Fractal Dispersive Delay-Lines

A major concern in modern smart-phones and hand-held devices is a way of mitigating the time interval error (TIE) perceived at high-speed digital transits along the traces of the circuit-board (rigid and or flexible) used in baseband infrastructures. Indicated here is a way of adopting a planar fractal inductor configuration to improvise the necessary time-delay in the transits of digital signal phase jitter and reduce the TIE. This paper addresses systematic design considerations on fractal inductor geometry commensurate with practical aspects of its implementation as delaylines in the high-speed digital transports at the baseband operations of smart-phone infrastructures. Experimental results obtained from a test module are presented to illustrate the efficacy of the design and acceptable delay performance of the test structure commensurate with the digital transports of interest.

Intermittency and bifurcation in SEPICs under voltage-mode control

A stroboscopic map for voltage-controlled single ended primary inductor converter （SEPIC） with pulse width modulation （PWM） is presented, where low-frequency oscillating phenomena such as quasi-periodic and intermittent quasi-periodic bifurcations occurring in the system are captured by numerical and experimental methods. According to bifurcation diagrams and nonlinear dynamical theory, the characteristics of the low-frequency oscillation and the mechanism for the appearance of the low-frequency oscillation are investigated. It is shown that as the controller parameter varies, the change in the conduction mode takes place from the continuous conduction mode （CCM） under the originally stable period one and high periodic orbits to the intermittent changes between CCM and discontinuous conduction mode （DCM）, which may be related to the losing stability of the system and brought the system to exhibiting low-frequency oscillating behaviour in the time domain. Moreover, the occurrence of the intermittent quasi-periodic oscillation reflects that the system undergoes a Neimark-Sacker bifurcation.

The voltage-current relationship and equivalent circuit implementation of parallel flux-controlled memristive circuits

A flux-controlled memristor characterized by smooth cubic nonlinearity is taken as an example, upon which the voltage-current relationships （VCRs） between two parallel memristive circuits - a parallel memristor and capacitor circuit （the parallel MC circuit）, and a parallel memristor and inductor circuit （the parallel ML circuit） - are investigated. The results indicate that the VCR between these two parallel memristive circuits is closely related to the circuit parameters, and the frequency and amplitude of the sinusoidal voltage stimulus. An equivalent circuit model of the memristor is built, upon which the circuit simulations and exper/mental measurements of both the parallel MC circuit and the parallel ML circuit are performed, and the results verify the theoretical analysis results.

High-Gm Differential Regulated Cascode Transimpedance Amplifier

A differential cross-coupled regulated cascode(RGC)transimpedance amplifier(TIA)is proposed. The theory of multi-stage common-source(CS) configuration as an auxiliary amplifier to enhance the bandwidth and output impedance of RGC topology is analyzed. Additionally, negative Miller capacitance and shunt active inductor compensation are exploited to further expand the bandwidth. The proposed RGC TIA is simulated based on UMC 0.18 μm standard CMOS process. The simulation results demonstrate that the proposed TIA has a high transimpedance of 60.5 d B?, and a-3 d B bandwidth of 5.4 GHz is achieved for 0.5 p F input capacitance. The average equivalent input noise current spectral density is about 20 p A/Hz^(1/2) in the interested frequency, and the TIA consumes 20 m W DC power under 1.8 V supply voltage. The voltage swing is 460 m V pp, and the saturation input current is 500 μA.