Cascaded H-Bridge inverter has been researched for the past two decades, but there are no explicit guidelines on how one can realize a cascaded NPC (neutral-point-clamped)/H-Bridge inverter. Past research has also c...Cascaded H-Bridge inverter has been researched for the past two decades, but there are no explicit guidelines on how one can realize a cascaded NPC (neutral-point-clamped)/H-Bridge inverter. Past research has also concentrated on realizing a five-level NPC/H-Bridge inverter. This fails to address the principle of realizing a general cascaded N-level NPC/H-Bridge PWM inverter. This paper proposes an improved topology for achieving a nine-level cascaded NPC (neutral-point-clamped) H-Bridge inverter with reduced harmonic content. This new proposed topology requires a lesser number of separate dc sources as compared to conventional cascaded H-Bridge inverter. The whole system is considered as having four three level legs having two positive and two negative legs. By properly phase shifting the modulating wave and carriers, a nine-level output is achieved. A theoretical harmonic analysis of the proposed inverter is carried out based on double Fourier principle. The theoretical results are verified through MATLAB simulation.展开更多
A quasi resonant pulse width modulation(PWM) inverter is used in a solar power system to convert the solar panel and battery charger's direct current(DC) output to alternating current(AC).Although much has been...A quasi resonant pulse width modulation(PWM) inverter is used in a solar power system to convert the solar panel and battery charger's direct current(DC) output to alternating current(AC).Although much has been published about DC to AC PWM inverters,none of the previous work has shown modeling and simulation results for DC to AC inverters.In this study,we suggest a new topology for a quasi resonant PWM inverter.Experimental results are also presented.展开更多
The full bridge zero voltage zero current switching ( FB-ZVZCS ) , which could adjust the output power by keeping the duty ratio of lagging leg constant and changing the duty ratio of leading leg, was a common circu...The full bridge zero voltage zero current switching ( FB-ZVZCS ) , which could adjust the output power by keeping the duty ratio of lagging leg constant and changing the duty ratio of leading leg, was a common circuit of soft switching arc welding inverter power source. However, when the duty ratio of leading leg was reduced to zero, the output power stayed the constant value instead of becoming zero. The working status and waveforms of some major parameters were studied in this paper while the duty ratio of leading leg was zero. It was concluded that the minimum output power of soft switching inverter was related to the charging voltage of paraUel capacitors, and the output power also could be reduced by reducing the duty ratio of lagging leg. A novel two-stage continuous PWM control method that could switch working-mode between full bridge and half bridge was put forward in this paper. This kind of control method could further reduce the output power of soft switching inverter in order to meet the requirement of low heat input of sheet metal welding.展开更多
In order to output sine wave with small degree of distortion and improve stability,a type of inverter power supply is designed based on harmonic elimination pulse-width modulation(PWM)control.The rectifier and filter ...In order to output sine wave with small degree of distortion and improve stability,a type of inverter power supply is designed based on harmonic elimination pulse-width modulation(PWM)control.The rectifier and filter are added to input circuit of the inverter.Single-phrase full-bridge inverter performs the function of converting direct current into alternating current(DC/AC).In the control circuit,single chip micyoco(SCM)AT89C2051 is used for main control chip to accomplish the hardware design of the control system.A given value of output frequency of the inverter is input in the way of coding.According to the output frequency code which is read,SCM AT89C2051 defined harmonic elimination PWM control data which will be selected.Through internal timing control,the switches are switched under this provision of PWM control data.Then the driving signals of the switches in the inverter are output from I/O of SCM AT89C2051 to realize harmonic elimination PWM control.The results show that adding Newton homotopic algorithm of harmonic elimination PWM control to corresponding software of the control system can make the quality of output voltage of the inverter higher and it will have broad application prospects.展开更多
Ⅰ. INTRODUCTION MULTILEVEL inverters are increasingly being used in high-power medium voltage applications due to their superior performance compared to two-level inverters, such as lower common-mode voltage, lower d...Ⅰ. INTRODUCTION MULTILEVEL inverters are increasingly being used in high-power medium voltage applications due to their superior performance compared to two-level inverters, such as lower common-mode voltage, lower dv/dt, lower harmonics in output voltage and current, and reduced voltage on the power switches.展开更多
Modeling and simulation of induction motor drive system to investigate and mitigate the adverse effects of PWM inverter based on analysis, modeling and simulation are presented. The estimation of conducted disturbance...Modeling and simulation of induction motor drive system to investigate and mitigate the adverse effects of PWM inverter based on analysis, modeling and simulation are presented. The estimation of conducted disturbances and other adverse effects of PWM inverter by simulation offer a considerable gain from the economic point of view. For an accurate model of the motor drive system including mains, rectifier, inverter, motor and its long cables, the high frequency parasitic current paths are taken into account. The novel model and its parasitic values for three-phase induction motor system are presented. Finally a new solution for suppressing EMI, common mode voltage, leakage current, bearing current and shaft voltages is proposed and the results show the excellent performances of proposed solution including active and passive filters.展开更多
In this paper, a vector regulating principle of the phase and amplitude control PAC method for three-phase grid-connected inverters is presented.To solve the problem of heavy inrush current and slow dynamic response w...In this paper, a vector regulating principle of the phase and amplitude control PAC method for three-phase grid-connected inverters is presented.To solve the problem of heavy inrush current and slow dynamic response when system starts up, the starting voltage prediction control and the current feed-forward control are proposed and used, which improve the dynamic performance of the system in the PAC.The experimental results carried out on a three-phase grid-connected inverter proved the validity of the proposed method.展开更多
In cascaded H-bridge multilevel inverter, a variable frequency inverted sine PWM technique is modeled for hybrid electric vehicles. It has a particular advantage of increasing power which is achieved using series conn...In cascaded H-bridge multilevel inverter, a variable frequency inverted sine PWM technique is modeled for hybrid electric vehicles. It has a particular advantage of increasing power which is achieved using series connection of H-bridge and also this topology is capable to produce superior spectral quality with considerable improvement of fundamental voltage. The variable frequency inverted sine PWM technique produces lesser torque ripple and enhances the fundamental output voltage mainly at lower modulation index ranges. The topologies of multilevel inverter are flying capacitor, diode clamped and cascaded inverter. In the paper, we will discuss about the cascaded multilevel inverter based on inverted sine PWM technique. The two switching strategies widely used to control multilevel inverters are constant frequency inverted sine PWM (CF-ISPWM) and variable frequency inverted sine PWM (VF-ISPWM). This implies that switch utilization substantially reduces 32.35% of the constant frequency inverted sine PWM switching technique. The performance of the technique is validated in terms of Total Harmonic Distortion (THD) and Torque ripple which significantly reduces when compared to constant frequency ISPWM. The analysis of conventional triangular PWM inverter and inverted sine PWM inverter using constant and variable switching scheme is done in MATLAB Simulink and verified experimentally by FPGA Spartan 3E processor.展开更多
The conventional inverters have the shortcomings of straightway conduction in transistors and the difficulty of realizing soft swit ̄ching. A novel inverter based on the DC/DC converter topology is presented. The inve...The conventional inverters have the shortcomings of straightway conduction in transistors and the difficulty of realizing soft swit ̄ching. A novel inverter based on the DC/DC converter topology is presented. The inverter is comprised of a combined Buck/Boost DC/DC converter and a bridge circuit. The front stage converter is controlled to output variable DC voltage and the bridge circuit is used to convert the DC voltage to AC output. The energy feedback technology and one circle control scheme are used t...展开更多
The paper proposes a Current Source Multilevel Inverter (CSMLI) with single rating inductor topology. Multilevel inverters are most familiar with power converter’s applications due to reduced dv/dt, di/dt stress, and...The paper proposes a Current Source Multilevel Inverter (CSMLI) with single rating inductor topology. Multilevel inverters are most familiar with power converter’s applications due to reduced dv/dt, di/dt stress, and very efficient for reducing harmonic distortion in the output voltage and output current. The proposed nine-level current source inverter has been tested under symmetrical and asymmetrical modes of operation, and their activities are compared using PI and Fuzzy PI (Proportional Integral) controllers with multicarrier PWM (Pulse Width Modulation) strategy. MATLAB/Simulink simulation has been made for the proposed converter to obtain its performance measures. Some experimental results are given to verify the presented Current Source Multilevel Inverter.展开更多
As the demand for high voltage, high power inverters are increasing and there is a problem of connecting a power semiconductor switch directly to a high voltage network. As a part of this the multilevel inverters had ...As the demand for high voltage, high power inverters are increasing and there is a problem of connecting a power semiconductor switch directly to a high voltage network. As a part of this the multilevel inverters had been introduced. As a part of this, several researches had been done for the development of multilevel inverters. The commercially available and extensively studied topologies for multilevel voltage output are Neutral Point Clamped (NPC), Cascaded Half Bridge (CHB) and Flying Capacitor (FC) converters. However, with these existing topologies, there is a significant increase in the number of power switches and passive components. Thus it leads to more complex control circuitry and overall cost of the system increase with increase in the output levels. In this paper, a novel multilevel inverter is proposed in which it employs additive and subtractive topology to get higher output levels. This approach significantly reduces the number of power switches needed as compared to existing topology. The present developed multilevel inverter can generate only five voltage levels. With this proposed topology the multilevel inverter can be modified to nine-level inverter. Moreover modified hybrid multicarrier Pulse Width Modulation (PWM) technique can be implemented in the proposed multilevel inverter in order to obtain uniform switch utilization and lower THD. An appropriate modulation scheme is presented and also the proposed concept is analyzed through simulation studies.展开更多
In recent years, Z-source inverters (ZSI) have been proposed as an replacement power conversion concept which it has both voltage buck and boost abilities. In addition, ZSI doesn’t require dead-time to protection sho...In recent years, Z-source inverters (ZSI) have been proposed as an replacement power conversion concept which it has both voltage buck and boost abilities. In addition, ZSI doesn’t require dead-time to protection short circuit at two switches any of the same phase leg in the inverter bridge and to achieve optimal harmonic of current, voltage. This paper presents two different control methods (CM) for ZSI. The aim of this study to compare between two modulation methods, there are modi?ed space vector pulse width modulation method (MSVM) and the simple boost control (SBC) about the unique harmonic performance features, the total average and peak switching device power of the inverter system. In addition, this paper also analyzes about the ability exceed modulation index in linear region of two CM using MATLAB/Simulink.展开更多
The new three-phase 5-level current-source inverter (CSI) proposed in this paper was developed by connecting three separate single-phase 5-level CSIs in series, and its operational principle was analyzed. There are tw...The new three-phase 5-level current-source inverter (CSI) proposed in this paper was developed by connecting three separate single-phase 5-level CSIs in series, and its operational principle was analyzed. There are two major problems existing in current-source multilevel inverters, one is the complex PWM control method (2-logic to 3-logic conversion), and the other is the problem of current-unbalance between different levels. A simple current-balance control method via DC current feedback is applied in each single-phase 5-level CSI cell to implement the current-balance control between different levels. And to reduce the output current harmonics, POD PWM control technique was used. Simulation and experimental results showed that this new three-phase 5-level CSI topology operates correctly.展开更多
The intent of this paper is to analyze the electromagnetic signature of stator winding inter-turn short-circuit fault in a closed loop speed controlled Induction Motor(IM)employing Finite Element Method.Stator winding...The intent of this paper is to analyze the electromagnetic signature of stator winding inter-turn short-circuit fault in a closed loop speed controlled Induction Motor(IM)employing Finite Element Method.Stator winding short-circuit nearly covers 21%of faults in IM.Diagnosing the inter-turn fault at an incipient stage is one of the challenging task in the area of fault detection of IM to prevent crucial damages in industrial applications.Also detecting the faults in inverter fed IM under variable speed applications under varying load is one of the major issues in industrial drives.As the signatures of electromagnetic field contains the entire data in association with the location of rotor,stator and mechanical parts of the motor,a regular monitoring of fields in the airgap can be used to diagnose the inter-turn fault in the stator winding of IM.In this direction,an IM is modeled with several inter-turn fault severities like 30 turns,15 turns,5 turns&1 turn short using ANSYS Maxwell FEA tool and coupled with ANSYS Simplorer for loading arrangements.The PWM inverter with closed loop speed controlled strategy is implemented in Matlab Simulink and co-simulated with ANSYS Simplorer to integrate all the components in one common simulation platform environment for accurate design&analysis for realistic simulation.Several electromagnetic variables like flux density,flux lines and airgap flux density distribution over the machine are analyzed.The spatial FFT spectrum of radial component of flux density in the airgap contains the information related to the diagnosis of inter-turn fault at the incipient stage.展开更多
Pulse-width sequences are identified as the determining factor for common-mode(CM)voltage,which together with CM path generate CM current.This paper introduces a series of pulse-width modulation(PWM)methods,which are ...Pulse-width sequences are identified as the determining factor for common-mode(CM)voltage,which together with CM path generate CM current.This paper introduces a series of pulse-width modulation(PWM)methods,which are focusing on reducing CM noise of three-phase inverters as motor controller.Firstly,theoretic analysis and PWM reduction methods of CM voltage for general three-phase two-level inverters are introduced.Analysis results indicate that the realization of CM noise reduction should take switching frequency and loop impedance into consideration together to avoid CM resonant phenomenon.The regular three-phase two-level inverter is incapable of eliminating CM voltage because of the limitation of topology.Then,optimal PWM methods applied to for advanced topologies can be utilized to eliminate the CM voltage theoretically.Two typical typologies presented in this paper are three-level inverters and paralleled inverters.Three-level inverters can achieve zero-CM output voltage by selecting zero-CM voltage vectors at the expense of power quality.However,for paralleled inverters,zero-CM PWM method is able to achieve zero CM voltage output,as well as the improved output current harmonics and voltage balancing.展开更多
A novel concept of neural network based control in pulse-width modulation(PWM)voltage source inverters is presented.On the one hand,the optimal switching an-gles are obtained in real time by the neural network based c...A novel concept of neural network based control in pulse-width modulation(PWM)voltage source inverters is presented.On the one hand,the optimal switching an-gles are obtained in real time by the neural network based controller;on the other hand,the output voltage is ad-justed to fit the expected value by neural network when input voltage or loads change.The structure of neural network is simple and easy to be realized by DSP hard-ware system.No large memory used for the existing opti-mal PWM schemes is required in the system.Theoreticalanlysis of the proposed so-called sparse neural network is provided,and the stability of the system is proved.Un-der the control of neural network the error of output volt-age descends sharply,and the system outputs ac voltage with high precision.展开更多
Multilevel inverter has played a vital role in medium and high power applications in the recent years. In this paper, Reduced Switch Count Multi Level Inverter structure (RSCMLI) topology is presented with different p...Multilevel inverter has played a vital role in medium and high power applications in the recent years. In this paper, Reduced Switch Count Multi Level Inverter structure (RSCMLI) topology is presented with different pulse width modulation techniques. The harmonic level analysis is carried out for the reduced switch count multilevel inverter with the different PWM technique such as with Alternate Phase Opposition Disposition (APOD) method, In Phase Disposition (IPD) method and multi reference pulse width modulation method for five level, seven level , nine level and eleven level inverter. The simulation results are compared with the cascaded H Bridge Multi Level Inverter (CHBMLI). The nine level RSCMLI inverter with APOD method is used for the Distribution Static Synchronous Compensator (DSTATCOM) application in the nonlinear load connected system for power factor improvement. The result shows that the harmonic level and the number of switches required for RSCMLI is reduced compared to CHBMLI. RSCMLI employed in DSTATCOM improves the power factor and harmonic level of the system when it is connected to the nonlinear load.展开更多
文摘Cascaded H-Bridge inverter has been researched for the past two decades, but there are no explicit guidelines on how one can realize a cascaded NPC (neutral-point-clamped)/H-Bridge inverter. Past research has also concentrated on realizing a five-level NPC/H-Bridge inverter. This fails to address the principle of realizing a general cascaded N-level NPC/H-Bridge PWM inverter. This paper proposes an improved topology for achieving a nine-level cascaded NPC (neutral-point-clamped) H-Bridge inverter with reduced harmonic content. This new proposed topology requires a lesser number of separate dc sources as compared to conventional cascaded H-Bridge inverter. The whole system is considered as having four three level legs having two positive and two negative legs. By properly phase shifting the modulating wave and carriers, a nine-level output is achieved. A theoretical harmonic analysis of the proposed inverter is carried out based on double Fourier principle. The theoretical results are verified through MATLAB simulation.
基金supported by the Ming Chuan University Internal Research Fund
文摘A quasi resonant pulse width modulation(PWM) inverter is used in a solar power system to convert the solar panel and battery charger's direct current(DC) output to alternating current(AC).Although much has been published about DC to AC PWM inverters,none of the previous work has shown modeling and simulation results for DC to AC inverters.In this study,we suggest a new topology for a quasi resonant PWM inverter.Experimental results are also presented.
文摘The full bridge zero voltage zero current switching ( FB-ZVZCS ) , which could adjust the output power by keeping the duty ratio of lagging leg constant and changing the duty ratio of leading leg, was a common circuit of soft switching arc welding inverter power source. However, when the duty ratio of leading leg was reduced to zero, the output power stayed the constant value instead of becoming zero. The working status and waveforms of some major parameters were studied in this paper while the duty ratio of leading leg was zero. It was concluded that the minimum output power of soft switching inverter was related to the charging voltage of paraUel capacitors, and the output power also could be reduced by reducing the duty ratio of lagging leg. A novel two-stage continuous PWM control method that could switch working-mode between full bridge and half bridge was put forward in this paper. This kind of control method could further reduce the output power of soft switching inverter in order to meet the requirement of low heat input of sheet metal welding.
文摘In order to output sine wave with small degree of distortion and improve stability,a type of inverter power supply is designed based on harmonic elimination pulse-width modulation(PWM)control.The rectifier and filter are added to input circuit of the inverter.Single-phrase full-bridge inverter performs the function of converting direct current into alternating current(DC/AC).In the control circuit,single chip micyoco(SCM)AT89C2051 is used for main control chip to accomplish the hardware design of the control system.A given value of output frequency of the inverter is input in the way of coding.According to the output frequency code which is read,SCM AT89C2051 defined harmonic elimination PWM control data which will be selected.Through internal timing control,the switches are switched under this provision of PWM control data.Then the driving signals of the switches in the inverter are output from I/O of SCM AT89C2051 to realize harmonic elimination PWM control.The results show that adding Newton homotopic algorithm of harmonic elimination PWM control to corresponding software of the control system can make the quality of output voltage of the inverter higher and it will have broad application prospects.
文摘Ⅰ. INTRODUCTION MULTILEVEL inverters are increasingly being used in high-power medium voltage applications due to their superior performance compared to two-level inverters, such as lower common-mode voltage, lower dv/dt, lower harmonics in output voltage and current, and reduced voltage on the power switches.
基金Sponsored by the National Natural Science Foundation of China(Grant No.50477009).
文摘Modeling and simulation of induction motor drive system to investigate and mitigate the adverse effects of PWM inverter based on analysis, modeling and simulation are presented. The estimation of conducted disturbances and other adverse effects of PWM inverter by simulation offer a considerable gain from the economic point of view. For an accurate model of the motor drive system including mains, rectifier, inverter, motor and its long cables, the high frequency parasitic current paths are taken into account. The novel model and its parasitic values for three-phase induction motor system are presented. Finally a new solution for suppressing EMI, common mode voltage, leakage current, bearing current and shaft voltages is proposed and the results show the excellent performances of proposed solution including active and passive filters.
基金supported by the Shanghai Education Committee Scientific Research Subsidization (Grant No.05AZ30)the Specialized Research Fund for the Doctoral Program of Higher Education (Grant No. 20060280018)
文摘In this paper, a vector regulating principle of the phase and amplitude control PAC method for three-phase grid-connected inverters is presented.To solve the problem of heavy inrush current and slow dynamic response when system starts up, the starting voltage prediction control and the current feed-forward control are proposed and used, which improve the dynamic performance of the system in the PAC.The experimental results carried out on a three-phase grid-connected inverter proved the validity of the proposed method.
文摘In cascaded H-bridge multilevel inverter, a variable frequency inverted sine PWM technique is modeled for hybrid electric vehicles. It has a particular advantage of increasing power which is achieved using series connection of H-bridge and also this topology is capable to produce superior spectral quality with considerable improvement of fundamental voltage. The variable frequency inverted sine PWM technique produces lesser torque ripple and enhances the fundamental output voltage mainly at lower modulation index ranges. The topologies of multilevel inverter are flying capacitor, diode clamped and cascaded inverter. In the paper, we will discuss about the cascaded multilevel inverter based on inverted sine PWM technique. The two switching strategies widely used to control multilevel inverters are constant frequency inverted sine PWM (CF-ISPWM) and variable frequency inverted sine PWM (VF-ISPWM). This implies that switch utilization substantially reduces 32.35% of the constant frequency inverted sine PWM switching technique. The performance of the technique is validated in terms of Total Harmonic Distortion (THD) and Torque ripple which significantly reduces when compared to constant frequency ISPWM. The analysis of conventional triangular PWM inverter and inverted sine PWM inverter using constant and variable switching scheme is done in MATLAB Simulink and verified experimentally by FPGA Spartan 3E processor.
文摘The conventional inverters have the shortcomings of straightway conduction in transistors and the difficulty of realizing soft swit ̄ching. A novel inverter based on the DC/DC converter topology is presented. The inverter is comprised of a combined Buck/Boost DC/DC converter and a bridge circuit. The front stage converter is controlled to output variable DC voltage and the bridge circuit is used to convert the DC voltage to AC output. The energy feedback technology and one circle control scheme are used t...
文摘The paper proposes a Current Source Multilevel Inverter (CSMLI) with single rating inductor topology. Multilevel inverters are most familiar with power converter’s applications due to reduced dv/dt, di/dt stress, and very efficient for reducing harmonic distortion in the output voltage and output current. The proposed nine-level current source inverter has been tested under symmetrical and asymmetrical modes of operation, and their activities are compared using PI and Fuzzy PI (Proportional Integral) controllers with multicarrier PWM (Pulse Width Modulation) strategy. MATLAB/Simulink simulation has been made for the proposed converter to obtain its performance measures. Some experimental results are given to verify the presented Current Source Multilevel Inverter.
文摘As the demand for high voltage, high power inverters are increasing and there is a problem of connecting a power semiconductor switch directly to a high voltage network. As a part of this the multilevel inverters had been introduced. As a part of this, several researches had been done for the development of multilevel inverters. The commercially available and extensively studied topologies for multilevel voltage output are Neutral Point Clamped (NPC), Cascaded Half Bridge (CHB) and Flying Capacitor (FC) converters. However, with these existing topologies, there is a significant increase in the number of power switches and passive components. Thus it leads to more complex control circuitry and overall cost of the system increase with increase in the output levels. In this paper, a novel multilevel inverter is proposed in which it employs additive and subtractive topology to get higher output levels. This approach significantly reduces the number of power switches needed as compared to existing topology. The present developed multilevel inverter can generate only five voltage levels. With this proposed topology the multilevel inverter can be modified to nine-level inverter. Moreover modified hybrid multicarrier Pulse Width Modulation (PWM) technique can be implemented in the proposed multilevel inverter in order to obtain uniform switch utilization and lower THD. An appropriate modulation scheme is presented and also the proposed concept is analyzed through simulation studies.
文摘In recent years, Z-source inverters (ZSI) have been proposed as an replacement power conversion concept which it has both voltage buck and boost abilities. In addition, ZSI doesn’t require dead-time to protection short circuit at two switches any of the same phase leg in the inverter bridge and to achieve optimal harmonic of current, voltage. This paper presents two different control methods (CM) for ZSI. The aim of this study to compare between two modulation methods, there are modi?ed space vector pulse width modulation method (MSVM) and the simple boost control (SBC) about the unique harmonic performance features, the total average and peak switching device power of the inverter system. In addition, this paper also analyzes about the ability exceed modulation index in linear region of two CM using MATLAB/Simulink.
基金Project (No. 50477033) supported by the National Natural Science Foundation of China
文摘The new three-phase 5-level current-source inverter (CSI) proposed in this paper was developed by connecting three separate single-phase 5-level CSIs in series, and its operational principle was analyzed. There are two major problems existing in current-source multilevel inverters, one is the complex PWM control method (2-logic to 3-logic conversion), and the other is the problem of current-unbalance between different levels. A simple current-balance control method via DC current feedback is applied in each single-phase 5-level CSI cell to implement the current-balance control between different levels. And to reduce the output current harmonics, POD PWM control technique was used. Simulation and experimental results showed that this new three-phase 5-level CSI topology operates correctly.
文摘The intent of this paper is to analyze the electromagnetic signature of stator winding inter-turn short-circuit fault in a closed loop speed controlled Induction Motor(IM)employing Finite Element Method.Stator winding short-circuit nearly covers 21%of faults in IM.Diagnosing the inter-turn fault at an incipient stage is one of the challenging task in the area of fault detection of IM to prevent crucial damages in industrial applications.Also detecting the faults in inverter fed IM under variable speed applications under varying load is one of the major issues in industrial drives.As the signatures of electromagnetic field contains the entire data in association with the location of rotor,stator and mechanical parts of the motor,a regular monitoring of fields in the airgap can be used to diagnose the inter-turn fault in the stator winding of IM.In this direction,an IM is modeled with several inter-turn fault severities like 30 turns,15 turns,5 turns&1 turn short using ANSYS Maxwell FEA tool and coupled with ANSYS Simplorer for loading arrangements.The PWM inverter with closed loop speed controlled strategy is implemented in Matlab Simulink and co-simulated with ANSYS Simplorer to integrate all the components in one common simulation platform environment for accurate design&analysis for realistic simulation.Several electromagnetic variables like flux density,flux lines and airgap flux density distribution over the machine are analyzed.The spatial FFT spectrum of radial component of flux density in the airgap contains the information related to the diagnosis of inter-turn fault at the incipient stage.
基金This paper is with National Key Research Plan of China(2016YFB0100600).
文摘Pulse-width sequences are identified as the determining factor for common-mode(CM)voltage,which together with CM path generate CM current.This paper introduces a series of pulse-width modulation(PWM)methods,which are focusing on reducing CM noise of three-phase inverters as motor controller.Firstly,theoretic analysis and PWM reduction methods of CM voltage for general three-phase two-level inverters are introduced.Analysis results indicate that the realization of CM noise reduction should take switching frequency and loop impedance into consideration together to avoid CM resonant phenomenon.The regular three-phase two-level inverter is incapable of eliminating CM voltage because of the limitation of topology.Then,optimal PWM methods applied to for advanced topologies can be utilized to eliminate the CM voltage theoretically.Two typical typologies presented in this paper are three-level inverters and paralleled inverters.Three-level inverters can achieve zero-CM output voltage by selecting zero-CM voltage vectors at the expense of power quality.However,for paralleled inverters,zero-CM PWM method is able to achieve zero CM voltage output,as well as the improved output current harmonics and voltage balancing.
文摘A novel concept of neural network based control in pulse-width modulation(PWM)voltage source inverters is presented.On the one hand,the optimal switching an-gles are obtained in real time by the neural network based controller;on the other hand,the output voltage is ad-justed to fit the expected value by neural network when input voltage or loads change.The structure of neural network is simple and easy to be realized by DSP hard-ware system.No large memory used for the existing opti-mal PWM schemes is required in the system.Theoreticalanlysis of the proposed so-called sparse neural network is provided,and the stability of the system is proved.Un-der the control of neural network the error of output volt-age descends sharply,and the system outputs ac voltage with high precision.
文摘Multilevel inverter has played a vital role in medium and high power applications in the recent years. In this paper, Reduced Switch Count Multi Level Inverter structure (RSCMLI) topology is presented with different pulse width modulation techniques. The harmonic level analysis is carried out for the reduced switch count multilevel inverter with the different PWM technique such as with Alternate Phase Opposition Disposition (APOD) method, In Phase Disposition (IPD) method and multi reference pulse width modulation method for five level, seven level , nine level and eleven level inverter. The simulation results are compared with the cascaded H Bridge Multi Level Inverter (CHBMLI). The nine level RSCMLI inverter with APOD method is used for the Distribution Static Synchronous Compensator (DSTATCOM) application in the nonlinear load connected system for power factor improvement. The result shows that the harmonic level and the number of switches required for RSCMLI is reduced compared to CHBMLI. RSCMLI employed in DSTATCOM improves the power factor and harmonic level of the system when it is connected to the nonlinear load.