分析了LC压控振荡器(VCO)的相位噪声,提出了基于预稳压模块的低噪声低压差线性稳压器(LDO)结构,有效改善了电源噪声对LC VCO相位噪声的影响。设计了低噪声带隙基准电路和低噪声误差放大器,进一步优化LDO的输出噪声。通过调节反馈阻抗网...分析了LC压控振荡器(VCO)的相位噪声,提出了基于预稳压模块的低噪声低压差线性稳压器(LDO)结构,有效改善了电源噪声对LC VCO相位噪声的影响。设计了低噪声带隙基准电路和低噪声误差放大器,进一步优化LDO的输出噪声。通过调节反馈阻抗网络实现LDO输出电压可调,可以满足VCO的不同供电需求。通过改变滤波电容值,验证电源噪声对LC VCO的影响。采用0.35μm CMOS工艺进行了流片,测试结果表明,LDO在10 Hz^100 k Hz之间的输出均方根噪声电压为8.8μV,在-45~85℃温度范围内的温度系数约为43×10-6/℃;LC VCO输出频率范围为2.0~2.4 GHz,调谐范围为18.2%,相位噪声为-110.8 d Bc/Hz@100 k Hz,满足集成锁相环对LC VCO的噪声要求。展开更多
建立了差分互补型电感电容压控振荡器(LC-VCO)的等效分析模型。采用有效截止频率fT,eff来表征MOS管的充放电能力,结合振荡器起振后共模输出电压下降的现象,提出了优化1/f3相位噪声的方法。采用该方法并结合跨导效率gm/ID设计方法,实现了...建立了差分互补型电感电容压控振荡器(LC-VCO)的等效分析模型。采用有效截止频率fT,eff来表征MOS管的充放电能力,结合振荡器起振后共模输出电压下降的现象,提出了优化1/f3相位噪声的方法。采用该方法并结合跨导效率gm/ID设计方法,实现了LC-VCO 1/f3相位噪声的优化,并在0.18μm CMOS工艺上获得验证。结果表明,该优化方法可以使频偏在1 k Hz以内的相位噪声改善2~3 d B,可用于开环LC-VCO作为本振的低功耗无线收发机及高性能晶体振荡器的电路设计中。展开更多
This paper proposes an efficient PSP-based model for cross-coupled metal-oxide-semiconductor field-effect transistors(MOSFETs) with optimized layout in the voltage controlled oscillator(VCO).The model employs a PSP ch...This paper proposes an efficient PSP-based model for cross-coupled metal-oxide-semiconductor field-effect transistors(MOSFETs) with optimized layout in the voltage controlled oscillator(VCO).The model employs a PSP charge model to characterize the bias-dependent extrinsic capacitance instead of numerical functions with strong non-linearity.The simulation convergence is greatly improved by this method.An original scheme is developed to extract the parameters of the PSP charge model based on S-parameters measurement.The interconnection parasitics of the cross-coupled MOSFETs are modeled based on vector fitting.The model is verified with an LC VCO design,and exhibits excellent convergence during simulation.The results show improvements as high as 60.5% and 61.8% in simulation efficiency and accuracy,respectively,indicating that the proposed model better characterizes optimized cross-coupled MOSFETs in advanced radio frequency(RF) circuit design.展开更多
In complementary metal oxide semiconductor (CMOS) nanoscalc technology, power dissipation is becoming important metric. In this work low leakage voltage controlled ring oscillator circuit system was proposed for cri...In complementary metal oxide semiconductor (CMOS) nanoscalc technology, power dissipation is becoming important metric. In this work low leakage voltage controlled ring oscillator circuit system was proposed for critical communication systems with high oscillation frequency. An ideal approach has been presented with substrate biasing technique for reduction of power consumption. The simulation have been completed using cadence virtuoso 45 nm standard CMOS technology at room temperature 27~C with supply voltage Vc^d = 0.7 V. The simulation results suggest that voltage controlled ring oscillator has characterized with efficient low power voltage controlled oscillator (VCO) in term of minimum leakage power (1.23 nW) and maximum oscilla- tion frequency (4.76 GHz) with joint positive channel metal oxide semiconductor and negative channel metal oxide semiconductor (PMOS and NMOS) reverse sub- strate bias technique. PMOS, NMOS and joint reverse body bias techniques have been compared in the presented work.展开更多
A new design for an ultra-low power, low phase noise differential 10 GHz LC voltage-controlled oscillator (VCO) which is biased in the subthreshold regime, is presented in the 0.18 μm CMOS process, for the first time...A new design for an ultra-low power, low phase noise differential 10 GHz LC voltage-controlled oscillator (VCO) which is biased in the subthreshold regime, is presented in the 0.18 μm CMOS process, for the first time. The designed circuit topology is an NMOS only cross-coupled LC-tank VCO which has an extra symmetric centre tapped inductor between the source ends of the cross-coupled transistors. Using this inductor leads to an improvement of the phase noise of VCO about 3.5 dB. At the supply voltage of 0.46 V, the output phase noise is -107.8 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 10.53 GHz, so that the dc power consumption is only 0.346 mW. Tuning range is between 10.53 GHz to 11.35 GHz which is 7.5% and the figure of merit is -193.8 dB, which this result shows that this is the first VCO design in the subthreshold regime at this frequency. This VCO can be used for multi-standard wireless LAN communication protocols 802.11a/b/g easily by a frequency division of 2 or 4 respectively.展开更多
文摘分析了LC压控振荡器(VCO)的相位噪声,提出了基于预稳压模块的低噪声低压差线性稳压器(LDO)结构,有效改善了电源噪声对LC VCO相位噪声的影响。设计了低噪声带隙基准电路和低噪声误差放大器,进一步优化LDO的输出噪声。通过调节反馈阻抗网络实现LDO输出电压可调,可以满足VCO的不同供电需求。通过改变滤波电容值,验证电源噪声对LC VCO的影响。采用0.35μm CMOS工艺进行了流片,测试结果表明,LDO在10 Hz^100 k Hz之间的输出均方根噪声电压为8.8μV,在-45~85℃温度范围内的温度系数约为43×10-6/℃;LC VCO输出频率范围为2.0~2.4 GHz,调谐范围为18.2%,相位噪声为-110.8 d Bc/Hz@100 k Hz,满足集成锁相环对LC VCO的噪声要求。
文摘建立了差分互补型电感电容压控振荡器(LC-VCO)的等效分析模型。采用有效截止频率fT,eff来表征MOS管的充放电能力,结合振荡器起振后共模输出电压下降的现象,提出了优化1/f3相位噪声的方法。采用该方法并结合跨导效率gm/ID设计方法,实现了LC-VCO 1/f3相位噪声的优化,并在0.18μm CMOS工艺上获得验证。结果表明,该优化方法可以使频偏在1 k Hz以内的相位噪声改善2~3 d B,可用于开环LC-VCO作为本振的低功耗无线收发机及高性能晶体振荡器的电路设计中。
基金Project supported by the National Basic Research Program (973) of China (No. 2010CB327403)the National Natural Science Foundation of China (Nos. 61001066 and 61102027)
文摘This paper proposes an efficient PSP-based model for cross-coupled metal-oxide-semiconductor field-effect transistors(MOSFETs) with optimized layout in the voltage controlled oscillator(VCO).The model employs a PSP charge model to characterize the bias-dependent extrinsic capacitance instead of numerical functions with strong non-linearity.The simulation convergence is greatly improved by this method.An original scheme is developed to extract the parameters of the PSP charge model based on S-parameters measurement.The interconnection parasitics of the cross-coupled MOSFETs are modeled based on vector fitting.The model is verified with an LC VCO design,and exhibits excellent convergence during simulation.The results show improvements as high as 60.5% and 61.8% in simulation efficiency and accuracy,respectively,indicating that the proposed model better characterizes optimized cross-coupled MOSFETs in advanced radio frequency(RF) circuit design.
文摘In complementary metal oxide semiconductor (CMOS) nanoscalc technology, power dissipation is becoming important metric. In this work low leakage voltage controlled ring oscillator circuit system was proposed for critical communication systems with high oscillation frequency. An ideal approach has been presented with substrate biasing technique for reduction of power consumption. The simulation have been completed using cadence virtuoso 45 nm standard CMOS technology at room temperature 27~C with supply voltage Vc^d = 0.7 V. The simulation results suggest that voltage controlled ring oscillator has characterized with efficient low power voltage controlled oscillator (VCO) in term of minimum leakage power (1.23 nW) and maximum oscilla- tion frequency (4.76 GHz) with joint positive channel metal oxide semiconductor and negative channel metal oxide semiconductor (PMOS and NMOS) reverse sub- strate bias technique. PMOS, NMOS and joint reverse body bias techniques have been compared in the presented work.
文摘A new design for an ultra-low power, low phase noise differential 10 GHz LC voltage-controlled oscillator (VCO) which is biased in the subthreshold regime, is presented in the 0.18 μm CMOS process, for the first time. The designed circuit topology is an NMOS only cross-coupled LC-tank VCO which has an extra symmetric centre tapped inductor between the source ends of the cross-coupled transistors. Using this inductor leads to an improvement of the phase noise of VCO about 3.5 dB. At the supply voltage of 0.46 V, the output phase noise is -107.8 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 10.53 GHz, so that the dc power consumption is only 0.346 mW. Tuning range is between 10.53 GHz to 11.35 GHz which is 7.5% and the figure of merit is -193.8 dB, which this result shows that this is the first VCO design in the subthreshold regime at this frequency. This VCO can be used for multi-standard wireless LAN communication protocols 802.11a/b/g easily by a frequency division of 2 or 4 respectively.