Non-binary low density parity check (NB-LDPC) codes are considered as preferred candidate in conditions where short/medium codeword length codes and better performance at low signal to noise ratios (SNR) are requi...Non-binary low density parity check (NB-LDPC) codes are considered as preferred candidate in conditions where short/medium codeword length codes and better performance at low signal to noise ratios (SNR) are required. They have better burst error correcting performance, especially with high order Galois fields (GF). A shared comparator (SCOMP) architecture for elementary of check node (ECN)/elementary of variable node (EVN) to reduce decoder complexity is introduced because high complexity of check node (CN) and variable node (VN) prevent NB-LDPC decoder from widely applications. The decoder over GF(16) is based on the extended rain-sum (EMS) algorithm. The decoder matrix is an irregular structure as it can provide better performance than regular ones. In order to provide higher throughput and increase the parallel processing efficiency, the clock which is 8 times of the system frequency is adopted in this paper to drive the CN/VN modules. The decoder complexity can be reduced by 28% from traditional decoder when SCOMP architecture is introduced. The result of synthesis software shows that the throughput can achieve 34 Mbit/s at 10 iterations. The proposed architecture can be conveniently extended to GF such as GF(64) or GF(256). Compared with previous works, the decoder proposed in this paper has better hardware efficiency for practical applications.展开更多
When implementing helicopter-satellite communications, periodical interruption of the received signal is a challenging problem because the communication antenna is intermittently blocked by the rotating blades of the ...When implementing helicopter-satellite communications, periodical interruption of the received signal is a challenging problem because the communication antenna is intermittently blocked by the rotating blades of the helicopter. The helicopter-satellite channel model and the Forward Error Control(FEC) coding countermeasure are presented in this paper. On the basis of this model, Check-Hybrid(CH) Low-Density Parity-Check(LDPC)codes are designed to mitigate the periodical blockage over the helicopter-satellite channels. The CH-LDPC code is derived by replacing part of single parity-check code constraints in a Quasi-Cyclic LDPC(QC-LDPC) code by using more powerful linear block code constraints. In particular, a method of optimizing the CH-LDPC code ensemble by searching the best matching component code among a variety of linear block codes using extrinsic information transfer charts is proposed. Simulation results show that, the CH-LDPC coding scheme designed for the helicopter-satellite channels in this paper achieves more than 25% bandwidth efficiency improvement, compared with the FEC scheme that uses QC-LDPC codes.展开更多
基金supported by the Foundation of the Chinese Academy of Sciences (KGFZD-135-16-015)
文摘Non-binary low density parity check (NB-LDPC) codes are considered as preferred candidate in conditions where short/medium codeword length codes and better performance at low signal to noise ratios (SNR) are required. They have better burst error correcting performance, especially with high order Galois fields (GF). A shared comparator (SCOMP) architecture for elementary of check node (ECN)/elementary of variable node (EVN) to reduce decoder complexity is introduced because high complexity of check node (CN) and variable node (VN) prevent NB-LDPC decoder from widely applications. The decoder over GF(16) is based on the extended rain-sum (EMS) algorithm. The decoder matrix is an irregular structure as it can provide better performance than regular ones. In order to provide higher throughput and increase the parallel processing efficiency, the clock which is 8 times of the system frequency is adopted in this paper to drive the CN/VN modules. The decoder complexity can be reduced by 28% from traditional decoder when SCOMP architecture is introduced. The result of synthesis software shows that the throughput can achieve 34 Mbit/s at 10 iterations. The proposed architecture can be conveniently extended to GF such as GF(64) or GF(256). Compared with previous works, the decoder proposed in this paper has better hardware efficiency for practical applications.
基金supported by the National Natural Science Foundation of China(No.91538203)the new strategic industries development projects of Shenzhen City(No.JCYJ20150403155812833)
文摘When implementing helicopter-satellite communications, periodical interruption of the received signal is a challenging problem because the communication antenna is intermittently blocked by the rotating blades of the helicopter. The helicopter-satellite channel model and the Forward Error Control(FEC) coding countermeasure are presented in this paper. On the basis of this model, Check-Hybrid(CH) Low-Density Parity-Check(LDPC)codes are designed to mitigate the periodical blockage over the helicopter-satellite channels. The CH-LDPC code is derived by replacing part of single parity-check code constraints in a Quasi-Cyclic LDPC(QC-LDPC) code by using more powerful linear block code constraints. In particular, a method of optimizing the CH-LDPC code ensemble by searching the best matching component code among a variety of linear block codes using extrinsic information transfer charts is proposed. Simulation results show that, the CH-LDPC coding scheme designed for the helicopter-satellite channels in this paper achieves more than 25% bandwidth efficiency improvement, compared with the FEC scheme that uses QC-LDPC codes.