A lateral current regulator diode （CRD） with field plates is proposed and experimentally demonstrated. The proposed CFtD is based on the junction field-effect transistor （JFET） structure. A cathode field plate is ...A lateral current regulator diode （CRD） with field plates is proposed and experimentally demonstrated. The proposed CFtD is based on the junction field-effect transistor （JFET） structure. A cathode field plate is adopted to alleviate the channel-length modulation effect and to improve the saturated I-V characteristics. An anode field plate is induced to achieve a high breakdown voltage VB of the CRD. The influence of the key device parameters on the I-V characteristics of the lateral CRD are discussed. Experimental results show that the proposed CRD presents good I-V characteristics with a high VB about 180 V and a low knee voltage （Vk） below 3 V. Furthermore, the proposed CRD has a negative temperature coefficient. The well characteristic of the proposed CRD makes it a cost-effective solution for light-emitting-diode lighting.展开更多
Lateral current spreading in the 4H-SiC Schottky barrier diode(SBD)chip is investigated.The 4H-SiC SBD chips with the same vertical parameters are simulated and fabricated.The results indicate that there is a fixed sp...Lateral current spreading in the 4H-SiC Schottky barrier diode(SBD)chip is investigated.The 4H-SiC SBD chips with the same vertical parameters are simulated and fabricated.The results indicate that there is a fixed spreading resistance at on-state in current spreading region for a specific chip.The linear specific spreading resistance at the on-state is calculated to be 8.6Ω/cm in the fabricated chips.The proportion of the lateral spreading current in total forward current(Psp)is related to anode voltage and the chip area.Psp is increased with the increase in the anode voltage during initial on-state and then tends to a stable value.The stable values of Psp of the two fabricated chips are 32%and 54%.Combined with theoretical analysis,the proportion of the terminal region and scribing trench in a whole chip(Ksp)is also calculated and compared with Psp.The Ksp values of the two fabricated chips are calculated to be 31.94%and 57.75%.The values of Ksp and Psp are close with each other in a specific chip.The calculated Ksp can be used to predict that when the chip area of SiC SBD becomes larger than 0.5 cm2,the value of Psp would be lower than 10%.展开更多
The light extraction efficiency caused by total internal reflection is low. Based on the analysis of the existing technology, a new design scheme is proposed in this paper to improve the light extraction efficiency. T...The light extraction efficiency caused by total internal reflection is low. Based on the analysis of the existing technology, a new design scheme is proposed in this paper to improve the light extraction efficiency. The air gap photonic crystal is embedded on the GaN-based patterned sapphire substrate, which can reduce line misalignment and improve light extraction efficiency. The internal structure of the GaN-based LED epitaxial layer is composed of an electron emission layer, a quantum well in the light-emitting recombination region, and an electron blocking layer. Experimental results show that this method significantly improves the extraction efficiency of LED light.展开更多
A polarization-diversity loop with a silicon waveguide with a lateral p-i-n diode as a nonlinear medium is used to realize polarization insensitive four-wave mixing. Wavelength conversion of seven dual-polarization 16...A polarization-diversity loop with a silicon waveguide with a lateral p-i-n diode as a nonlinear medium is used to realize polarization insensitive four-wave mixing. Wavelength conversion of seven dual-polarization 16-quadrature amplitude modulation(QAM) signals at 16 GBd is demonstrated with an optical signal-to-noise ratio penalty below 0.7 dB. High-quality converted signals are generated thanks to the low polarization dependence(≤0.5 dB) and the high conversion efficiency(CE) achievable. The strong Kerr nonlinearity in silicon and the decrease of detrimental free-carrier absorption due to the reverse-biased p-i-n diode are key in ensuring high CE levels.展开更多
首先介绍了LPIND(Lateral Positive-Intrinsic-Negative Diode)及其在硅基等离子天线方面的应用,并对LPIND进行建模,仿真分析了不同SOI(Silicon On Insulator)埋层材料对LPIND本征区载流子浓度的影响,仿真结果显示,LPIND的自加热效应会...首先介绍了LPIND(Lateral Positive-Intrinsic-Negative Diode)及其在硅基等离子天线方面的应用,并对LPIND进行建模,仿真分析了不同SOI(Silicon On Insulator)埋层材料对LPIND本征区载流子浓度的影响,仿真结果显示,LPIND的自加热效应会降低本征区载流子浓度,通过改变埋层材料,增加埋层的热导率,可以减弱自加热效应。其次给出了LPIND本征区电导率的仿真结果,完成了基于LPIND的半波偶极子天线的设计与仿真,仿真结果显示,本征区电导率和硅衬底厚度会影响天线的回波损耗(S11)。最后总结了降低LPIND静态功耗的有效设计方法。展开更多
基金Supported by the National Natural Science Foundation of China under Grant No 61376080
文摘A lateral current regulator diode （CRD） with field plates is proposed and experimentally demonstrated. The proposed CFtD is based on the junction field-effect transistor （JFET） structure. A cathode field plate is adopted to alleviate the channel-length modulation effect and to improve the saturated I-V characteristics. An anode field plate is induced to achieve a high breakdown voltage VB of the CRD. The influence of the key device parameters on the I-V characteristics of the lateral CRD are discussed. Experimental results show that the proposed CRD presents good I-V characteristics with a high VB about 180 V and a low knee voltage （Vk） below 3 V. Furthermore, the proposed CRD has a negative temperature coefficient. The well characteristic of the proposed CRD makes it a cost-effective solution for light-emitting-diode lighting.
基金This work was supported in part by National Natural Science Foundation of China(62004161)in part by Natural Science Basic Research Plan in Shaanxi Province of China(2020JQ-636)+2 种基金in part by Scientific Research Project of Education Department of Shaanxi Province(20JK0796)in part by Youth talent lift project of Xi’an Science and Technology Association(095920201318)in part by Bidding Project of Shanxi Province(20201101017).
文摘Lateral current spreading in the 4H-SiC Schottky barrier diode(SBD)chip is investigated.The 4H-SiC SBD chips with the same vertical parameters are simulated and fabricated.The results indicate that there is a fixed spreading resistance at on-state in current spreading region for a specific chip.The linear specific spreading resistance at the on-state is calculated to be 8.6Ω/cm in the fabricated chips.The proportion of the lateral spreading current in total forward current(Psp)is related to anode voltage and the chip area.Psp is increased with the increase in the anode voltage during initial on-state and then tends to a stable value.The stable values of Psp of the two fabricated chips are 32%and 54%.Combined with theoretical analysis,the proportion of the terminal region and scribing trench in a whole chip(Ksp)is also calculated and compared with Psp.The Ksp values of the two fabricated chips are calculated to be 31.94%and 57.75%.The values of Ksp and Psp are close with each other in a specific chip.The calculated Ksp can be used to predict that when the chip area of SiC SBD becomes larger than 0.5 cm2,the value of Psp would be lower than 10%.
文摘The light extraction efficiency caused by total internal reflection is low. Based on the analysis of the existing technology, a new design scheme is proposed in this paper to improve the light extraction efficiency. The air gap photonic crystal is embedded on the GaN-based patterned sapphire substrate, which can reduce line misalignment and improve light extraction efficiency. The internal structure of the GaN-based LED epitaxial layer is composed of an electron emission layer, a quantum well in the light-emitting recombination region, and an electron blocking layer. Experimental results show that this method significantly improves the extraction efficiency of LED light.
文摘A polarization-diversity loop with a silicon waveguide with a lateral p-i-n diode as a nonlinear medium is used to realize polarization insensitive four-wave mixing. Wavelength conversion of seven dual-polarization 16-quadrature amplitude modulation(QAM) signals at 16 GBd is demonstrated with an optical signal-to-noise ratio penalty below 0.7 dB. High-quality converted signals are generated thanks to the low polarization dependence(≤0.5 dB) and the high conversion efficiency(CE) achievable. The strong Kerr nonlinearity in silicon and the decrease of detrimental free-carrier absorption due to the reverse-biased p-i-n diode are key in ensuring high CE levels.
文摘首先介绍了LPIND(Lateral Positive-Intrinsic-Negative Diode)及其在硅基等离子天线方面的应用,并对LPIND进行建模,仿真分析了不同SOI(Silicon On Insulator)埋层材料对LPIND本征区载流子浓度的影响,仿真结果显示,LPIND的自加热效应会降低本征区载流子浓度,通过改变埋层材料,增加埋层的热导率,可以减弱自加热效应。其次给出了LPIND本征区电导率的仿真结果,完成了基于LPIND的半波偶极子天线的设计与仿真,仿真结果显示,本征区电导率和硅衬底厚度会影响天线的回波损耗(S11)。最后总结了降低LPIND静态功耗的有效设计方法。
基金Supported by National Natural Science Foundation of China(61404138,61474119,61435012)the National Basic Research Program of China(2013CB64390303)+1 种基金Jilin Provincial Natural Science Foundation(20160101243JC and 20150520105JH)the International Science Technology Cooperation Program of China(2013DFR00730)
