Implementation of low-density parity-check codes decoder for CCSDS standard

The complexity/performance balanced decoder for low-density parity-check （LDPC） codes is preferred in practical wireless communication systems. A low complexity LDPC decoder for the Consultative Committee for Space Data Systems （CCSDS） standard is achieved in DSP. An ap- proximate decoding algorithm, normalized rain-sum algorithm, is used in the implementation for its low amounts of computation. To reduce the performance loss caused by the approximation, the pa- rameters of the normalized min-sum algorithm are determined by calculating and finding the mini- mum value of thresholds through density evolution. The minimum value which indicates the best per- formance of the decoding algorithm is corresponding with the optimized parameters. In implementa- tion, the memory cost is saved by decomposing the parity-check matrix into submatrices to store and the computation of passing message in decoding is accelerated by using the intrinsic function of DSP. The performance of the decoder with optimized factors is simulated and compared with the ideal BP decoder. The result shows they have about the same performance.

Low-Complexity Optimization Algorithm for Irregular Low-Density Parity-Check Codes

A low-complexity algorithm is proposed in this paper in order to optimize irregular low-density parity-check （LDPC） codes.The algorithm proposed can calculate the noise threshold by means of a one-dimensional density evolution and search the optimal degree profiles with fast-convergence differential evolution,so that it has a lower complexity and a faster convergence speed.Simulation resuits show that the irregular LDPC codes optimized by the presented algorithm can also perform better than Turbo codes at moderate block length even with less computation cost.

DESIGN OF LOW-DENSITY PARITY CHECK CODES FOR MIMO SYSTEMS WITH DOUBLY-ITERATIVE RECEIVERS

In this paper, the Multiple Input Multiple Output (MIMO) doubly-iterative receiver which consists of the Probabilistic Data Association detector (PDA) and Low-Density Parity-Check Code (LDPC) decoder is developed. The receiver performs two iterative decoding loops. In the outer loop, the soft information is exchanged between the PDA detector and the LDPC decoder. In the inner loop, it is exchanged between variable node and check node decoders inside the LDPC decoder. On the light of the Extrinsic Information Transfer (EXIT) chart technique, an LDPC code degree profile optimization algorithm is developed for the doubly-iterative receiver. Simulation results show the doubly-receiver with optimized irregular LDPC code can have a better performance than the one with the regular one.

Low-Density Parity-Check Codes: Research Status and Development Direction

In this paper, we conclude five kinds of methods for construction of the regular low-density parity matrix H and three kinds of methods for the construction of irregular low-density parity-check matrix H. Through the analysis of the code rate and parameters of these eight kinds of structures, we find that the construction of low-density parity-check matrix tends to be more flexible and the parameter variability is enhanced. We propose that the current development cost should be lower with the progress of electronic technology and we need research on more practical Low-Density Parity-Check Codes (LDPC). Combined with the application of the quantum distribution key, we urgently need to explore the research direction of relevant theories and technologies of LDPC codes in other fields of quantum information in the future.

Data Gathering in Wireless Sensor Networks Via Regular Low Density Parity Check Matrix

A great challenge faced by wireless sensor networks(WSNs) is to reduce energy consumption of sensor nodes. Fortunately, the data gathering via random sensing can save energy of sensor nodes. Nevertheless, its randomness and density usually result in difficult implementations, high computation complexity and large storage spaces in practical settings. So the deterministic sparse sensing matrices are desired in some situations. However,it is difficult to guarantee the performance of deterministic sensing matrix by the acknowledged metrics. In this paper, we construct a class of deterministic sparse sensing matrices with statistical versions of restricted isometry property(St RIP) via regular low density parity check(RLDPC) matrices. The key idea of our construction is to achieve small mutual coherence of the matrices by confining the column weights of RLDPC matrices such that St RIP is satisfied. Besides, we prove that the constructed sensing matrices have the same scale of measurement numbers as the dense measurements. We also propose a data gathering method based on RLDPC matrix. Experimental results verify that the constructed sensing matrices have better reconstruction performance, compared to the Gaussian, Bernoulli, and CSLDPC matrices. And we also verify that the data gathering via RLDPC matrix can reduce energy consumption of WSNs.

High Robust Broadcasting over DTMB-A with Low-rate LDPC Codes

As the 2nd generation digital terrestrial television broadcasting(DTTB)standard,digital terrestrial/television multimedia broadcasting-advanced(DTMB-A)can provide higher spectrum efficiency and transmission reliability by adopting flexible frame structure and advanced forward error correction coding compared with the 1 st generation DTTB systems.In order to increase the flexibility and robustness of the DTTB network,the frequency reuse scheme of factor one(reuse-1)is proposed,where the same RF channel is used by different stations covering the adjacent service areas.However,it demands a very low carrier-tonoise ratio(C/N)threshold below 0 dB at the DTTB physical layer.In this paper,a robust broadcasting technique is proposed based on DTMB-A with newly designed low-rate low density parity check(LDPC)codes.By adopting quasi-cyclic(QC)Raptor-like structure and progressive lifting method,the high performance low-rate LDPC codes are designed supporting multiple code lengths.Both density-evolution analyses and laboratory measurements demonstrate that DTMB-A with low-rate coding can complete the demodulation reliably with the C/N threshold below0 d B,which is one important necessary condition to support frequency reuse-1 scheme.

JOINT ITERATIVE DECODING FOR SIMPLE-ENCODING SYSTEMATIC IRREGULAR-LDPC-BASED CODED COOPERATION IN NON-IDEAL RELAY CHANNEL

In this paper, a new kind of simple-encoding irregular systematic LDPC codes suitable for one-relay coded cooperation is designed, where the proposed joint iterative decoding is effectively performed in the destination which is in accordance with the corresponding joint Tanner graph characterizing two different component LDPC codes used by the source and relay in ideal and non-ideal relay cooperations. The theoretical analysis and simulations show that the coded cooperation scheme obviously outperforms the coded non-cooperation one under the same code rate and decoding complex. The significant performance improvement can be virtually credited to the additional mutual exchange of the extrinsic information resulted by the LDPC code employed by the source and its counterpart used by the relay in both ideal and non-ideal cooperations.

Weighted symbol-flipping decoding algorithm for nonbinary LDPC codes with flipping patterns

A novel low-complexity weighted symbol-flipping algorithm with flipping patterns to decode nonbinary low-density parity-check codes is proposed. The proposed decoding procedure updates the hard-decision received symbol vector iteratively in search of a valid codeword in the symbol vector space. Only one symbol is flipped in each iteration, and symbol flipping function, which is employed as the symbol flipping metric, combines the number of failed checks and the reliabilities of the received bits and calculated symbols. A scheme to avoid infinite loops and select one symbol to flip in high order Galois field search is also proposed. The design of flipping pattern＇s order and depth, which is dependent of the computational requirement and error performance, is also proposed and exemplified. Simulation results show that the algorithm achieves an appealing tradeoff between performance and computational requirement over relatively low Galois field for short to medium code length.

Quaternion Integers Based Higher Length Cyclic Codes and Their Decoding Algorithm

The decoding algorithm for the correction of errors of arbitrary Mannheim weight has discussed for Lattice constellations and codes from quadratic number fields.Following these lines,the decoding algorithms for the correction of errors of n=p−12 length cyclic codes(C)over quaternion integers of Quaternion Mannheim(QM)weight one up to two coordinates have considered.In continuation,the case of cyclic codes of lengths n=p−12 and 2n−1=p−2 has studied to improve the error correction efficiency.In this study,we present the decoding of cyclic codes of length n=ϕ(p)=p−1 and length 2n−1=2ϕ(p)−1=2p−3(where p is prime integer andϕis Euler phi function)over Hamilton Quaternion integers of Quaternion Mannheim weight for the correction of errors.Furthermore,the error correction capability and code rate tradeoff of these codes are also discussed.Thus,an increase in the length of the cyclic code is achieved along with its better code rate and an adequate error correction capability.

JOINT SOURCE-CHANNEL DECODING OF HUFFMAN CODES WITH LDPC CODES

In this paper, we present a Joint Source-Channel Decoding algorithm (JSCD) for Low-Density Parity Check (LDPC) codes by modifying the Sum-Product Algorithm (SPA) to account for the source redun-dancy, which results from the neighbouring Huffman coded bits. Simulations demonstrate that in the presence of source redundancy, the proposed algorithm gives better performance than the Separate Source and Channel Decoding algorithm (SSCD).

Multistep Linear Programming Approaches for Decoding Low-Density Parity-Check Codes

The problem of improving the performance of linear programming（LP） decoding of low-density parity-check（LDPC） codes is considered in this paper.A multistep linear programming（MLP） algorithm was developed for decoding LDPC codes that includes a slight increase in computational complexity.The MLP decoder adaptively adds new constraints which are compatible with a selected check node to refine the results when an error is reported by the original LP decoder.The MLP decoder result is shown to have the maximum-likelihood（ML） certificate property.Simulations with moderate block length LDPC codes suggest that the MLP decoder gives better performance than both the original LP decoder and the conventional sum-product（SP） decoder.

LDPC Code’s Decoding Algorithms for Wireless Sensor Network:a Brief Review

As an effective error correction technology,the Low Density Parity Check Code(LDPC)has been researched and applied by many scholars.Meanwhile,LDPC codes have some prominent performances,which involves close to the Shannon limit,achieving a higher bit rate and a fast decoding.However,whether these excellent characteristics are suitable for the resource-constrained Wireless Sensor Network(WSN),it seems to be seldom concerned.In this article,we review the LDPC code’s structure brief.ly,and them classify and summarize the LDPC codes’construction and decoding algorithms,finally,analyze the applications of LDPC code for WSN.We believe that our contributions will be able to facilitate the application of LDPC code in WSN.

Study on the Optimized Demodulation and Decoding of the BICM-ID system coded with LDPC

The demodulation and decoding solution commonly used in the bit interleaving code modulation and the LDPC coded demodulation and decoding system of the iterative decoding （BICM-ID） is to report the soft information output from the decoder of the receiver to the demodulator as priori information for completing the decoding. However, this will give rise to the reduction of the minimum Euclidean distances between codes, so that the performances of the system decline under non-fading Gaussian channel. According to this problem, an optimized iterative demodulation decoding solution is proposed and also is analyzed using simulation. The result shows that this solution can improve the demodulation and decoding performances of LDPC coded modulation and demodulation system.

Minimum distances of three families of low-density parity-check codes based on finite geometries

Three families of low-density parity-check （LDPC） codes are constructed based on the totally isotropic subspaces of symplectic, unitary, and orthogonal spaces over finite fields, respectively. The minimum distances of the three families of LDPC codes in some special cases are settled.

Construction of Rate-Compatible(RC) Low-Density Parity-Check(LDPC) Convolutional Codes Based on RC-LDPC Block Codes

In this paper,a family of rate-compatible(RC) low-density parity-check(LDPC) convolutional codes can be obtained from RC-LDPC block codes by graph extension method.The resulted RC-LDPC convolutional codes,which are derived by permuting the matrices of the corresponding RC-LDPC block codes,are systematic and have maximum encoding memory.Simulation results show that the proposed RC-LDPC convolutional codes with belief propagation(BP) decoding collectively offer a steady improvement on performance compared with the block counterparts over the binary-input additive white Gaussian noise channels(BI-AWGNCs).

Area-efficient analog decoder design for low density parity check codes in deep-space applications

Area-efficient design methodology is proposed for the analog decoding implementations of the rate-l/2 accumulate repeat-4 jagged-accumulate （AR4JA） low density parity check （LDPC） code. The proposed approach is designed using optimized decoding architecture and regularized routing network, in such a way that the overall wiring overhead is minimized and the silicon area utilization is significantly improved. The prototyping chip used to verily the approach is tully integrated in a four-metal double-poly 0.35 lam complementary metal oxide semiconductor （CMOS） technology, and includes an input-output interface that maximizes the decoder throughput. The decoding core area is 2.02 mm2 with a post-layout area utilization of 80%. The decoder was successfully tested at the maximum data rate of 10 Mbit/s, with a core power consumption of 6.78 mW at 3.3 V, which corresponds to an energy per decoded bit of 0.677 nJ. The proposed analog LDPC decoder with low processing power and high-reliability is suitable lbr space- and power-constrained spacecraft system.

Quad-Level Cell NAND Design and Soft-Bit Generation for Low-Density Parity-Check Decoding in System-Level Application

QLC（Quad-Level Cell） NAND flash will be one of the future technologies for next generation memory chip after three-dimensional（3D） TLC（Triple-Level Cell） stacked NAND flash. In QLC device, data errors will easily occur because of 2~4 data levels in the limited voltage range. This paper studies QLC NAND technology which is 4 bits per cell. QLC programming methods based on 16 voltage levels and reading method based on ＂half-change＂ Gray coding are researched. Because of the probable error impact of QLC NAND cell＇s voltage change, the solution of generating the soft information after XOR（exclusive OR） the soft bits by internal read mechanism is presented for Low-Density Parity-Check（LDPC） Belief Propagation（BP） decoding in QLC design for its system level application.

Modified Benes network architecture for WiMAX LDPC decoder

A modified Benes network is proposed to be used as an optimal shuffle network in worldwide interoperability for microwave access （WiMAX） low density parity check （LDPC） decoders, When the size of the input is not a power of two, the modified Benes network can achieve the most optimal performance. This modified Benes network is non-blocking and can perform any sorts of permutations, so it can support 19 modes specified in the WiMAX system. Furthermore, an efficient algorithm to generate the control signals for all the 2 × 2 switches in this network is derived, which can reduce the hardware complexity and overall latency of the modified Benes network. Synthesis results show that the proposed control signal generator can save 25.4% chip area and the overall network latency can be reduced by 36. 2%.

Construction of protograph LDPC codes with circular generator matrices

The application of protograph low density parity check （LDPC） codes involves the encoding complexity problem. Since the generator matrices are dense, and if the positions of ＂1＂ s are irregularity, the encoder needs to store every ＂1＂ of the generator matrices by using huge chip area. In order to solve this problem, we need to design the protograph LDPC codes with circular generator matrices. A theorem concerning the circulating property of generator matrices of nonsingular protograph LDPC codes is proposed. The circulating property of generator matrix of nonsingular protograph LDPC codes can be obtained from the corresponding quasi-cyclic parity check matrix. This paper gives a scheme of constructing protograph LDPC codes with circulating generator matrices, and it reveals that the fast encoding algorithm of protograph LDPC codes has lower encoding complexity under the condition of the proposed theorem. Simulation results in ad- ditive white Gaussian noise （AWGN） channels show that the bit error rate （BER） performance of the designed codes based on the proposed theorem is much better than that of GB20600 LDPC codes and Tanner LDPC codes.

QIM digital watermarkingbased on LDPC code and messagepassingunder scalingattacks

Watermarking system based on quantization index modulation （QIM） is increasingly popular in high payload applications,but it is inherently fragile against amplitude scaling attacks.In order to resist desynchronization attacks of QIM digital watermarking,a low density parity check （LDPC） code-aided QIM watermarking algorithm is proposed,and the performance of QIM watermarking system can be improved by incorporating LDPC code with message passing estimation/detection framework.Using the theory of iterative estimation and decoding,the watermark signal is decoded by the proposed algorithm through iterative estimation of amplitude scaling parameters and decoding of watermark.The performance of the proposed algorithm is closer to the dirty paper Shannon limit than that of repetition code aided algorithm when the algorithm is attacked by the additive white Gaussian noise.For constant amplitude scaling attacks,the proposed algorithm can obtain the accurate estimation of amplitude scaling parameters.The simulation result shows that the algorithm can obtain similar performance compared to the algorithm without desynchronization.