Granular power management in a power-efficient system on a chip(SoC)requires multiple integrated voltage regulators with a small area,process scalability,and low supply voltage.Conventional on-chip analog low-dropout ...Granular power management in a power-efficient system on a chip(SoC)requires multiple integrated voltage regulators with a small area,process scalability,and low supply voltage.Conventional on-chip analog low-dropout regulators(ALDOs)can hardly meet these requirements,while digital LDOs(DLDOs)are good alternatives.However,the conventional DLDO,with synchronous control,has inherently slow transient response limited by the power-speed trade-off.Meanwhile,it has a poor power supply rejection(PSR),because the fully turned-on power switches in DLDO are vulnerable to power supply ripples.In this comparative study on DLDOs,first,we compare the pros and cons between ALDO and DLDO in general.Then,we summarize the recent DLDO advanced techniques for fast transient response and PSR enhancement.Finally,we discuss the design trends and possible directions of DLDO.展开更多
A high stabilized low dropout(LDO) voltage regulator fabricated for GPS radio frequency(RF) chip in SMIC 0.18μm CMOS technology is presented.The LDO mainly consists of bandgap reference,error amplifier,resistive feed...A high stabilized low dropout(LDO) voltage regulator fabricated for GPS radio frequency(RF) chip in SMIC 0.18μm CMOS technology is presented.The LDO mainly consists of bandgap reference,error amplifier,resistive feedback network and AC current path.A fast current path is added to improve the performance of LDO's transient response.Equivalent series resistance(ESR)compensation and internal Miller compensation are used to constitute the frequency compensation.The measurement results of the transient response of the output voltage show that it can recover within 2μs with less than 120 mV ripple when the load current is changed from 0 to 100 mA.The total quiescent current of LDO and bandgap reference(without load) is 260 μA.展开更多
This research describes an integrated multi-channel high accuracy current control LED （light emitting diode） driver with low dropout regulator implemented in a 0.35μm TSMC 2P4M CMOS process. With the new trend of b...This research describes an integrated multi-channel high accuracy current control LED （light emitting diode） driver with low dropout regulator implemented in a 0.35μm TSMC 2P4M CMOS process. With the new trend of backlighting applications for mobile electronics and portable devices requiring a smaller size, lower cost, lesser noise and accurate current control LED driver, it came up with the idea of integrating more than one design features within a single chip. The analysis of using a capacitor-less low dropout regulator to power the constant current source has been explored, with the implementation of wide range battery voltage of 3 V to 5 V. Possible load current variations were introduced and verified to output a fixed voltage of 2.8 V. A regulated cascode current mirror structure forms the multi-channel configuration string of LED＇s; the design ensures a current matching of less than 1% error and achieves a high accuracy current control of less than 1% error, regardless of the LED＇s forward voltage variation. Moreover, for high end portable device with multimedia applications, dimming frequency can be set to 10 MHz. In addition, a switching output is a better approach for managing LED＇s contrast and brightness adjustment as well as maximizing power consumption, ensuring longer life for driving string of LEDs.展开更多
This paper presents a capacitor-free CMOS low dropout voltage regulator which has high PSR perfor- mance and low chip area. Pole splitting and gm boosting techniques are employed to achieve good stability. The capacit...This paper presents a capacitor-free CMOS low dropout voltage regulator which has high PSR perfor- mance and low chip area. Pole splitting and gm boosting techniques are employed to achieve good stability. The capacitor-free chip LDO was fabricated in commercial 0.18μm CMOS technology provided by GSMC （Shanghai, China）. Measured results show that the capacitor-free LDO has a stable output voltage 1.79 V, when supply voltage changes from 2.5 to 5 V, and the LDO is capable of driving maximum 100 mA load current. The LDO has high power supply rejection about -79 dB at low frequency and -40 dB at 1 MHz frequency, while sacrifice of the LDO＇s active chip-area is only smaller than 0.02 mm2.展开更多
This paper presents a transient-enhanced NMOS low-dropout regulator （LDO） for portable applications with parallel feedback compensation. The parallel feedback structure adds a dynamic zero to get an adequate phase m...This paper presents a transient-enhanced NMOS low-dropout regulator （LDO） for portable applications with parallel feedback compensation. The parallel feedback structure adds a dynamic zero to get an adequate phase margin with a load current variation from 0 to 1 A. A class-AB error amplifier and a fast charging/discharging unit are adopted to enhance the transient performance. The proposed LDO has been implemented in a 0.35 μm BCD process. From experimental results, the regulator can operate with a minimum dropout voltage of 150 mV at a maximum 1 A load and IQ of 165 μA. Under the full range load current step, the voltage undershoot and overshoot of the proposed LDO are reduced to 38 mV and 27 mV respectively.展开更多
An ultra-low quiescent current low-dropout regulator with small output voltage variations and improved load regulation is presented in this paper. It makes use of dynamically-biased shunt feedback as the buffer stage ...An ultra-low quiescent current low-dropout regulator with small output voltage variations and improved load regulation is presented in this paper. It makes use of dynamically-biased shunt feedback as the buffer stage and the LDO regulator can be stable for all load conditions. The proposed structure also employs a momentarily current-boosting circuit to reduce the output voltage to the normal value when output is switched from full load to no load. The whole circuit is designed in a 0.18 μm CMOS technology with a quiescent current of 550 nA. The maximum output voltage variation is less than 20 mV when used with 1 μF external capacitor.展开更多
This paper presents a fully on-chip NMOS low-dropout regulator（LDO） for portable applications with quasi floating gate pass element and fast transient response.The quasi floating gate structure makes the gate of the...This paper presents a fully on-chip NMOS low-dropout regulator（LDO） for portable applications with quasi floating gate pass element and fast transient response.The quasi floating gate structure makes the gate of the NMOS transistor only periodically charged or refreshed by the charge pump,which allows the charge pump to be a small economical circuit with small silicon area.In addition,a variable reference circuit is introduced enlarging the dynamic range of error amplifier during load transient.The proposed LDO has been implemented in a 0.35 μm BCD process.From experimental results,the regulator can operate with a minimum dropout voltage of 250 mV at a maximum 1 A load and Iq of 395 μA.Under full-range load current step,the voltage undershoot and overshoot of the proposed LDO are reduced to 50 and 26 mV,respectively.展开更多
为提高低压差线性稳压器(Low-DropOut Linear Regulator,LDO)的稳定性并降低前馈电路所产生的噪声,提出了一种生成自适应补偿零点的低噪声前馈电路。该前馈电路通过镜像调整管的负载电流,通过低值反馈电阻形成高增益反馈信号,与LDO输出...为提高低压差线性稳压器(Low-DropOut Linear Regulator,LDO)的稳定性并降低前馈电路所产生的噪声,提出了一种生成自适应补偿零点的低噪声前馈电路。该前馈电路通过镜像调整管的负载电流,通过低值反馈电阻形成高增益反馈信号,与LDO输出电压经反馈网络传递给反馈端的信号耦合形成由负载电容、负载电流控制的可控零点,可有效提高LDO电路整体的稳定性。此外,电路内部加入了产生动态极点的自适应电流补偿电路以保证次极点不会对环路的相位裕度产生影响。基于0.18μm BCD工艺设计,该电路在0~800 mA的宽负载范围、5 V输入3.3 V输出下相位裕度均高于48°,适用负载电容范围≥1μF,同时该LDO在10~100 kHz的频率范围内输出噪声仅为5.0617μVrms。展开更多
基金supported by the National Natural Science Foundation of China(No.61974046)the Provincial Key Research and Development Program of Guangdong(2019B010140002)the Macao Science&Technology Development Fund(FDCT)145/2019/A3 and SKL-AMSV(UM)-2020-2022.
文摘Granular power management in a power-efficient system on a chip(SoC)requires multiple integrated voltage regulators with a small area,process scalability,and low supply voltage.Conventional on-chip analog low-dropout regulators(ALDOs)can hardly meet these requirements,while digital LDOs(DLDOs)are good alternatives.However,the conventional DLDO,with synchronous control,has inherently slow transient response limited by the power-speed trade-off.Meanwhile,it has a poor power supply rejection(PSR),because the fully turned-on power switches in DLDO are vulnerable to power supply ripples.In this comparative study on DLDOs,first,we compare the pros and cons between ALDO and DLDO in general.Then,we summarize the recent DLDO advanced techniques for fast transient response and PSR enhancement.Finally,we discuss the design trends and possible directions of DLDO.
基金Supported by the Communication Systems Project of Jiangsu Department(No.JHB04010)
文摘A high stabilized low dropout(LDO) voltage regulator fabricated for GPS radio frequency(RF) chip in SMIC 0.18μm CMOS technology is presented.The LDO mainly consists of bandgap reference,error amplifier,resistive feedback network and AC current path.A fast current path is added to improve the performance of LDO's transient response.Equivalent series resistance(ESR)compensation and internal Miller compensation are used to constitute the frequency compensation.The measurement results of the transient response of the output voltage show that it can recover within 2μs with less than 120 mV ripple when the load current is changed from 0 to 100 mA.The total quiescent current of LDO and bandgap reference(without load) is 260 μA.
文摘This research describes an integrated multi-channel high accuracy current control LED （light emitting diode） driver with low dropout regulator implemented in a 0.35μm TSMC 2P4M CMOS process. With the new trend of backlighting applications for mobile electronics and portable devices requiring a smaller size, lower cost, lesser noise and accurate current control LED driver, it came up with the idea of integrating more than one design features within a single chip. The analysis of using a capacitor-less low dropout regulator to power the constant current source has been explored, with the implementation of wide range battery voltage of 3 V to 5 V. Possible load current variations were introduced and verified to output a fixed voltage of 2.8 V. A regulated cascode current mirror structure forms the multi-channel configuration string of LED＇s; the design ensures a current matching of less than 1% error and achieves a high accuracy current control of less than 1% error, regardless of the LED＇s forward voltage variation. Moreover, for high end portable device with multimedia applications, dimming frequency can be set to 10 MHz. In addition, a switching output is a better approach for managing LED＇s contrast and brightness adjustment as well as maximizing power consumption, ensuring longer life for driving string of LEDs.
基金Project supported by the National Natural Science Foundation of China(Nos.61036004,61234003,61221004)
文摘This paper presents a capacitor-free CMOS low dropout voltage regulator which has high PSR perfor- mance and low chip area. Pole splitting and gm boosting techniques are employed to achieve good stability. The capacitor-free chip LDO was fabricated in commercial 0.18μm CMOS technology provided by GSMC （Shanghai, China）. Measured results show that the capacitor-free LDO has a stable output voltage 1.79 V, when supply voltage changes from 2.5 to 5 V, and the LDO is capable of driving maximum 100 mA load current. The LDO has high power supply rejection about -79 dB at low frequency and -40 dB at 1 MHz frequency, while sacrifice of the LDO＇s active chip-area is only smaller than 0.02 mm2.
文摘This paper presents a transient-enhanced NMOS low-dropout regulator （LDO） for portable applications with parallel feedback compensation. The parallel feedback structure adds a dynamic zero to get an adequate phase margin with a load current variation from 0 to 1 A. A class-AB error amplifier and a fast charging/discharging unit are adopted to enhance the transient performance. The proposed LDO has been implemented in a 0.35 μm BCD process. From experimental results, the regulator can operate with a minimum dropout voltage of 150 mV at a maximum 1 A load and IQ of 165 μA. Under the full range load current step, the voltage undershoot and overshoot of the proposed LDO are reduced to 38 mV and 27 mV respectively.
文摘An ultra-low quiescent current low-dropout regulator with small output voltage variations and improved load regulation is presented in this paper. It makes use of dynamically-biased shunt feedback as the buffer stage and the LDO regulator can be stable for all load conditions. The proposed structure also employs a momentarily current-boosting circuit to reduce the output voltage to the normal value when output is switched from full load to no load. The whole circuit is designed in a 0.18 μm CMOS technology with a quiescent current of 550 nA. The maximum output voltage variation is less than 20 mV when used with 1 μF external capacitor.
文摘This paper presents a fully on-chip NMOS low-dropout regulator（LDO） for portable applications with quasi floating gate pass element and fast transient response.The quasi floating gate structure makes the gate of the NMOS transistor only periodically charged or refreshed by the charge pump,which allows the charge pump to be a small economical circuit with small silicon area.In addition,a variable reference circuit is introduced enlarging the dynamic range of error amplifier during load transient.The proposed LDO has been implemented in a 0.35 μm BCD process.From experimental results,the regulator can operate with a minimum dropout voltage of 250 mV at a maximum 1 A load and Iq of 395 μA.Under full-range load current step,the voltage undershoot and overshoot of the proposed LDO are reduced to 50 and 26 mV,respectively.
