Application Layer Multicast Model with Low Delay and High Stability

As an alternative of Internet protocol(IP)multicast,application layer multicast(ALM)is widely used with the advantage of simplicity and flexibility.However,the existing problems of large transmission delay and poor stability limit the application and development.In this article,to solve these problems,an ALM model based on node potential(NP)and topological index(TI)is proposed.The proposed model considers the factors of node capability and node distance in constructing and maintaining multicast tree to reduce transmission delay and increase stability,and thus it improves the application level in real-time multimedia multicast.The computer simulations prove that the proposed model reduces the ALM transmission delay,increases multicast tree stability effectively,and improves the ALM performance,and therefore it is suitable to apply in large-scale real-time multimedia environment.

Low-Delay Loop Detection Algorithm for LDPC Codes

Abstract:A low-delay loop detection algorithm for bit-flipping based iteration LDPC decoding is proposed.By introducing the concept of loop characteristic,only the iteration steps with loop characteristics are detected and labeled for the subsequent loop detection.As a result,computation delay is greatly reduced.Furthermore,the position vector for the selected iteration steps is also established to implement loop detection for these iteration steps,which reduces the hardware cost of the loop detection as well.The validity of the proposed algorithm is verified by simulations.

A New Speech Codec Based on ANN with Low Delay

The author designs a new speech codec in this paper, which is based on ANN tocarry out nonlinear prediction . This new codec synthesizes speeches with better quality than theconventional waveform or hybrid codecs does at the same bit rate. Moreover, the most importantcharacteristic of this codec is the low coding delay, which will benefit the enhancement of thespeech communication QoS when we transmit speech signals in IP or ATM networks.

Statistically uniform intra-block refresh algorithm for very low delay video communication

This paper focuses on the mechanism underlying the overall delay of a real-time video communication system from the time of capture at the encoder to the time of display at the decoder. A detailed analysis is presented to illustrate the delay problem. We then describe a statistically uniform intra-block refresh scheme for very low delay video communication. By scattering intra-blocks uniformly into continuous frames, the overall delay is significantly decreased, and object changes in the scene could be presented to the end user instantly. For comparison, the overall delay and the peak signal-to-noise ratio (PSNR) performance are tested. The experiment results show that an average of approximately 0.1 dB PSNR gain on average is obtained relative to random intra-macroblock refresh algorithm in H.264 JM, and the end-to-end delay performance is significantly improved.

High-throughput low-delay MAC protocol for Tera Hertz ultra-high data-rate wireless networks

To address the problems of the present Tera Hertz medium access control（MAC） protocols such as not updating the time slot requests numbers in time, unreasonable superframe structures and not merging time slot requests from the same pair of nodes, high throughput low delay medium access control（HLMAC）, a novel MAC protocol for Tera Hertz ultra-high data-rate wireless networks is proposed. It reduces the data access delay largely with a new superframe structure, from which nodes can get time slot allocation information immediately. The network throughput is also improved with the help of updating time slot requests number and merging time slot requests from the same pair of nodes. The theoretical analysis verifies the effectiveness of HLMAC, and the simulation results show that HLMAC improves the network throughput by 65.7% and decreases the access delay by 30%, as compared to energy and spectrum-aware medium access control（ES-MAC）.

A Novel Rate Control Method for Low Delay Applications

In real time applications, the low delay rate is an important requirement of video coding. We propose a simple low delay rate control method in this paper for such applications. In this method, target bits are divided into two parts: uncontrolled and controlled bits in the frame layer. The first part is assigned to the header, syntax and motion vectors according to that spent in the previous encoded frame. The second part is assigned to DCT coeffcients by employing a rate model for mactorblock Q P determination. Experiments show that the proposed method can achieve better performance compared with that of the test model TMN5 of H .263, and slightly worse performance, but with lower computation complexity, compared with that of the TMN8 of H.263+ .

Novel thioxanthone host material with thermally activated delayed fluorescence for reduced efficiency roll-off of phosphorescent OLEDs

2,7-Di（9,9-dimethyl-9H-fluoren-l-yl）-9H-thioxanthen-9-one （DMBFTX） with thermally activated delayed fluorescence （TADF） was well designed and synthesized. The phosphorescent organic lightemitting device （PHOLED） based on this novel TADF host material displays a stable red phosphorescence region, a peak external quantum efficiency （EQE） value of 12.9% and a low EQE roll-off of 38.8%at a luminance of 10000 cd/m2, which is benefited from the reverse intersystem crossing （RISC） of TADF host and less populated triplet exitons. Notably, the red device based on the TADF host DMBFrX exhibits superior electroluminescence performance and reduced efficiency roll-offcompared with the one hosted by commercially available host 1,3-bis（9-carbazolyl）benzene （mCP）, illustrating the high potential of employing the TADF host material with small energy gap to reduce efficiency roll-off in PHOLED.

A boosted negative bit-line SRAM with write-assisted cell in 45 nm CMOS technology

A new 11 T SRAM cell with write-assist is proposed to improve operation at low supply voltage. In this technique, a negative bit-line voltage is applied to one of the write bit-lines, while a boosted voltage is applied to the other write bit-line where transmission gate access is used in proposed 11 T cell. Supply voltage to one of the inverters is interrupted to weaken the feedback. Improved write feature is attributed to strengthened write access devices and weakened feedback loop of cell at the same time. Amount of boosting required for write performance improvement is also reduced due to feedback weakening, solving the persistent problem of half-selected cells and reliability reduction of access devices with the other suggested boosted and negative bit-line techniques. The proposed design improves write time by 79%, 63% and slower by 52% with respect to LP 10 T, WRE 8 T and 6 T cells respectively. It is found that write margin for the proposed cell is improved by about 4×, 2.4× and 5.37× compared to WRE8 T, LP10 T and 6 T respectively. The proposed cell with boosted negative bit line（BNBL） provides47%, 31%, and 68.4% improvement in write margin with respect to no write-assist, negative bit line（NBL） and boosted bit line（BBL） write-assist respectively. Also, new sensing circuit with replica bit-line is proposed to give a more precise timing of applying boosted voltages for improved results. All simulations are done on TSMC 45 nm CMOS technology.