集成电路中半导体器件的特征尺寸不断减小,集成电路对ESD的冲击更加敏感。静电防护成为集成电路中最重要的可靠性指标之一,ESD保护结构也成为芯片设计中的难题。随着集成电路规模的增大,芯片引脚增多,大量面积被用于ESD保护电路,导致成...集成电路中半导体器件的特征尺寸不断减小,集成电路对ESD的冲击更加敏感。静电防护成为集成电路中最重要的可靠性指标之一,ESD保护结构也成为芯片设计中的难题。随着集成电路规模的增大,芯片引脚增多,大量面积被用于ESD保护电路,导致成本提高。可控硅结构的ESD保护器件相比其他已知保护结构具有最高的单位面积ESD性能,因此成为低成本片上ESD设计方案的首选。针对改进型横向SCR (MLSCR,又称N+桥式SCR)的ESD保护结构,对其关键特性指标结合理论分析与实验数据进行分析。基于某0.18μm 5 V CMOS工艺的流片结果,对SCR结构的工作原理以及关键的触发电压、保持电压参数进行说明,并提出改进方案。展开更多
A robust electron device called the enhanced gated-diode-triggered silicon-controlled rectifier (EGDTSCR) for electrostatic discharge (ESD) protection applications has been proposed and implemented in a 0.18-μm 5-V/2...A robust electron device called the enhanced gated-diode-triggered silicon-controlled rectifier (EGDTSCR) for electrostatic discharge (ESD) protection applications has been proposed and implemented in a 0.18-μm 5-V/24-V BCD process. The proposed EGDTSCR is constructed by adding two gated diodes into a conventional ESD device called the modified lateral silicon-controlled rectifier (MLSCR). With the shunting effect of the surface gated diode path, the proposed EGDTSCR, with a width of 50 μm, exhibits a higher failure current (i.e., 3.82 A) as well as a higher holding voltage (i.e., 10.21 V) than the MLSCR.展开更多
文摘集成电路中半导体器件的特征尺寸不断减小,集成电路对ESD的冲击更加敏感。静电防护成为集成电路中最重要的可靠性指标之一,ESD保护结构也成为芯片设计中的难题。随着集成电路规模的增大,芯片引脚增多,大量面积被用于ESD保护电路,导致成本提高。可控硅结构的ESD保护器件相比其他已知保护结构具有最高的单位面积ESD性能,因此成为低成本片上ESD设计方案的首选。针对改进型横向SCR (MLSCR,又称N+桥式SCR)的ESD保护结构,对其关键特性指标结合理论分析与实验数据进行分析。基于某0.18μm 5 V CMOS工艺的流片结果,对SCR结构的工作原理以及关键的触发电压、保持电压参数进行说明,并提出改进方案。
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61874098 and 61974017)the Fundamental Research Project for Central Universities,China(Grant No.ZYGX2018J025).
文摘A robust electron device called the enhanced gated-diode-triggered silicon-controlled rectifier (EGDTSCR) for electrostatic discharge (ESD) protection applications has been proposed and implemented in a 0.18-μm 5-V/24-V BCD process. The proposed EGDTSCR is constructed by adding two gated diodes into a conventional ESD device called the modified lateral silicon-controlled rectifier (MLSCR). With the shunting effect of the surface gated diode path, the proposed EGDTSCR, with a width of 50 μm, exhibits a higher failure current (i.e., 3.82 A) as well as a higher holding voltage (i.e., 10.21 V) than the MLSCR.
