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Efficient Interconnect Network Model for Linear Circuit Reduction
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作者 陈彬 杨华中 +1 位作者 罗嵘 汪蕙 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2003年第9期916-920,共5页
A new interconnect network model for linear netw ork reduction is presented.In this new model,the ports of the interconnect network are classified into two groups:active and passive ports.After the classification,some... A new interconnect network model for linear netw ork reduction is presented.In this new model,the ports of the interconnect network are classified into two groups:active and passive ports.After the classification,some proprieties of the interconnect network are found to be redundant and pruned before reduction.For common interconnect networks,the scale of reduced models is smaller than 50% of the scale of previous works. 展开更多
关键词 moment matching mpvl process linear circuit reduction
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