Mobility enhancement of strained GaSb p-channel metal-oxide-semiconductor field-effect transistors with biaxial compressive strain

Various biaxial compressive strained GaSb p-channel metal-oxide-semiconductor field-effect transistors （MOSFETs） are experimentally and theoretically investigated, The biaxial compressive strained GaSb MOSFETs show a high peak mobility of 638 cm2/V.s, which is 3.86 times of the extracted mobility of the fabricated GaSb MOSFETs without strain. Meanwhile, first principles calculations show that the hole effective mass of GaSb depends on the biaxial compressive strain. The biaxiai compressive strain brings a remarkable enhancement of the hole mobility caused by a significant reduction in the hole effective mass due to the modulation of the valence bands.

Hot-Carrier Effects on Total Dose Irradiated 65 nm n-Type Metal-Oxide-Semiconductor Field-Effect Transistors

The influence of total dose irradiation on hot-carrier reliability of 65 nm n-type metal-oxide-semiconductor field- effect transistors （nMOSFETs） is investigated. Experimental results show that hot-carrier degradations on ir- radiated narrow channel nMOSFETs are greater than those without irradiation. The reason is attributed to radiation-induced charge trapping in shallow trench isolation （STI）. The electric field in the pinch-off region of the nMOSFET is enhanced by radiation-induced charge trapping in STI, resulting in a more severe hot-carrier effect.

Positive Bias Temperature Instability and Hot Carrier Injection of Back Gate Ultra-thin-body In0.53Ga0.47As-on-Insulator n-Channel Metal-Oxide-Semiconductor Field-Effect Transistor

Ultra-thin-body （UTB） In0.53Ga0.47As-on-insulator （In0.53Ga0.47As-OI） structures with thicknesses of 8 and 15nm are realized by transferring epitaxially grown In0.53Ga0.47As layers to silicon substrates with 15-nmthick A12 03 as a buried oxide by using the direct wafer bonding method. Back gate n-channel metal-oxidesemiconductor field-effect transistors （nMOSFETs） are fabricated by using these In0.53Ga0.47As-OI structures with excellent electrical characteristics. Positive bias temperature instability （PBTI） and hot carrier injection （HCI） characterizations are performed for the In0.53Ga0.47As-OI nMOSFETs. It is confirmed that the In0.53Ga0.47 As-OI nMOSFETs with a thinner body thickness suffer from more severe degradations under both PBTI and HCr stresses. Moreover, the different evolutions of the threshold voltage and the saturation current of the UTB In0.53Ga0.47As-OI nMOSFETs may be due to the slow border traps.

Fabrication and Characterization of 1700 V 4H-SiC Vertical Double-Implanted Metal-Oxide-Semiconductor Field-Effect Transistors

The fabrication and characterization of 1700 V 7 A 4H-SiC vertical double-implanted metal-oxide-semiconductor field-effect transistors （VDMOSFETs） are reported. The drift layer is 17μm in thickness with 5 × 10^15 cm^-3 n-type doping, and the channel length is 1μm. The MOSFETs show a peak mobility of 17cm2/V.s and a typical threshold voltage of 3 V. The active area of 0.028cm2 delivers a forward drain current of 7A at Vcs = 22 V and VDS= 15 V. The specific on-resistance （Ron,sv） is 18mΩ.cm2 at VGS= 22 V and the blocking voltage is 1975 V （IDS 〈 lOOnA） at VGS = 0 V.

Influences of fringing capacitance on threshold voltage and subthreshold swing of a GeOI metal-oxide-semiconductor field-effect transistor

Models of threshold voltage and subthreshold swing, including the fringing-capacitance effects between the gate electrode and the surface of the source/drain region, are proposed. The validity of the proposed models is confirmed by the good agreement between the simulated results and the experimental data. Based on the models, some factors impacting the threshold voltage and subthreshold swing of a GeOI metal-oxide-semiconductor field-effect transistor（MOSFET） are discussed in detail and it is found that there is an optimum thickness of gate oxide for definite dielectric constant of gate oxide to obtain the minimum subthreshold swing. As a result, it is shown that the fringing-capacitance effect of a shortchannel GeOI MOSFET cannot be ignored in calculating the threshold voltage and subthreshold swing.

GaSb p-channel metal-oxide-semiconductor field-effect transistor and its temperature dependent characteristics

GaSb p-channel metal-oxide-semiconductor field-effect transistors （MOSFETs） with an atomic layer deposited Al2O3 gate dielectric and a self-aligned Si-implanted source/drain are experimentally demonstrated. Temperature dependent electrical characteristics are investigated. Different electrical behaviors are observed in two temperature regions, and the un- derlying mechanisms are discussed. It is found that the reverse-bias pn junction leakage of the drain/substrate is the main component of the off-state drain leakage current, which is generation-current dominated in the low temperature regions and is diffusion-current dominated in the high temperature regions. Methods to further reduce the off-state drain leakage current are given.

The study on mechanism and model of negative bias temperature instability degradation in P-channel metal-oxide-semiconductor field-effect transistors

Negative Bias Temperature Instability （NBTI） has become one of the most serious reliability problems of metaloxide-semiconductor field-effect transistors （MOSFETs）. The degradation mechanism and model of NBTI are studied in this paper. From the experimental results, the exponential value 0.25-0.5 which represents the relation of NBTI degradation and stress time is obtained. Based on the experimental results and existing model, the reaction-diffusion model with H^＋ related species generated is deduced, and the exponent 0.5 is obtained. The results suggest that there should be H^＋ generated in the NBTI degradation. With the real time method, the degradation with an exponent 0.5 appears clearly in drain current shift during the first seconds of stress and then verifies that H^＋ generated during NBTI stress.

Modeling electric field of power metal-oxide-semiconductor field-effect transistor with dielectric trench based on Schwarz–Christoffel transformation

A power metal-oxide-semiconductor field-effect transistor(MOSFET) with dielectric trench is investigated to enhance the reversed blocking capability. The dielectric trench with a low permittivity to reduce the electric field at reversed blocking state has been studied. To analyze the electric field, the drift region is segmented into four regions, where the conformal mapping method based on Schwarz–Christoffel transformation has been applied. According to the analysis, the improvement in the electric field for using the low permittivity trench is mainly due to the two electric field peaks generated in the drift region around this dielectric trench. The analytical results of the electric field and the potential models are in good agreement with the simulation results.

Effect of external magnetic field on the instability of THz plasma waves in nanoscale graphene field-effect transistors

The instability of plasma waves in the channel of field-effect transistors will cause the electromagnetic waves with THz frequency.Based on a self-consistent quantum hydrodynamic model,the instability of THz plasmas waves in the channel of graphene field-effect transistors has been investigated with external magnetic field and quantum effects.We analyzed the influence of weak magnetic fields,quantum effects,device size,and temperature on the instability of plasma waves under asymmetric boundary conditions numerically.The results show that the magnetic fields,quantum effects,and the thickness of the dielectric layer between the gate and the channel can increase the radiation frequency.Additionally,we observed that increase in temperature leads to a decrease in both oscillation frequency and instability increment.The numerical results and accompanying images obtained from our simulations provide support for the above conclusions.

Unipolar p-type monolayer WSe_(2) field-effect transistors with high current density and low contact resistance enabled by van der Waals contacts

High-performance field-effect transistors (FETs) based on atomically thin two-dimensional (2D) semiconductors have demonstrated great promise in post-Moore integrated circuits. However, unipolar p-type 2D semiconductor transistors yet remain challenging and suffer from low saturation current density (less than 10 µA·µm^(−1)) and high contact resistance (larger than 100 kΩ·µm), mainly limited by the Schottky barrier induced by the mismatch of the work-functions and the Fermi level pinning at the metal contact interfaces. Here, we overcome these two obstacles through van der Waals (vdW) integration of high work-function metal palladium (Pd) as the contacts onto monolayer WSe2 grown by chemical vapor deposition (CVD) method. We demonstrate unipolar p-type monolayer WSe2 FETs with superior device performance: room temperature on-state current density exceeding 100 µA·µm^(−1), contact resistance of 12 kΩ·µm, on/off ratio over 107, and field-effect hole mobility of ~ 103 cm2·V^(−1)·s^(−1). Electrical transport measurements reveal that the Fermi level pinning effect is completely effectively eliminated in monolayer WSe2 with vdW Pd contacts, leading to a Schottky barrier-free Ohmic contact at the metal-semiconductor junctions. Combining the advantages of large-scale vdW contact strategy and CVD growth, our results pave the way for wafer-scale fabrication of complementary-metal-oxide-semiconductor (CMOS) logic circuits based on atomically thin 2D semiconductors.

Photo-driven fin field-effect transistors

The integration between infrared detection and modern microelectronics offers unique opportunities for compact and high-resolution infrared imaging.However,silicon,the cornerstone of modern microelectronics,can only detect light within a limited wavelength range(<1100 nm)due to its bandgap of 1.12 eV,which restricts its utility in the infrared detection realm.Herein,a photo-driven fin field-effect transistor is presented,which breaks the spectral response constraint of conventional silicon detectors while achieving sensitive infrared detection.This device comprises a fin-shaped silicon channel for charge transport and a lead sulfide film for infrared light harvesting.The lead sulfide film wraps the silicon channel to form a“three-dimensional”infrared-sensitive gate,enabling the photovoltage generated at the lead sulfide-silicon junction to effectively modulate the channel conductance.At room temperature,this device realizes a broadband photodetection from visible(635 nm)to short-wave infrared regions(2700 nm),surpassing the working range of the regular indium gallium arsenide and germanium detectors.Furthermore,it exhibits low equivalent noise powers of 3.2×10^(-12) W·Hz^(-1/2) and 2.3×10^(-11) W·Hz^(-1/2) under 1550 nm and 2700 nm illumination,respectively.These results highlight the significant potential of photo-driven fin field-effect transistors in advancing uncooled silicon-based infrared detection.

Evaluation of a gate-first process for AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors with low ohmic annealing temperature

In this paper, TiN/A1Ox gated A1GaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors （MOS- HFETs） were fabricated for gate-first process evaluation. By employing a low temperature ohmic process, ohmic contact can be obtained by annealing at 600 ℃ with the contact resistance approximately 1.6 Ω.mm. The ohmic annealing process also acts as a post-deposition annealing on the oxide film, resulting in good device performance. Those results demonstrated that the TiN/A1Ox gated MOS-HFETs with low temperature ohmic process can be applied for self-aligned gate AIGaN/GaN MOS-HFETs.

Novel GaN-based double-channel p-heterostructure field-effect transistors with a p-GaN insertion layer

GaN-based p-channel heterostructure field-effect transistors(p-HFETs)face significant constraints on on-state currents compared with n-channel high electron mobility transistors.In this work,we propose a novel double heterostructure which introduces an additional p-GaN insertion layer into traditional p-HFETs.The impact of the device structure on the hole densities and valence band energies of both the upper and lower channels is analyzed by using Silvaco TACD simulations,including the thickness of the upper AlGaN layer and the doping impurities and concentration in the GaN buffer layer,as well as the thickness and Mg-doping concentration in the p-GaN insertion layer.With the help of the p-GaN insertion layer,the C-doping concentration in the GaN buffer layer can be reduced,while the density of the two-dimensional hole gas in the lower channel is enhanced at the same time.This work suggests that a double heterostructure with a p-GaN insertion layer is a better approach to improve p-HFETs compared with those devices with C-doped buffer layer alone.

Effect of spin on the instability of THz plasma waves in field-effect transistors under non-ideal boundary conditions

Terahertz(THz) radiation can be generated due to the instability of THz plasma waves in field-effect transistors(FETs). In this work, we discuss the instability of THz plasma waves in the channel of FETs with spin and quantum effects under non-ideal boundary conditions. We obtain a linear dispersion relation by using the hydrodynamic equation, Maxwell equation and spin equation. The influence of source capacitance, drain capacitance, spin effects, quantum effects and channel width on the instability of THz plasma waves under the non-ideal boundary conditions is investigated in great detail. The results of numerical simulation show that the THz plasma wave is unstable when the drain capacitance is smaller than the source capacitance;the oscillation frequency with asymmetric boundary conditions is smaller than that under non-ideal boundary conditions;the instability gain of THz plasma waves becomes lower under non-ideal boundary conditions. This finding provides a new idea for finding efficient THz radiation sources and opens up a new mechanism for the development of THz technology.

The Bipolar Theory of the Field-Effect Transistor:X.The Fundamental Physics and Theory(All Device Structures)

This paper describes the foundation underlying the device physics and theory of the semiconductor field effect transistor which is applicable to any devices with two carrier species in an electric field. The importance of the boundary conditions on the device current-voltage characteristics is discussed. An illustration is given of the transfer DCIV characteristics computed for two boundary conditions,one on electrical potential,giving much higher drift-limited parabolic current through the intrinsic transistor, and the other on the electrochemical potentials, giving much lower injection-over-thebarrier diffusion-limited current with ideal 60mV per decade exponential subthreshold roll-off, simulating electron and hole contacts. The two-MOS-gates on thin pure-body silicon field-effect transistor is used as examples

The Bipolar Field-Effect Transistor:Ⅰ.Electrochemical Current Theory(Two-MOS-Gates on Pure-Base)

This paper describes the bipolar field-effect transistor （BiFET） and its theory. Analytical solution is ob- tained from partitioning the two-dimensional transistor into two one-dimensional transistors. The analysis employs the parametric surface-electric-potential and the electrochemical （quasi-Fermi） potential-gradient driving force to compute the current. Output and transfer D. C. current and conductance versus voltage are presented over practi- cal ranges of terminal D. C. voltages and device parameters. Electron and hole surface channel currents are pres- ent simultaneously, a new feature which could provide circuit functions in one physical transistor such as the CMOS inverter and SRAM memory.

The Bipolar Field-Effect Transistor:Ⅳ.Short Channel Drift-Diffusion Current Theory(Two-MOS-Gates on Pure-Base)

This paper gives the short channel analytical theory of the bipolar field-effect transistor （BiFET） with the drift and diffusion currents separately computed in the analytical theory. As in the last-month paper which represented the drift and diffusion current by the single electrochemical （potential-gradient） current, the two-dimensional transistor is partitioned into two sections, the source and drain sections, each can operate as the electron or hole emitter or collector under specific combinations of applied terminal voltages. Analytical solution is then obtained in the source and drain sections by separating the two-dimensional trap-free Shockley Equations into two one-dimensional equations parametrically coupled via the surface-electric-potential and by using electron current continuity and hole current continuity at the boundary between the emitter and collector sections. Total and the drift and diffusion components of the electron-channel and hole-channel currents and output and transfer conductances, and the electrical lengths of the two sections are computed and presented in graphs as a function of the D. C. terminal voltages for the model transistor with two identical and connected metal-oxide-silicon-gates （MOS-gates） on a thin pure-silicon base over practical ranges of thicknesses of the silicon base and gate oxide. Deviations of the two-section short-channel theory from the one-section long-channel theory are described.

The Bipolar Field-Effect Transistor: III.Short Channel Electrochemical Current Theory (Two-MOS-Gates on Pure-Base)

This paper describes the short channel theory of the bipolar field-effect transistor （BiFET） by partitioning the transistor into two sections,the source and drain sections,each can operate as the electron or hole emitter or collector under specific combinations of applied terminal voltages. Analytical solution is obtained in the source and drain sections by separating the two-dimensional trap-free Shockley Equations into two one-dimensional equations parametrically coupled via the surface-electric-potential and by using electron current continuity and hole current continuity at the boundary between the emitter and collector sections. Total and electron-hole-channel components of the output and transfer currents and conductances, and the electrical lengths of the two sections are computed and presented in graphs as a function of the D. C. terminal voltages for the model transistor with two identical and connected metal-oxide-silicon-gates （MOS-gates） on a thin pure-silicon base over practical ranges of thicknesses of the silicon base and gate oxide. Deviations of the long physical channel currents and conductances from those of the short electrical channels are reported.

The Theory of Field-Effect Transistors:XI. The Bipolar Electrochemical Currents(1-2-MOS-Gates on Thin-Thick Pure-Impure Base)

The field-effect transistor is inherently bipolar, having simultaneously electron and hole surface and volume channels and currents. The channels and currents are controlled by one or more externally applied transverse electric fields. It has been known as the unipolar field-effect transistor for 55-years since Shockley＇s 1952 invention,because the electron-current theory inevitably neglected the hole current from over-specified internal and boundary conditions, such as the electrical neutrality and the constant hole-electrochemical-potential, resulting in erroneous solutions of the internal and terminal electrical characteristics from the electron channel current alone, which are in gross error when the neglected hole current becomes comparable to the electron current, both in subthreshold and strong inversion. This report presents the general theory, that includes both electron and hole channels and currents. The rectangular （ x, y, z） parallelepiped transistors,uniform in the width direction （z-axis）,with one or two MOS gates on thin and thick,and pure and impure base, are used to illustrate the two-dimensional effects and the correct internal and boundary conditions for the electric and the electron and hole electrochemical potentials. Complete analytical equations of the DC current-voltage characteristics of four common MOS transistor structures are derived without over-specification： the 1-gate on semi-infinite-thick impure-base （the traditional bulk transistor）, the 1-gate on thin impure-silicon layer over oxide-insulated silicon bulk （SOI） ,the 1-gate on thin impure-silicon layer deposited on insulating glass （SOI TFT）, and the 2-gates on thin pure-base （FinFETs）.

The Bipolar Field-Effect Transistor:II.Drift-Diffusion Current Theory(Two-MOS-Gates on Pure-Base)

This paper describes the drift-diffusion theory of the bipolar field-effect transistor （BiFET） with two identical and connected metal-oxide-silicon-gates （MOS-gates） on a thin-pure-base. Analytical solution is obtained by partitioning the two-dimensional transistor into two one-dimensional problems coupled by the parametric sur- face-electric-potential. Total and component output and transfer currents and conductances versus D. C. voltages from the drift-diffusion theory, and their deviations from the electrochemical （quasi-Fermi） potential-gradient theory,are presented over practical ranges of thicknesses of the silicon base and gate oxide. A substantial contri- bution from the longitudinal gradient of the square of the transverse electric field is shown.