In the ultra-thin relaxed SiGe virtual substrates, a strained-Si channel p-type Metal Oxide Semiconductor Field Effect Transistor (p-MOSFET) is presented. Built on strained-Si/240nm relaxed-Si0.8 Ge0.2/ 100nm Low Temp...In the ultra-thin relaxed SiGe virtual substrates, a strained-Si channel p-type Metal Oxide Semiconductor Field Effect Transistor (p-MOSFET) is presented. Built on strained-Si/240nm relaxed-Si0.8 Ge0.2/ 100nm Low Temperature Si (LT-Si)/10nm Si buffer was grown by Molecular Beam Epitaxy (MBE), in which LT-Si layer is used to release stress of the SiGe layer and made it relaxed. Measurement indicates that the strained-Si p-MOSFET's (L=4.2μm) transconductance and the hole mobility are enhanced 30% and 50% respectively, compared with that of conventional bulk-Si. The maximum hole mobility for strained-Si device is 140cm2/Vs. The device performance is comparable to devices achieved on several μm thick composition graded buffers and relaxed-SiGe layer virtual substrates.展开更多
This paper focuses on the study of thermal performances of MOS （metal-oxide-semiconductor） transistors for uncooled infrared bolometer applications. Such devices can be used in various applications both military and...This paper focuses on the study of thermal performances of MOS （metal-oxide-semiconductor） transistors for uncooled infrared bolometer applications. Such devices can be used in various applications both military and civil, such as defence and security, medical applications, industrial surveillance, etc. Series of measurements were conducted to obtain TCC （temperature coefficient of current） versus gate voltage and temperature curves. The TCC is a figure of merit for a device used as the sensitive element in a bolometer that represents its sensitivity to temperature and as such is a good indicator of the detector attainable performance. The measurements were confronted to Atlas simulations, and showed that in the subthreshold region the TCC ranges from 4%/K all the way to 9%/K which represents a great improvement compared to state of the art thermistor bolometers. Analytic expressions of the TCC are also derived from current equations of the MOSFET （MOS field effect transistor） drain current to help understanding the effect of drain to source voltage, mobility, temperature and threshold voltage sensibility to temperature, in all three operation modes of the transistor （subthreshold, ohmic and saturation）. It was also determined that gate length does not have an influence on the TCC until short channel effects are factored in.展开更多
A novel level-shift LDMOS （lateral double-diffused metal oxide semiconductor） structure with the HV （high voltage） -interconnection for a 600 V-HVIC （high voltage integrated circuit） on thick SOI （silicon on in...A novel level-shift LDMOS （lateral double-diffused metal oxide semiconductor） structure with the HV （high voltage） -interconnection for a 600 V-HVIC （high voltage integrated circuit） on thick SOI （silicon on insulator） is proposed. There are two original points in the proposed structure. One is the formation of the double floating p-layers under the HV-interconnection to prevent potential distribution in the drift from disturbing due to the HV-interconnection, and the other is a good combination between the LDMOS structure and multiple trench isolation to obtain the isolation performance over 600 V. From the proposed structure, the high blocking capability of the LDMOS, including both off- and on-breakdown voltages over 600 V and high hot carrier instability, and the isolation performance over 1,200 V can be obtained successfully. This paper will show numerical and experimental results in detail.展开更多
N-type and p-type 6H-SiC metal oxide semiconductor (MOS) capacitor samples are fabricated with a typical method,and the high frequency capacitor voltage (C-V) curves of these samples are measured at temperatures rangi...N-type and p-type 6H-SiC metal oxide semiconductor (MOS) capacitor samples are fabricated with a typical method,and the high frequency capacitor voltage (C-V) curves of these samples are measured at temperatures ranging from 293 to 533 K.There exists huge difference between the n-type and p-type samples.Flat-band voltage shift of the n-type sample becomes larger with temperature rising,but that of the p-type sample have very little change.This may be caused by the residual Al in the p-type oxide.Both types of the SiC samples follow the same rule of flat-band voltage changing with temperature.But their mechanisms are different as temperature is above 453 K.Of both types the p-type SiC is more suitable for high temperature applications.展开更多
基金supported by the National Natural Science Foundation of China(21376261,21173270,21177160)Natural Science Foundation of Beijing,China(2142027)+1 种基金National High-Tech Research and Development Program of China(863)(2013AA065302)Specialized Research Fund for the Doctoral Program of Higher Education,China(20130007110007)~~
文摘In the ultra-thin relaxed SiGe virtual substrates, a strained-Si channel p-type Metal Oxide Semiconductor Field Effect Transistor (p-MOSFET) is presented. Built on strained-Si/240nm relaxed-Si0.8 Ge0.2/ 100nm Low Temperature Si (LT-Si)/10nm Si buffer was grown by Molecular Beam Epitaxy (MBE), in which LT-Si layer is used to release stress of the SiGe layer and made it relaxed. Measurement indicates that the strained-Si p-MOSFET's (L=4.2μm) transconductance and the hole mobility are enhanced 30% and 50% respectively, compared with that of conventional bulk-Si. The maximum hole mobility for strained-Si device is 140cm2/Vs. The device performance is comparable to devices achieved on several μm thick composition graded buffers and relaxed-SiGe layer virtual substrates.
文摘This paper focuses on the study of thermal performances of MOS （metal-oxide-semiconductor） transistors for uncooled infrared bolometer applications. Such devices can be used in various applications both military and civil, such as defence and security, medical applications, industrial surveillance, etc. Series of measurements were conducted to obtain TCC （temperature coefficient of current） versus gate voltage and temperature curves. The TCC is a figure of merit for a device used as the sensitive element in a bolometer that represents its sensitivity to temperature and as such is a good indicator of the detector attainable performance. The measurements were confronted to Atlas simulations, and showed that in the subthreshold region the TCC ranges from 4%/K all the way to 9%/K which represents a great improvement compared to state of the art thermistor bolometers. Analytic expressions of the TCC are also derived from current equations of the MOSFET （MOS field effect transistor） drain current to help understanding the effect of drain to source voltage, mobility, temperature and threshold voltage sensibility to temperature, in all three operation modes of the transistor （subthreshold, ohmic and saturation）. It was also determined that gate length does not have an influence on the TCC until short channel effects are factored in.
文摘A novel level-shift LDMOS （lateral double-diffused metal oxide semiconductor） structure with the HV （high voltage） -interconnection for a 600 V-HVIC （high voltage integrated circuit） on thick SOI （silicon on insulator） is proposed. There are two original points in the proposed structure. One is the formation of the double floating p-layers under the HV-interconnection to prevent potential distribution in the drift from disturbing due to the HV-interconnection, and the other is a good combination between the LDMOS structure and multiple trench isolation to obtain the isolation performance over 600 V. From the proposed structure, the high blocking capability of the LDMOS, including both off- and on-breakdown voltages over 600 V and high hot carrier instability, and the isolation performance over 1,200 V can be obtained successfully. This paper will show numerical and experimental results in detail.
文摘N-type and p-type 6H-SiC metal oxide semiconductor (MOS) capacitor samples are fabricated with a typical method,and the high frequency capacitor voltage (C-V) curves of these samples are measured at temperatures ranging from 293 to 533 K.There exists huge difference between the n-type and p-type samples.Flat-band voltage shift of the n-type sample becomes larger with temperature rising,but that of the p-type sample have very little change.This may be caused by the residual Al in the p-type oxide.Both types of the SiC samples follow the same rule of flat-band voltage changing with temperature.But their mechanisms are different as temperature is above 453 K.Of both types the p-type SiC is more suitable for high temperature applications.
