Modular inverse arithmetic plays an important role in elliptic curve cryptography. Based on the analysis of Montgomery modular inversion algorithm, this paper presents a new dual-field modular inversion algorithm, and...Modular inverse arithmetic plays an important role in elliptic curve cryptography. Based on the analysis of Montgomery modular inversion algorithm, this paper presents a new dual-field modular inversion algorithm, and a novel scalable and unified architecture for Montgomery inverse hardware in finite fields GF(p) and GF(2n) is proposed. Furthermore, this architecture based on the new modular inversion algorithm has been verified by modeling it in Verilog-HDL, and accomplished it under 0.18 μm CMOS technology. The result indicates that our work has better performance and flexibility than other works.展开更多
Based on the analysis of several familiar large integer modular multiplication algorithms, this paper proposes a new Scalable Hybrid modular multiplication (SHyb) algorithm which has scalable operands, and presents an...Based on the analysis of several familiar large integer modular multiplication algorithms, this paper proposes a new Scalable Hybrid modular multiplication (SHyb) algorithm which has scalable operands, and presents an RSA algorithm model with scalable key size. Theoretical analysis shows that SHyb algorithm requires m 2 n /2 + 2miterations to complete an mn-bit modular multiplication with the application of an n-bit modular addition hardware circuit. The number of the required iterations can be reduced to a half of that of the scalable Montgomery algorithm. Consequently, the application scope of the RSA cryptosystem is expanded and its operation speed is enhanced based on SHyb al- gorithm.展开更多
In biology, signal transduction refers to a process by which a cell converts one kind of signal or stimulus into another. It involves ordered sequences of biochemical reactions inside the cell. These cascades of react...In biology, signal transduction refers to a process by which a cell converts one kind of signal or stimulus into another. It involves ordered sequences of biochemical reactions inside the cell. These cascades of reactions are carried out by enzymes and activated by second messengers. Signal transduction pathways are complex in nature. Each pathway is responsible for tuning one or more biological functions in the intracellular environment as well as more than one pathway interact among themselves to carry forward a single biological function. Such kind of behavior of these pathways makes understanding difficult. Hence, for the sake of simplicity, they need to be partitioned into smaller modules and then analyzed. We took VEGF signaling pathway, which is responsible for angiogenesis for this kind of modularized study. Modules were obtained by applying the algorithm of Nayak and De (Nayak and De, 2007) for different complexity values. These sets of modules were compared among themselves to get the best set of modules for an optimal complexity value. The best set of modules compared with four different partitioning algorithms namely, Farhat’s (Farhat, 1998), Greedy (Chartrand and Oellermann, 1993), Kernighan-Lin’s (Kernighan and Lin, 1970) and Newman’s community finding algorithm (Newman, 2006). These comparisons enabled us to decide which of the aforementioned algorithms was the best one to create partitions from human VEGF signaling pathway. The optimal complexity value, on which the best set of modules was obtained, was used to get modules from different species for comparative study. Comparison among these modules would shed light on the trend of development of VEGF signaling pathway over these species.展开更多
Numerous cryptographic algorithms (ElGamal, Rabin, RSA, NTRU etc) require multiple computations of modulo multiplicative inverses. This paper describes and validates a new algorithm, called the Enhanced Euclid Algorit...Numerous cryptographic algorithms (ElGamal, Rabin, RSA, NTRU etc) require multiple computations of modulo multiplicative inverses. This paper describes and validates a new algorithm, called the Enhanced Euclid Algorithm, for modular multiplicative inverse (MMI). Analysis of the proposed algorithm shows that it is more efficient than the Extended Euclid algorithm (XEA). In addition, if a MMI does not exist, then it is not necessary to use the Backtracking procedure in the proposed algorithm;this case requires fewer operations on every step (divisions, multiplications, additions, assignments and push operations on stack), than the XEA. Overall, XEA uses more multiplications, additions, assignments and twice as many variables than the proposed algorithm.展开更多
Static Random Access Memory(SRAM) based Field Programmable Gate Array(FPGA) is widely applied in the field of aerospace, whose anti-SEU(Single Event Upset) capability becomes more and more important. To improve anti-F...Static Random Access Memory(SRAM) based Field Programmable Gate Array(FPGA) is widely applied in the field of aerospace, whose anti-SEU(Single Event Upset) capability becomes more and more important. To improve anti-FPGA SEU capability, the registers of the circuit netlist are tripled and divided into three categories in this study. By the packing algorithm, the registers of triple modular redundancy are loaded into different configurable logic block. At the same time, the packing algorithm considers the effect of large fan-out nets. The experimental results show that the algorithm successfully realize the packing of the register of Triple Modular Redundancy(TMR). Comparing with Timing Versatile PACKing(TVPACK), the algorithm in this study is able to obtain a 11% reduction of the number of the nets in critical path, and a 12% reduction of the time delay in critical path on average when TMR is not considered. Especially, some critical path delay of circuit can be improved about 33%.展开更多
RSA public key crypto system is a relatively safe technology, which is widely used in today’s secure electronic communication. In this paper, a new implementation method to optimize a 1 024 bit RSA processor was pres...RSA public key crypto system is a relatively safe technology, which is widely used in today’s secure electronic communication. In this paper, a new implementation method to optimize a 1 024 bit RSA processor was presented. Basically, a fast modular multiplication architecture based on Montgomery’s algorithm was proposed. Modular exponentiation algorithm scans encryption from right to left, so two modular multiplications can be processed parallel. The new architecture is also fit for an effective I/O interface. The time to calculate a modular exponentiation is about n 2 clock cycles. The proposed architecture has a data rate of 93.7 kb/s for 1 024 bit work with a 100 MHz clock.展开更多
基金Supported by the National High Technology Research and Development Program of China (863 Program) (No. 2008AA01Z103)
文摘Modular inverse arithmetic plays an important role in elliptic curve cryptography. Based on the analysis of Montgomery modular inversion algorithm, this paper presents a new dual-field modular inversion algorithm, and a novel scalable and unified architecture for Montgomery inverse hardware in finite fields GF(p) and GF(2n) is proposed. Furthermore, this architecture based on the new modular inversion algorithm has been verified by modeling it in Verilog-HDL, and accomplished it under 0.18 μm CMOS technology. The result indicates that our work has better performance and flexibility than other works.
文摘Based on the analysis of several familiar large integer modular multiplication algorithms, this paper proposes a new Scalable Hybrid modular multiplication (SHyb) algorithm which has scalable operands, and presents an RSA algorithm model with scalable key size. Theoretical analysis shows that SHyb algorithm requires m 2 n /2 + 2miterations to complete an mn-bit modular multiplication with the application of an n-bit modular addition hardware circuit. The number of the required iterations can be reduced to a half of that of the scalable Montgomery algorithm. Consequently, the application scope of the RSA cryptosystem is expanded and its operation speed is enhanced based on SHyb al- gorithm.
文摘In biology, signal transduction refers to a process by which a cell converts one kind of signal or stimulus into another. It involves ordered sequences of biochemical reactions inside the cell. These cascades of reactions are carried out by enzymes and activated by second messengers. Signal transduction pathways are complex in nature. Each pathway is responsible for tuning one or more biological functions in the intracellular environment as well as more than one pathway interact among themselves to carry forward a single biological function. Such kind of behavior of these pathways makes understanding difficult. Hence, for the sake of simplicity, they need to be partitioned into smaller modules and then analyzed. We took VEGF signaling pathway, which is responsible for angiogenesis for this kind of modularized study. Modules were obtained by applying the algorithm of Nayak and De (Nayak and De, 2007) for different complexity values. These sets of modules were compared among themselves to get the best set of modules for an optimal complexity value. The best set of modules compared with four different partitioning algorithms namely, Farhat’s (Farhat, 1998), Greedy (Chartrand and Oellermann, 1993), Kernighan-Lin’s (Kernighan and Lin, 1970) and Newman’s community finding algorithm (Newman, 2006). These comparisons enabled us to decide which of the aforementioned algorithms was the best one to create partitions from human VEGF signaling pathway. The optimal complexity value, on which the best set of modules was obtained, was used to get modules from different species for comparative study. Comparison among these modules would shed light on the trend of development of VEGF signaling pathway over these species.
文摘Numerous cryptographic algorithms (ElGamal, Rabin, RSA, NTRU etc) require multiple computations of modulo multiplicative inverses. This paper describes and validates a new algorithm, called the Enhanced Euclid Algorithm, for modular multiplicative inverse (MMI). Analysis of the proposed algorithm shows that it is more efficient than the Extended Euclid algorithm (XEA). In addition, if a MMI does not exist, then it is not necessary to use the Backtracking procedure in the proposed algorithm;this case requires fewer operations on every step (divisions, multiplications, additions, assignments and push operations on stack), than the XEA. Overall, XEA uses more multiplications, additions, assignments and twice as many variables than the proposed algorithm.
基金Supported by the National Natural Science Foundation of China(No.61106033)
文摘Static Random Access Memory(SRAM) based Field Programmable Gate Array(FPGA) is widely applied in the field of aerospace, whose anti-SEU(Single Event Upset) capability becomes more and more important. To improve anti-FPGA SEU capability, the registers of the circuit netlist are tripled and divided into three categories in this study. By the packing algorithm, the registers of triple modular redundancy are loaded into different configurable logic block. At the same time, the packing algorithm considers the effect of large fan-out nets. The experimental results show that the algorithm successfully realize the packing of the register of Triple Modular Redundancy(TMR). Comparing with Timing Versatile PACKing(TVPACK), the algorithm in this study is able to obtain a 11% reduction of the number of the nets in critical path, and a 12% reduction of the time delay in critical path on average when TMR is not considered. Especially, some critical path delay of circuit can be improved about 33%.
基金NSF of U nited States under Contract 5 978East Asia and Pacific Program(960 2 485 )
文摘RSA public key crypto system is a relatively safe technology, which is widely used in today’s secure electronic communication. In this paper, a new implementation method to optimize a 1 024 bit RSA processor was presented. Basically, a fast modular multiplication architecture based on Montgomery’s algorithm was proposed. Modular exponentiation algorithm scans encryption from right to left, so two modular multiplications can be processed parallel. The new architecture is also fit for an effective I/O interface. The time to calculate a modular exponentiation is about n 2 clock cycles. The proposed architecture has a data rate of 93.7 kb/s for 1 024 bit work with a 100 MHz clock.
