Implementation and noise optimization of a 433 MHz low power CMOS LNA

A low power 433 MHz CMOS （complementary metal- oxide-semiconductor transistor） low noise amplifier（LNA）, used for an ISM （ industrial-scientific-medical ） receiver, is implemented in a 0. 18 μm SMIC mixed-signal and RF （ radio frequency） CMOS process. The optimal noise performance of the CMOS LNA is achieved by adjusting the source degeneration inductance and by inserting an appropriate capacitance in parallel with the input transistor of the LNA. The measured results show that at 431 MHz the LNA has a noise figure of 2.4 dB. The S21 is equal to 16 dB, S11 = -11 dB, S22 = -9 dB, and the inverse isolation is 35 dB. The measured input 1-dB compression point （PtdB） and input third-order intermodulation product （IIP3）are - 13 dBm and -3 dBm, respectively. The chip area is 0. 55 mm × 1.2 mm and the DC power consumption is only 4 mW under a 1.8 V voltage supply.

Optimization of Vibration and Noise Performance of Permanent Magnet Synchronous Motor for Electric Vehicles

In the design of the motor used for electric vehicles(EVS),vibration and noise problems are often ignored,which reduce the reliability and service life of the motor.In this paper,an interior permanent magnet synchronous motor(IPMSM)with high power density is taken as an example,and its electromagnetic vibration and noise problem is investigated and optimized.Firstly,the factors that generate the electromagnetic force harmonic of IPMSM are analyzed by theoretical derivation.Furthermore,the mode and electromagnetic harmonic distribution of the motor are calculated and analyzed by establishing the electromagnetic-structure-sound coupling simulation model.Then,by combining finite element method(FEM)with modern optimization algorithm,an electromagnetic vibration and noise performance optimization method is proposed in the electromagnetic design stage of the motor.Finally,an IPMSM is optimized by this method for electromagnetic vibration and noise performance.The results of comparison between before and after optimization prove the feasibility of the method.

A Systematical Approach for Noise in CMOS LNA

A systematic approach is used to analyze the noise in CMOS low noise amplifier(LNA),including channel noise and induced gate noise in MOS devices.A new analytical formula for noise figure is proposed.Based on this formula,the impacts of distributed gate resistance and intrinsic channel resistance on noise performance are discussed.Two kinds of noise optimization approaches are performed and applied to the design of a 5 2GHz CMOS LNA.

A Low-Noise Readout Circuit for Gyroscopes

In order to suppress the noise of gyroscopes,the method based on lock-in amplifier and capacitor matching of the low-noise readout circuit is proposed. Firstly,the principle to suppress the noise by lock-in amplifier is analyzed,and the noise model of front end is proposed. Secondly,the noise optimization for the charge amplifier is presented according to the noise model of front end. Finally,a readout circuit is constructed by this approach. The measurement results show that the parasitic capacitance of front end is 18 p F,and the noise at resonant frequency( 4 k Hz) is 133 n V / Hz1 / 2,and the overall bias stability is 30° /h,and the noise level is 0. 003° /( s·Hz1 / 2). The noise of the gyroscope with the low-noise readout by this method is suppressed effectively.

Nonvanishing optimal noise in cellular automaton model of self-propelled particles

A minimal cellular automaton model is introduced to describe the collective motion of self-propelled particles on two-dimensional square lattice. The model features discretization of directional and positional spaces and single-particle occupation on one lattice site. Contrary to the Vicsek model and its variants, our model exhibits the nonvanishing optimal noise. When the particle density increases, the collective motion is promoted with optimal noise strength and reduced with noise strength out of optimal region. In addition, when the square lattice undergoes edge percolation process, no abrupt change of alignment behaviors is observed at the critical point of percolation.

A Fully Integrated CMOS Readout Circuit for Particle Detectors

Novel schemes for a charge sensitive amplifier （CSA） and a CR-（RC）, semi-Gaussian shaper in a fully integrated CMOS readout circuit for particle detectors are presented. The CSA is designed with poly-resistors as feedback components to reduce noise. Compared with conventional CSA, the input referred equivalent noise charge（ENC） is simulated to be reduced from 5036e to 2381e with a large detector capacitance of 150pF at the cost of 0.5V output swing loss. The CR-（RC）,semi-Gaussian shaper uses MOS transistors in the triode region in series with poly-resistors to compensate process variation without much linearity reduction.

Direct and noisy transitions in a model shear flow

The transition to turbulence in flows where the laminar profile is linearly stable requires perturbations of finite amplitude. ＂Optimal＂ perturbations are distinguished as extrema of certain functionals, and different functionals give different optima. We here discuss the phase space structure of a 2D simplified model of the transition to turbulence and discuss optimal perturbations with respect to three criteria： energy of the initial condition, energy dissipation of the initial condition, and amplitude of noise in a stochastic transition. We find that the states triggering the transition are different in the three cases, but show the same scaling with Reynolds number.

SNR Improvement of QEPAS System by Preamplifier Circuit Optimization and Frequency Locked Technique

Preamplifier circuit noise is of great importance in quartz enhanced photoacoustic spectroscopy （QEPAS） system. In this paper, several noise sources are evaluated and discussed in detail. Based on the noise characteristics, the corresponding noise reduction method is proposed. In addition, a frequency locked technique is introduced to further optimize the QEPAS system noise and improve signal, which achieves a better performance than the conventional frequency scan method. As a result, the signal-to-noise ratio （SNR） could be increased 14 times by utilizing frequency locked technique and numerical averaging technique in the QEPAS system for water vapor detection.

Two different LNA optimizing techniques

Two different LNA design techniques,namely the classical two-port technique and the Shaeffer technique, have been introduced,compared and implemented for practical design.Their merits and drawbacks are also discussed.This paper mainly focuses on the former technique,which is seldom introduced in traditional papers. Since a parasitic capacitor of the transistor is included in the computation of the former technique,the errors caused by the ignorance of the capacitor have been minimized,which is superior to traditional techniques.Using the former technique,a fully integrated LNA is realized with only 1.4 dB while drawing 1.3 mA DC at 2.4 GHz for simulation results.Another version of the LNA is designed using the latter technique,which has been fabricated.