With the improvement of the performance of all components of computers ,Shared Bus, which is the kernelof the traditional computer architecture,has gradually become the bottleneck of the system. This paper presents th...With the improvement of the performance of all components of computers ,Shared Bus, which is the kernelof the traditional computer architecture,has gradually become the bottleneck of the system. This paper presents thelimitations of the Shared Bus. From analyzing the new specifications of the bus ,which are used to solve the bottleneckbrought by shared bus ,it sums up the characteristics of the new technologies from their orientations in the level of thearchitecture. Then by analyzing and comparing the advantages of each new technology ,this paper points out the neworientation of the bus technology.展开更多
The paper discusses a new kind of driving the LCD via I/O bus using CPLD and realizing the precise I/Ocontrol timing sequence by establishing the corresponding Verilog-HDL model. The results of application show thatth...The paper discusses a new kind of driving the LCD via I/O bus using CPLD and realizing the precise I/Ocontrol timing sequence by establishing the corresponding Verilog-HDL model. The results of application show thatthis solution can not only solve the matching of low-speed device with high-speed bus but also provide the display in-terface during the motherboard debugging process, and also prove that the whole system is reliable and stable.展开更多
文摘With the improvement of the performance of all components of computers ,Shared Bus, which is the kernelof the traditional computer architecture,has gradually become the bottleneck of the system. This paper presents thelimitations of the Shared Bus. From analyzing the new specifications of the bus ,which are used to solve the bottleneckbrought by shared bus ,it sums up the characteristics of the new technologies from their orientations in the level of thearchitecture. Then by analyzing and comparing the advantages of each new technology ,this paper points out the neworientation of the bus technology.
文摘The paper discusses a new kind of driving the LCD via I/O bus using CPLD and realizing the precise I/Ocontrol timing sequence by establishing the corresponding Verilog-HDL model. The results of application show thatthis solution can not only solve the matching of low-speed device with high-speed bus but also provide the display in-terface during the motherboard debugging process, and also prove that the whole system is reliable and stable.
