An On-chip Interconnection QoS Verification Platform of Processor of Large Data for Architectural Modeling Analysis

This paper presents introduction for a QoS verification of on-chip interconnection based on the new progress of the industry, which combined with an AMD processor chip design for big data. Some verification experience in architectural modeling and simulation of on-chip interconnection is also introduced in this paper.

Channel-Selectable Optical Link Based on a Silicon Microring for on-Chip Interconnection

A channel-selectable optical link based on a silicon microring resonator is proposed and demonstrated.This optical link consists of the wavelength-tunable microring modulators and the filters,defined on a silicon-on-insulator(SOI)platform.With a p–i–n junction embedded in the microring modulator,light at the resonant wavelength of the ring resonator is modulated.The 2^(nd)-order microring add-drop filter routes the modulated light.The channel selectivity is demonstrated by heating the microrings.With a thermal tuning efficiency of 5.9 mW/nm,the filter drop port response was successfully tuned with 0.8 nm channel spacing.We also show that modulation can be achieved in these channels.This device aims to offer flexibility and increase the bandwidth usage efficiency in optical interconnection.

Decentralized Optimal Control and Stabilization of Interconnected Systems With Asymmetric Information

The paper addresses the decentralized optimal control and stabilization problems for interconnected systems subject to asymmetric information.Compared with previous work,a closed-loop optimal solution to the control problem and sufficient and necessary conditions for the stabilization problem of the interconnected systems are given for the first time.The main challenge lies in three aspects:Firstly,the asymmetric information results in coupling between control and estimation and failure of the separation principle.Secondly,two extra unknown variables are generated by asymmetric information(different information filtration)when solving forward-backward stochastic difference equations.Thirdly,the existence of additive noise makes the study of mean-square boundedness an obstacle.The adopted technique is proving and assuming the linear form of controllers and establishing the equivalence between the two systems with and without additive noise.A dual-motor parallel drive system is presented to demonstrate the validity of the proposed algorithm.

On-Chip Micro Temperature Controllers Based on Freestanding Thermoelectric Nano Films for Low-Power Electronics

Multidimensional integration and multifunctional com-ponent assembly have been greatly explored in recent years to extend Moore’s Law of modern microelectronics.However,this inevitably exac-erbates the inhomogeneity of temperature distribution in microsystems,making precise temperature control for electronic components extremely challenging.Herein,we report an on-chip micro temperature controller including a pair of thermoelectric legs with a total area of 50×50μm^(2),which are fabricated from dense and flat freestanding Bi2Te3-based ther-moelectric nano films deposited on a newly developed nano graphene oxide membrane substrate.Its tunable equivalent thermal resistance is controlled by electrical currents to achieve energy-efficient temperature control for low-power electronics.A large cooling temperature difference of 44.5 K at 380 K is achieved with a power consumption of only 445μW,resulting in an ultrahigh temperature control capability over 100 K mW^(-1).Moreover,an ultra-fast cooling rate exceeding 2000 K s^(-1) and excellent reliability of up to 1 million cycles are observed.Our proposed on-chip temperature controller is expected to enable further miniaturization and multifunctional integration on a single chip for microelectronics.

Silicon-based optoelectronic heterogeneous integration for optical interconnection

The performance of optical interconnection has improved dramatically in recent years.Silicon-based optoelectronic heterogeneous integration is the key enabler to achieve high performance optical interconnection,which not only provides the optical gain which is absent from native Si substrates and enables complete photonic functionalities on chip,but also improves the system performance through advanced heterogeneous integrated packaging.This paper reviews recent progress of silicon-based optoelectronic heterogeneous integration in high performance optical interconnection.The research status,development trend and application of ultra-low loss optical waveguides,high-speed detectors,high-speed modulators,lasers and 2D,2.5D,3D and monolithic integration are focused on.

High-intensity spatial-mode steerable frequency up-converter toward on-chip integration

Integrated photonic devices are essential for on-chip optical communication,optical-electronic systems,and quantum information sciences.To develop a high-fidelity interface between photonics in various frequency domains without disturbing their quantum properties,nonlinear frequency conversion,typically steered with the quadratic(χ2)process,should be considered.Furthermore,another degree of freedom in steering the spatial modes during theχ2 process,with unprecedent mode intensity is proposed here by modulating the lithium niobate(LN)waveguide-based inter-mode quasi-phasematching conditions with both temperature and wavelength parameters.Under high incident light intensities(25 and 27.8 dBm for the pump and the signal lights,respectively),mode conversion at the sum-frequency wavelength with sufficient high output power(−7–8 dBm)among the TM01,TM10,and TM00 modes is realized automatically with characterized broad temperature(ΔT≥8°C)and wavelength windows(Δλ≥1 nm),avoiding the previous efforts in carefully preparing the signal or pump modes.The results prove that high-intensity spatial modes can be prepared at arbitrary transparent wavelength of theχ2 media toward on-chip integration,which facilitates the development of chip-based communication and quantum information systems because spatial correlations can be applied to generate hyperentangled states and provide additional robustness in quantum error correction with the extended Hilbert space.

Research on Scheduling Strategy of Flexible Interconnection Distribution Network Considering Distributed Photovoltaic and Hydrogen Energy Storage

Distributed photovoltaic(PV)is one of the important power sources for building a new power system with new energy as the main body.The rapid development of distributed PV has brought new challenges to the operation of distribution networks.In order to improve the absorption ability of large-scale distributed PV access to the distribution network,the AC/DC hybrid distribution network is constructed based on flexible interconnection technology,and a coordinated scheduling strategy model of hydrogen energy storage(HS)and distributed PV is established.Firstly,the mathematical model of distributed PV and HS system is established,and a comprehensive energy storage system combining seasonal hydrogen energy storage(SHS)and battery(BT)is proposed.Then,a flexible interconnected distribution network scheduling optimization model is established to minimize the total active power loss,voltage deviation and system operating cost.Finally,simulation analysis is carried out on the improved IEEE33 node,the NSGA-II algorithm is used to solve specific examples,and the optimal scheduling results of the comprehensive economy and power quality of the distribution network are obtained.Compared with the method that does not consider HS and flexible interconnection technology,the network loss and voltage deviation of this method are lower,and the total system cost can be reduced by 3.55%,which verifies the effectiveness of the proposed method.

Optimizing Power Flow in Northern Cameroon’s Interconnected Grid: Challenges and Solutions

This paper presents an analysis of the power flow within the Northern Interconnected Grid of Cameroon. The Newton-Raphson method has been performed, known for its accuracy, under MATLAB software, to model and solve complex power flow equations. This study simulates a series of outage scenarios to evaluate the responsiveness of the grid. The results obtained underline the crucial importance of reactive power management and highlight the urgent need to consolidate the grid infrastructure of North Cameroon. To increase grid resilience and stability, the paper recommends the strategic integration of renewables and the development of interconnections with other power grids. These measures are presented as viable solutions to meet current and future energy distribution challenges, ensuring a reliable and sustainable power supply for Cameroon.

Design of unidirectional emission silicon/llI-V laser for on-chip interconnects

We propose a unidirectional emission silicon/ III-V laser, which comprises an III-V quantum wells microdisk connected to an output waveguide and a siliconon-insulator （SOI） waveguide. Characteristics of the III-V microdisk with an output waveguide and mode coupling between the III-V output waveguide and the SO1 waveguide are investigated by three-dimensional （3D） finite-difference time-domain （FDTD） method. Simulation results show that the Q factor of a coupled mode for a 7.5 μm diameter microdisk connected to a 0.5 μm wide output waveguide is about 8.5×10^4. And the coupling efficiency between the III-V output waveguide and the SO1 waveguide is over 96% when the III-V waveguide width is 0.5 μm, the SO1 waveguide width is 0.565 μm and the vertical gap between those two waveguides is 0.1μm. The proposed hybrid laser would be of valuable applications for on-chip interconnects.

Thermal effect analysis of silicon microring optical switch for on-chip interconnect

The silicon microring resonator plays an important role in large-scale,high-integrability modern switching matrixes and optical networks,as silicon photonics enables ring resonators of an unprecedented compact size.But as the nature of resonators is their sensitivity to temperature,their performances are vulnerable to being affected by thermal effect.In this paper,we analyze the dominant thermal effects to the application of silicon microring optical switch.On the one hand we theoretically analyze and experimentally measure the thermal crosstalk among adjacent microring optical switches with different distances,and give possible solutions to minimize the affect of thermal crosstalk.On the other hand we analyze and measure the thermooptic dynamic response of microring switch;the experiment shows for the thermal-tuning that the rising edge is around 2/is,and the falling edge is around 35 μs.We give the explanation of the asymmetric rise-time and fall-time.

A Single Mode Hybrid Ⅲ-Ⅴ/Silicon On-Chip Laser Based on Flip-Chip Bonding Technology for Optical Interconnection

A single mode hybrid Ⅲ-Ⅴ/silicon on-chip laser based on the flip-chip bonding technology for on-chip optical interconnection is demonstrated. A single mode Fabry-Perot laser structure with micro-structures on an InP ridge waveguide is designed and fabricated on an InP/AIGaInAs multiple quantum well epitaxial layer structure wafer by using i-line lithography. Then, a silicon waveguide platform including a laser mounting stage is designed and fabricated on a silicon-on-insulator substrate. The single mode laser is flip-chip bonded on the laser mounting stage. The lasing light is butt-coupling to the silicon waveguide. The laser power output from a silicon waveguide is 1.3roW, and the threshold is 37mA at room temperature and continuous wave operation.

Process variation robust current-mode on-chip interconnect signaling scheme

We propose a novel bias circuit, which can help a promising current-mode signaling （CMS） scheme （CMS-bias） enhance the robustness against process variation but consume less energy than the original bias circuit in this scheme. Monte Carlo and process corner analysis are carried out using HSPICE in the Global Foundry 0.18 μm process. Monte Carlo analysis shows that the CMS-bias with proposed bias circuit （CMS-proposed） and the CMS-bias with original circuit （CMS-original） have the same robustness against the variation, but the former offer a 9% reduction in power consumption. The process corner analysis shows that the average power and delay of the CMS-proposed don＇t change much in different process corners, especially in FS and SF corner. In addition, parameter sensitivity analysis shows that the process variation in long wires has little influence on the delay of the CMS scheme, but the variation in the effective length of MOSFETs influences the performance of the CMS scheme very much.

Analysis of on-chip distributed interconnects based on Pade expansion

In this paper, on-chip interconnects are modeled as distributed parameter RLCG transmission lines, based on which the matrix ABCD of interconnects is deduced. With help of the ABCD matrix, a voltage transfer function of an interconnect system, consisting of a driver, interconnect line and load, is obtained analytically in the form of a transcendental function, and it is reduced to a finite order system based on high order Pade approximation. With the reduced-order transfer function, response waveforms with step input can be obtained, and signal delay can be calculated consequently. Two numerical experiments are conducted to demonstrate its efficiency.

Coordinated planning for flexible interconnection and energy storage system in low-voltage distribution networks to improve the accommodation capacity of photovoltaic

The increasing proportion of distributed photovoltaics(DPVs)and electric vehicle charging stations in low-voltage distribution networks(LVDNs)has resulted in challenges such as distribution transformer overloads and voltage violations.To address these problems,we propose a coordinated planning method for flexible interconnections and energy storage systems(ESSs)to improve the accommodation capacity of DPVs.First,the power-transfer characteristics of flexible interconnection and ESSs are analyzed.The equipment costs of the voltage source converters(VSCs)and ESSs are also analyzed comprehensively,considering the differences in installation and maintenance costs for different installation locations.Second,a bilevel programming model is established to minimize the annual comprehensive cost and yearly total PV curtailment capacity.Within this framework,the upper-level model optimizes the installation locations and capacities of the VSCs and ESSs,whereas the lower-level model optimizes the operating power of the VSCs and ESSs.The proposed model is solved using a non-dominated sorting genetic algorithm with an elite strategy(NSGA-II).The effectiveness of the proposed planning method is validated through an actual LVDN scenario,which demonstrates its advantages in enhancing PV accommodation capacity.In addition,the economic benefits of various planning schemes with different flexible interconnection topologies and different PV grid-connected forms are quantitatively analyzed,demonstrating the adaptability of the proposed coordinated planning method.

Review of trans-Mediterranean power grid interconnection:a regional roadmap towards energy sector decarbonization

Climate change is becoming an important issue in all fields of infrastructure development.Electricity plays a core role in the decarbonized energy system’s path to a regional zero-emission pattern.A well-built trans-Mediterranean backbone grid can hedge the profound evolution of regional power generation,transmission,and consumption.To date,only Turkey and the Maghreb countries(i.e.,Morocco,Algeria,and Tunisia)are connected with the Continental European Synchronous Area.Other south-and east-shore countries have insufficient interconnection infrastructures and synchronization difficulties that have proven to be major hurdles to the implementation of large-scale solar and wind projects and achievement of climate goals.This study analyzes the current trans-boundary grid interconnections and power and carbon emission portfolios in the Mediterranean region.To align with the recently launched new climate target‘Fit for 55’program and the accelerated large-scale renewables target,a holistic review of projected trans-Mediterranean grids and their market,technical,and financial obstacles of implementation was conducted.For south-and east-shore countries,major legal and regulatory barriers encompassing non-liberalized market structure,regulation gaps of taxation and transmission tariffs,and the private sector’s access rights need to be removed.Enhancement of domestic grids,substations,and harmonized grid codes and frequency,voltage,and communication technology standards among all trans-Mediterranean countries are physical prerequisites for implementing the Trans-Mediterranean Electricity Market.In addition,the mobilization of capital instruments along with private and international investments is indispensable for the realization of supranational transmission projects.As the final section of the decarbonization roadmap,the development of electric appliances,equipment,and vehicles with higher efficiency is inevitable in the decarbonized building,transportation,and industry sectors.

Power Optimization Cooperative Control Strategy for Flexible Fast Interconnection Device with Energy Storage

With the wide application of renewable energy power generation technology,the distribution network presents the characteristics of multi-source and complex structure.There are potential risks in the stability of power system,and the problem of power quality is becoming more and more serious.This paper studies and proposes a power optimization cooperative control strategy for flexible fast interconnection device with energy storage,which combines the flexible interconnection technology with the energy storage device.The primary technology is to regulate the active and reactive power of the converter.By comparing the actual power value of the converter with the reference value,the proportional integral(PI)controller is used for correction,and the current components of d and q axes are obtained and input to the converter as the reference value of the current inner loop.The control strategy in this paper can realize power mutual aid between feeders,and at the same time,the energy storage device can provide or absorb a certain amount of power for feeders,so that the power grid can realize stable operation in a certain range.

Electrical analysis of single-walled carbon nanotube as gigahertz on-chip interconnects

The single-walled carbon nanotube （SWCNT） is a promising nanostructure in the design of future high- frequency system-on-chip, especially in network-on-chip, where the quality of communication between intellectual property （IP） modules is a major concern. Shrinking dimensions of circuits and systems have restricted the use of high-frequency signal characteristics for frequencies up to 1000 GHz. Four key electrical parameters, impedance, propagation constant, current density, and signal delay time, which are crucial in the design of a high-quality interconnect, are derived for different structural configurations of SWCNT. Each of these parameters exhibits strong dependence on the frequency range over which the interconnect is designed to operate, as well as on the configuration of SWCNT. The novelty of the proposed model for solving next-generation high-speed integrated circuit （IC） interconnect challenges is illustrated, compared with existing theoretical and experimental results in the literature.

IMC-skeletons reinforced high-temperature interconnections through low-temperature TLP bonding and micron composite solders

The traditional nano-sintering or TLP techniques are generally expensive,time-consuming,and hence unsuitable for realizing practical mass production.Herein,we have developed an improved TLP process to rapidly produce IMC-skeleton structures across the bonding region by initiating a localized liquid-solid interaction among micron particles at traditional soldering temperatures.The developed IMC skeletons can reinforce solder alloys and provide remarkable mechanical stability and electrical capabilities at high temperatures.As a result,the IMC-skeleton strengthened interconnections exhibited higher thermal/electrical conductivity,lower hardness and almost doubled strength than traditional full-IMC joints,attaining 87.4 MPa and 30.2 MPa at room condition and 350℃.Meanwhile,the necessary heating time to form metallurgical bonds was shortened,one-fifth of nano-sintering and one-tenth of TLP bonding,and the material cost was significantly reduced.This proposed technique enabled the fast,low-cost manufacturing of electronics that can serve at temperatures as high as 200−350℃.Besides,the interfacial reactions among particles and the correlated phase evolution process were studied in this research.The formation mechanism of IMC skeletons was analyzed.The correlated influencing factors and their effect on the mechanical,thermal and electrical properties of joints were revealed,which may help the design and extensive uses of such techniques in various high-temperature/power applications.

A Scalable Interconnection Scheme in Many-Core Systems

Recent architectures of multi-core systems may have a relatively large number of cores that typically ranges from tens to hundreds;therefore called many-core systems.Such systems require an efficient interconnection network that tries to address two major problems.First,the overhead of power and area cost and its effect on scalability.Second,high access latency is caused by multiple cores’simultaneous accesses of the same shared module.This paper presents an interconnection scheme called N-conjugate Shuffle Clusters(NCSC)based on multi-core multicluster architecture to reduce the overhead of the just mentioned problems.NCSC eliminated the need for router devices and their complexity and hence reduced the power and area costs.It also resigned and distributed the shared caches across the interconnection network to increase the ability for simultaneous access and hence reduce the access latency.For intra-cluster communication,Multi-port Content Addressable Memory(MPCAM)is used.The experimental results using four clusters and four cores each indicated that the average access latency for a write process is 1.14785±0.04532 ns which is nearly equal to the latency of a write operation in MPCAM.Moreover,it was demonstrated that the average read latency within a cluster is 1.26226±0.090591 ns and around 1.92738±0.139588 ns for read access between cores from different clusters.

Approach to Simplify the Development of IoT Systems that Interconnect Embedded Devices Using a Single Program

Many Internet of Things(IoT)systems are based on the intercommunication among different devices and centralized systems.Nowadays,there are several commercial and research platforms available to simplify the creation of such IoT systems.However,developing these systems can often be a tedious task.To address this challenge,a proposed solution involves the implementation of a unified program or script that encompasses the entire system,including IoT devices functionality.This approach is based on an abstraction,integrating the control of the devices in a single program through a programmable object.Subsequently,the proposal processes the unified script to generate the centralized system code and a controller for each device.By adopting this approach,developers will be able to create IoT systems with significantly reduced implementation costs,surpassing current platforms by more than 10%.The results demonstrate that the single program approach can significantly accelerate the development of IoT systems relying on device communication.