Novel Optical Analog-To-Digital Converter Based on Optical Time Division Multiplexing

A novel optical analog-to-digital converter based on optical time division multiplexing(OTDM) is described which uses electrooptic sampling and time-demultiplexing together with multiple electronic analog-to-digital converter(ADC). Compared with the previous scheme, the time-division multiplexer and the time-division demultiplexer are applied in the optical analog-to-digital converter(OADC) at the same time, the design of the OADC is simplified and the performance of the OADC based on time-division demultiplexer is improved. A core optical part of the system is demonstrated with a sample rate of 10 Gs/s. The signals in three channels are demultiplexed from the optical pulses.The result proves our scheme is feasible.

A Novel All-Optical Analog-to-Digital Converter

An all-optical analog-to-digital converter capable of sampling at 50GS/s is described. The ADC works in the frequency domain. The RF signal is sampled by electro-optically steerable gratings and quantized by a set of detectors with scalable apertures.

A 5MS/s 12-Bit Successive Approximation Analog-to-Digital Converter

With the continuous development of science and technology, digital signal processing is more and more widely used in various fields. Among them, the analog-to-digital converter (ADC) is one of the key components to convert analog signals to digital signals. As a common type of ADC, 12-bit sequential approximation analog-to-digital converter (SAR ADC) has attracted extensive attention for its performance and application. This paper aims to conduct in-depth research and analysis of 12-bit SAR ADC to meet the growing demands of digital signal processing. This article designs a 12-bit, successive approximation analog-to-digital converter (SAR ADC) with a sampling rate of 5 MS/s. The overall circuit adopts a fully differential structure, with key modules including DAC capacitor array, comparator, and control logic. According to the DAC circuit in this paper, a fully differential capacitor DAC array structure is proposed to reduce the area of layout DAC. The comparator uses a digital dynamic comparator to improve the ADC conversion speed. The chip is designed based on the SMIC180 nm CMOS process. The simulation results show that when the sampling rate is 5 MS/s, the effective bit of SAR ADC is 11.92 bit, the SNR is 74.62 dB, and the SFDR is 89.24 dB.

An Electroabsorption Modulator Monolithically Integrated with a Semiconductor Optical Amplifier and a Dual-Waveguide Spot-Size Converter

A semiconductor optical amplifier and electroabsorption modulator monolithically integrated with a spotsize converter input and output is fabricated by means of selective area growth,quantum well intermixing,and asymmetric twin waveguide technology. A 1550-1600nm lossless operation with a high DC extinction ratio of 25dB and more than 10GHz 3dB bandwidth are successfully achieved. The output beam divergence angles of the device in the horizontal and vertical directions are as small as 7.3°× 18.0°, respectively, resulting in a 3.0dB coupling loss with a cleaved single-mode optical fiber.

Mismatch Calibration Techniques in Successive Approximation Analog-to-Digital Converters

Comparator offset cancellation and capacitor self-calibration techniques used in a successive approximation analog-to-digital converter （SA-ADC） are described. The calibration circuit works in parallel with the SAADC by adding additional calibration clock cycles to pursue high accuracy and low power consumption, and the calibrated resolution can be up to 14bit. This circuit is used in a 10bit 3Msps successive approximation ADC. This chip is realized with an SMIC 0. 18μm 1.8V process and occupies 0.25mm^2 . It consumes 3. 1mW when operating at 1.8MHz. The measured SINAD is 55. 9068dB, SFDR is 64. 5767dB, and THD is - 74. 8889dB when sampling a 320kHz sine wave.

Asymmetrical mirror optimization for a 140 GHz TE_(22,6) quasi-optical mode converter system

We introduce an asymmetrical mirror design to a 140 GHz TE_（22,6） quasi-optical（QO） mode converter system to correct the asymmetry of the beam＇s field distribution caused by the Denisov launcher. By such optimization, the output beam with better symmetrical distribution is obtained at the system＇s output window. Based on the calculated results,the QO mode converter system＇s performance is already satisfying without iterative phase correction. Scalar and vector correlation coefficients between the output beam and the fundamental Gaussian beam are respectively 98.4% and 93.0%,while the total power transmission efficiency of the converter system is 94.4%. The assistance of optical ray tracing to the design of such QO mode converters is introduced and discussed as well.

Overview of Energy-Efficient Successive-Approximation Analog-to-Digital Converters: State-of-the-Art and a Design Example

This paper makes a review of state-of-the- arts designs of successive-approximation register analog-to-digital converters （SAR ADCs）. Methods and technique specifications are collected in view of innovative ideas. At the end of this paper, a design example is given to illustrate the procedure to design an SAR ADC. A new method, which extends the width of the internal clock, is also proposed to facilitate different sampling frequencies, which provides more time for the digital-to-analog convert （DAC） and comparator to settle. The 10 bit ADC is simulated in 0.13 μm CMOS process technology. The signal-to-noise and distortion ratio （SNDR） is 54.41 dB at a 10 MHz input with a 50 MS/s sampling rate, and the power is 330 μW.

Effect of ionizing radiation on dual 8-bit analog-to-digital converters (AD9058) with various dose rates and bias conditions

The radiation effects on several properties （reference voltage, digital output logic voltage, and supply current） of dual 8-bit analog-to-digital （A/D） converters （AD9058） under various biased conditions are investigated in this paper. Gamma ray and 10-MeV proton irradiation are selected for a detailed evaluation and comparison. Based on the measurement results induced by the gamma ray with various dose rates, the devices exhibit enhanced low dose rate sensitivity （ELDRS） under zero and working bias conditions. Meanwhile, it is obvious that the ELDRS is more severe under the working bias condition than under the zero bias condition. The degradation of AD9058 does not display obvious ELDRS during 10-MeV proton irradiation with the selected flux.

All optical wavelength converter and its application in optical network

All optical network （AON） is a hot topic in recent studies of optical fiber communications. Key techniques in AON include optical switching/routing, optical cross connection （OXC）, all optical wavelength conversion （AOWC）, all optical buffering, etc. Opti- cal switching/routing is in fact wavelength switching/ routing. OXC and wavelength conversion （WC） are introduced into cross nodes so that a virtual wavelength path is established. With WC, communication route is formed only if there is unused wavelength in an individual segment link. The rate wavelength usage is thus greatly increased. The blocking rate of network can be reduced by adding WCs, especially for huge capacity multiple nodes ones. Therefore, WC has attracted much attention in basic research of optical communication and is used in some experimental networks.This dissertation studies all optic wavelength conversion and its application, with the contributions in the following five aspects.

A 1.5 bit/s Pipelined Analog-to-Digital Converter Design with Independency of Capacitor Mismatch

A new technique which is named charge temporary storage technique (CTST) was presented to improve the linearity of a 1.5 bit/s pipelined analog-to-digital converter (ADC). The residual voltage was obtained from the sampling capacitor, and the other capacitor was just a temporary storage of charge. Then, the linearity produced by the mismatch of these capacitors was eliminated without adding extra capacitor error-averaging amplifiers. The simulation results confirmed the high linearity and low dissipation of pipelined ADCs implemented in CTST, so CTST was a new method to implement high resolution, small size ADCs.

OPTIMIZATION OF WDM OPTICAL PACKET SWITCHES WITH SPARSE WAVELENGTH CONVERTERS AND NON-DEGENERATE FIBER DELAY-LINES

This paper investigates the untraditional approach of contention resolution in Wavelength Division Multiplexing (WDM) Optical Packet Switching (OPS). The most striking characteristics of the developed switch architecture are: (1) Contention resolution is achieved by a combined sharing of Fiber Delay-Lines (FDLs) and Tunable Optical Wavelength Converters (TOWCs); (2) FDLs are arranged in non-degenerate form, i.e., non-uniform distribution of the delay lines; (3) TOWCs just can perform wavelength conversion in partial continuous wavelength channels, i.e., sparse wavelength conversion. The concrete configurations of FDLs and TOWCs are described and analyzed under non-bursty and bursty traffic scenarios. Simulation results demonstrate that for a prefixed packet loss probability constraint, e.g., 10-6, the developed architecture provides a different point of view in OPS design. That is, combined sharing of FDLs and TOWCs can, effectively, obtain a good tradeoff between the switch size and the cost, and TOWCs which are achieved in sparse form can also decrease the implementing complexity.

Hybrid WDM/TDM PON system employing an all-optical wavelength converter

A new hybrid WDM/TDM passive optical network （PON） implemented by using all-optical wavelength converters （AOWCs） is proposed. The AOWCs are based on the cross-gain modulation （XGM） effect of the semiconductor optical amplifier （SOA）. Moreover, the feasibility of this sys- tem is experimentally demonstrated by evaluating the impacts of the optical wavelength conversion, time domain waveforms, eye diagrams and bit-error-rate （BER） in AOWC. The results show that the proposal will be a promising solution for the next generation access networks.

A 71mW 8b 125MSample/s A/D Converter

A 1.8V 8b 125Msample/s pipelined A/D converter is presented.Power efficiency is optimized by size scaling down scheme using low power single stage cascode amplifier with a gain boosted structure.Global clock tree and local generators are employed to avoid loss and overlap of clock period.The ADC achieves a signal-to-noise-and-distortion ratio (SNDR) of 49.5dB(7.9ENOB) for an input of 62MHz at full speed of 125MHz,consuming only 71mW.It is implemented in 0.18μm CMOS technology with a core area of 0.45mm 2.

A 1.8V 10bit 100Msps Pipelined Analog to Digital Converter

A novel low-voltage,low constant-impedance switch is proposed, which not only eliminates the parasitic capacitor but also reduces the variation of switch ＂on＂ resistance. With the gain-boost technology,the operational transconductance amplifier used in this analog-to-digital converter （ADC） achieves enough DC gain and unity-gain frequency under the low voltage supply and to guarantee the performance of the sample and hold circuit （S/H） and the sub-stages. Based on these methods,a 10bit 100Msps pipelined ADC is fabricated in a 0. 18μm CMOS process and operates under a 1.8V voltage supply. The ADC achieves an SNR of 54. 2dB （input frequency of 6.26MHz） and an SNR of 49. 8dB （input frequency of 48. 96MHz） when the sampling frequency is 100MHz.

200Ms/s 177mW 8bit Folding and Interpolating CMOS A/D Converter

A CMOS folding and interpolating analog-to-digital converter (ADC) for embedded application is described.The circuit is fully compatible with standard digital CMOS technology.A modified folding block implemented without resistor contributes to a small chip area.At the input stage,offset averaging reduces the input capacitance and the distributed track-and-hold circuits are proposed to improve signal-to-noise-plus-distortion ratio.The 200Ms/s 8bit ADC with 177mW total power consumption at 3.3V power supply is realized in standard digital 0.18μm 3.3V CMOS technology.

Monolithically Integrated Laser Diode and Electroabsorption Modulator with Dual-Waveguide Spot-Size Converter Output

A 1.60μm laser diode and electroabsorption modulator monolithically integrated with a novel dual-waveguide spot-size converter output for low-loss coupling to a cleaved single-mode optical fiber are demonstrated.The devices emit in a single transverse and quasi single longitudinal mode with an SMSR of 25.6dB.These devices exhibit a 3dB modulation bandwidth of 15.0GHz,and modulator DC extinction ratios of 16.2dB.The output beam divergence angles of the spot-size converter in the horizontal and vertical directions are as small as 7.3°×18.0°,respectively,resulting in a 3.0dB coupling loss with a cleaved single-mode optical fiber.

1.55μm Laser Diode Monolithically Integrated with Spot-Size Converter Using Conventional Process

A novel 1 55μm laser diode with spot size converter is designed and fabricated using conventional photolithography and chemical wet etching process.For the laser diode,a ridge double core structure is employed.For the spot size converter,a buried ridge double core structure is incorporated.The laterally tapered active core is designed and optically combined with the thin and wide passive core to control the size of mode.The laser diode threshold current is measured to be 40mA together with high slop efficiency of 0 35W/A.The beam divergence angles in the horizontal and vertical directions are as small as 14 89°×18 18°,respectively,resulting in low coupling losses with a cleaved optical fiber (3dB loss).

聚合物波导折射率渐变型Spot-size converter设计

围绕光致折射率变化聚甲基苯基硅烷高分子光波导,设计了新型的折射率渐变型 Spot-size converter,可有效改善光纤与光波导的端面耦合效率．BPM 仿真计算显示,耦合效率由78%提高到 91%,为器件制备提供了理论依据．

Impact of optical–electrical conversion responsivity in sub-sampled photonic analog-to-digital converter

This Letter investigates the impact of the photodiode(PD) saturation in a sub-sampled photonic analogto-digital converter(PADC) with two individual pulse lasers. It is essentially proved that when the optical power to the saturated PD increases, the optical–electrical conversion(OEC) responsivity and digitized output power of the PADC decrease. If femtosecond pulses are employed for the PADC sampling clock, the time-stretching process in a dispersive medium is necessary to decrease the impact of the PD saturation. In contrast, when the sampling clock with picosecond pulses is utilized, the PD saturation is more tolerable, and thus, the OEC responsivity can be improved by an increase of the optical power to the PD no matter if the time-stretching process is employed.

Spatial Mode-Division Multiplexing for High-Speed Optical Coherent Detection Systems

Spatial modedivision multiplexing is emerging as a potential solution to further increasing optical fiber capacity and spectral efficiency. We report a dualmode, dualpolarization transmission method based on modeselective excitation and detection over a twomode fiber. In particular, we present 107 Gbit/s coherent optical OFDM （COOFDM） transmission over a 4.5 km twomode fiber using LP and LP. modes in which mode separation is performed optically.