The generation of electricity based on renewable energy sources,parti-cularly Photovoltaic(PV)system has been greatly increased and it is simply insti-gated for both domestic and commercial uses.The power generated fr...The generation of electricity based on renewable energy sources,parti-cularly Photovoltaic(PV)system has been greatly increased and it is simply insti-gated for both domestic and commercial uses.The power generated from the PV system is erratic and hence there is a need for an efficient converter to perform the extraction of maximum power.An improved interleaved Single-ended Primary Inductor-Converter(SEPIC)converter is employed in proposed work to extricate most of power from renewable source.This proposed converter minimizes ripples,reduces electromagnetic interference due tofilter elements and the contin-uous input current improves the power output of PV panel.A Crow Search Algo-rithm(CSA)based Proportional Integral(PI)controller is utilized for controlling the converter switches effectively by optimizing the parameters of PI controller.The optimized PI controller reduces ripples present in Direct Current(DC)vol-tage,maintains constant voltage at proposed converter output and reduces over-shoots with minimum settling and rise time.This voltage is given to single phase grid via 1�Voltage Source Inverter(VSI).The command pulses of 1�VSI are produced by simple PI controller.The response of the proposed converter is thus improved with less input current.After implementing CSA based PI the efficiency of proposed converter obtained is 96%and the Total Harmonic Distor-tion(THD)is found to be 2:4%.The dynamics and closed loop operation is designed and modeled using MATLAB Simulink tool and its behavior is performed.展开更多
A novel current-source active power filter (APF) based on multi-modular converter with carrier phase-shifted SPWM (CPS-SPWM) technique is proposed. With this technique, the effect of equivalent high switching frequenc...A novel current-source active power filter (APF) based on multi-modular converter with carrier phase-shifted SPWM (CPS-SPWM) technique is proposed. With this technique, the effect of equivalent high switching frequency con-verter is obtained with low switching frequency converter. It is very promising in current-source APF that adopt super-conducting magnetic energy storage component.展开更多
In this paper, the design of a coarse-fine interpolation Time-to-Digital Converter (TDC) is implemented in an ALTERA’s Cyclone FPGA. The carry-select chain performs as the tapped delay line. The Logic Array Block (LA...In this paper, the design of a coarse-fine interpolation Time-to-Digital Converter (TDC) is implemented in an ALTERA’s Cyclone FPGA. The carry-select chain performs as the tapped delay line. The Logic Array Block (LAB) having a propagation delay of 165 ps in the chain is synthesized as delay cell. Coarse counters triggered by the global clock count the more significant bits of the time data. This clock is also fed through the delay line, and LABs create the copies. The replicas are latched by the tested event signal, and the less significant bits are encoded from the latched binary bits. Single-shot resolution of the TDC can be 60 ps. The worst Differential Nonlinearity (DNL) is about 0.2 Least Significant Bit (LSB, 165 ps in this TDC module), and the Integral Nonlinearity (INL) is 0.6 LSB. In comparison with other architectures using the synchronous global clock to sample the taps, this architecture consumed less electric power and logic cells, and is more stable.展开更多
Time-to-Digital Converter (TDC) is a key block used as the phase/frequency detector in an All-Digital Phase-Locked Loop (ADPLL). Usually, it occupies a large proportion of ADPLL's total power consumption up to abo...Time-to-Digital Converter (TDC) is a key block used as the phase/frequency detector in an All-Digital Phase-Locked Loop (ADPLL). Usually, it occupies a large proportion of ADPLL's total power consumption up to about 30% to 40%. In this paper, the detailed power consumption of different components in the TDC is analyzed. A Power Management Block (PMB) is presented for the TDC to reduce its power consumption. A 24-bits TDC core with the proposed PMB is implemented in HJTC 0.18 μm CMOS technology. Simulation results show that up to 84% power reduction is achieved using our proposed technique.展开更多
This paper signifies the study of modeling and simulation of a single phase matrix converter for induction heating system. The working principle and the control method, using PID are revealing in detail. The performan...This paper signifies the study of modeling and simulation of a single phase matrix converter for induction heating system. The working principle and the control method, using PID are revealing in detail. The performance of the system is carried out in MATLAB/Simulink environment with pulse width modulation switching strategy by varying the duty cycle. PID control is employed to obtain the better performance for a specified input supply for various output frequencies. The proposed control strategy of AC to AC converter has been discussed with a wide range of operating frequencies and results in low Total Harmonic Distortion.展开更多
In this paper,an optimized Genetic Algorithm(GA)based internal model controller-proportional integral derivative(IMC-PID)controller has been designed for the control variable to output variable transfer function of dc...In this paper,an optimized Genetic Algorithm(GA)based internal model controller-proportional integral derivative(IMC-PID)controller has been designed for the control variable to output variable transfer function of dc-dc boost converter to mitigate the effect of non-minimum phase(NMP)behavior due to the presence of a right-half plane zero(RHPZ).This RHPZ limits the dynamic performance of the converter and leads to internal instability.The IMC PID is a streamlined counterpart of the standard feedback controller and easily achieves optimal set point and load change performance with a single filter tuning parameterλ.Also,this paper addresses the influences of the model-based controller with model plant mismatch on the closed-loop control.The conventional IMC PID design is realized as an optimization problem with a resilient controller being determined through a genetic algorithm.Computed results suggested that GA–IMC PID coheres to the optimum designs with a fast convergence rate and outperforms conventional IMC PID controllers.展开更多
The Brushless DC Motor drive systems are used widely with renewable energy resources.The power converter controlling technique increases the performance by novel techniques and algorithms.Conventional approaches are m...The Brushless DC Motor drive systems are used widely with renewable energy resources.The power converter controlling technique increases the performance by novel techniques and algorithms.Conventional approaches are mostly focused on buck converter,Fuzzy logic control with various switching activity.In this proposed research work,the QPSO(Quantum Particle Swarm Optimization algorithm)is used on the switching state of converter from the generation unit of solar module.Through the duty cycle pulse from optimization function,the MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor)of the Boost converter gets switched when BLDC(Brushless Direct Current Motor)motor drive system requires power.Voltage Source three phase inverter and Boost converter is controlled by proportional-integral(PI)controller.Based on the BLDC drive,the load utilized from the solar generating module.Experimental results analyzed every module of the proposed grid system,which are solar generation utilizes the irradiance and temperature depends on this the Photovoltaics(PV)power is generated and the QPSO with Duty cycle switching state is determined.The Boost converter module is boost stage based on generation and load is obtained.Single Ended Primary Inductor Converter(SEPIC)and Zeta converter model is compared with the proposed logic;the proposed boost converter achieves the results.Three phase inverter control,PI,and BLDC motor drive results.Thus the proposed grid model is constructed to obtain the better performance results than most recent literatures.Overall design model is done by using MATLAB/Simulink 2020a.展开更多
This paper discusses a novel boost single-phase active AC-DC converters, named low-end semi-controlled bridge AC-DC converter. By analysis, its topology and principle can be derived from the conventional single-phase ...This paper discusses a novel boost single-phase active AC-DC converters, named low-end semi-controlled bridge AC-DC converter. By analysis, its topology and principle can be derived from the conventional single-phase power factor corrector ( PFC). But it has also some differences, such as power device positions, inductor type, input voltage waveform detection and induction current detection, so its design is also different. The converter is implemented by employing two current detection approaches, i.e., current transformer detection and shunt resistor detection. Consequently, it can provide a steady DC output voltage with a low voltage ripple, approximately unitary input power factor and 2.5 kW output power. The experimental results show validity of the theoretical analysis.展开更多
In this paper,to study the power loss of converter for elevator,The analysis is to establish relationship between parameters(current,voltages and losses in the inverter and converter) relevant for sizing of major comp...In this paper,to study the power loss of converter for elevator,The analysis is to establish relationship between parameters(current,voltages and losses in the inverter and converter) relevant for sizing of major components of the drive was done.) For high PWM(pulse width modulation) frequency like in elevator applications of fpwm =10kHz,switching losses are dominant and are about 2/3 of the total losses on IGBT switch.Transition from continuous 3 phase to discontinuous 2 phase PWM results in 50% reduction of switching loses on IGBT devices providing that PWM is not done over 60deg angle in a particular phase when current has maximum value.Total losses on IGBT(conduction + switching) are reduced approximately by ~1/3 what is still a significant reduction.Two phase PWM with reduced losses can be used for applications when acoustic noise due to increased current ripple is not significant and fall back solution to regular 3 phase PWM when drive operates under rare extreme conditions resulting in increased heat sink temperature.The analysis will be examined by further laboratory testing simulating 60% duty cycle on a dynamometer.展开更多
文摘The generation of electricity based on renewable energy sources,parti-cularly Photovoltaic(PV)system has been greatly increased and it is simply insti-gated for both domestic and commercial uses.The power generated from the PV system is erratic and hence there is a need for an efficient converter to perform the extraction of maximum power.An improved interleaved Single-ended Primary Inductor-Converter(SEPIC)converter is employed in proposed work to extricate most of power from renewable source.This proposed converter minimizes ripples,reduces electromagnetic interference due tofilter elements and the contin-uous input current improves the power output of PV panel.A Crow Search Algo-rithm(CSA)based Proportional Integral(PI)controller is utilized for controlling the converter switches effectively by optimizing the parameters of PI controller.The optimized PI controller reduces ripples present in Direct Current(DC)vol-tage,maintains constant voltage at proposed converter output and reduces over-shoots with minimum settling and rise time.This voltage is given to single phase grid via 1�Voltage Source Inverter(VSI).The command pulses of 1�VSI are produced by simple PI controller.The response of the proposed converter is thus improved with less input current.After implementing CSA based PI the efficiency of proposed converter obtained is 96%and the Total Harmonic Distor-tion(THD)is found to be 2:4%.The dynamics and closed loop operation is designed and modeled using MATLAB Simulink tool and its behavior is performed.
文摘A novel current-source active power filter (APF) based on multi-modular converter with carrier phase-shifted SPWM (CPS-SPWM) technique is proposed. With this technique, the effect of equivalent high switching frequency con-verter is obtained with low switching frequency converter. It is very promising in current-source APF that adopt super-conducting magnetic energy storage component.
基金Supported by National Natural Science Foundation of China (No. 10405023)Knowledge Innovation Program of The Chinese Academy of Sciences (KJCX2-YW-N27)
文摘In this paper, the design of a coarse-fine interpolation Time-to-Digital Converter (TDC) is implemented in an ALTERA’s Cyclone FPGA. The carry-select chain performs as the tapped delay line. The Logic Array Block (LAB) having a propagation delay of 165 ps in the chain is synthesized as delay cell. Coarse counters triggered by the global clock count the more significant bits of the time data. This clock is also fed through the delay line, and LABs create the copies. The replicas are latched by the tested event signal, and the less significant bits are encoded from the latched binary bits. Single-shot resolution of the TDC can be 60 ps. The worst Differential Nonlinearity (DNL) is about 0.2 Least Significant Bit (LSB, 165 ps in this TDC module), and the Integral Nonlinearity (INL) is 0.6 LSB. In comparison with other architectures using the synchronous global clock to sample the taps, this architecture consumed less electric power and logic cells, and is more stable.
基金Supported by the Tsinghua National Laboratory for Information Science and Technology(TNList)Cross-Discipline Foundationthe National Science and Technology Major Project(No.2010ZX03006-003-01)
文摘Time-to-Digital Converter (TDC) is a key block used as the phase/frequency detector in an All-Digital Phase-Locked Loop (ADPLL). Usually, it occupies a large proportion of ADPLL's total power consumption up to about 30% to 40%. In this paper, the detailed power consumption of different components in the TDC is analyzed. A Power Management Block (PMB) is presented for the TDC to reduce its power consumption. A 24-bits TDC core with the proposed PMB is implemented in HJTC 0.18 μm CMOS technology. Simulation results show that up to 84% power reduction is achieved using our proposed technique.
文摘This paper signifies the study of modeling and simulation of a single phase matrix converter for induction heating system. The working principle and the control method, using PID are revealing in detail. The performance of the system is carried out in MATLAB/Simulink environment with pulse width modulation switching strategy by varying the duty cycle. PID control is employed to obtain the better performance for a specified input supply for various output frequencies. The proposed control strategy of AC to AC converter has been discussed with a wide range of operating frequencies and results in low Total Harmonic Distortion.
文摘In this paper,an optimized Genetic Algorithm(GA)based internal model controller-proportional integral derivative(IMC-PID)controller has been designed for the control variable to output variable transfer function of dc-dc boost converter to mitigate the effect of non-minimum phase(NMP)behavior due to the presence of a right-half plane zero(RHPZ).This RHPZ limits the dynamic performance of the converter and leads to internal instability.The IMC PID is a streamlined counterpart of the standard feedback controller and easily achieves optimal set point and load change performance with a single filter tuning parameterλ.Also,this paper addresses the influences of the model-based controller with model plant mismatch on the closed-loop control.The conventional IMC PID design is realized as an optimization problem with a resilient controller being determined through a genetic algorithm.Computed results suggested that GA–IMC PID coheres to the optimum designs with a fast convergence rate and outperforms conventional IMC PID controllers.
文摘The Brushless DC Motor drive systems are used widely with renewable energy resources.The power converter controlling technique increases the performance by novel techniques and algorithms.Conventional approaches are mostly focused on buck converter,Fuzzy logic control with various switching activity.In this proposed research work,the QPSO(Quantum Particle Swarm Optimization algorithm)is used on the switching state of converter from the generation unit of solar module.Through the duty cycle pulse from optimization function,the MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor)of the Boost converter gets switched when BLDC(Brushless Direct Current Motor)motor drive system requires power.Voltage Source three phase inverter and Boost converter is controlled by proportional-integral(PI)controller.Based on the BLDC drive,the load utilized from the solar generating module.Experimental results analyzed every module of the proposed grid system,which are solar generation utilizes the irradiance and temperature depends on this the Photovoltaics(PV)power is generated and the QPSO with Duty cycle switching state is determined.The Boost converter module is boost stage based on generation and load is obtained.Single Ended Primary Inductor Converter(SEPIC)and Zeta converter model is compared with the proposed logic;the proposed boost converter achieves the results.Three phase inverter control,PI,and BLDC motor drive results.Thus the proposed grid model is constructed to obtain the better performance results than most recent literatures.Overall design model is done by using MATLAB/Simulink 2020a.
文摘This paper discusses a novel boost single-phase active AC-DC converters, named low-end semi-controlled bridge AC-DC converter. By analysis, its topology and principle can be derived from the conventional single-phase power factor corrector ( PFC). But it has also some differences, such as power device positions, inductor type, input voltage waveform detection and induction current detection, so its design is also different. The converter is implemented by employing two current detection approaches, i.e., current transformer detection and shunt resistor detection. Consequently, it can provide a steady DC output voltage with a low voltage ripple, approximately unitary input power factor and 2.5 kW output power. The experimental results show validity of the theoretical analysis.
文摘In this paper,to study the power loss of converter for elevator,The analysis is to establish relationship between parameters(current,voltages and losses in the inverter and converter) relevant for sizing of major components of the drive was done.) For high PWM(pulse width modulation) frequency like in elevator applications of fpwm =10kHz,switching losses are dominant and are about 2/3 of the total losses on IGBT switch.Transition from continuous 3 phase to discontinuous 2 phase PWM results in 50% reduction of switching loses on IGBT devices providing that PWM is not done over 60deg angle in a particular phase when current has maximum value.Total losses on IGBT(conduction + switching) are reduced approximately by ~1/3 what is still a significant reduction.Two phase PWM with reduced losses can be used for applications when acoustic noise due to increased current ripple is not significant and fall back solution to regular 3 phase PWM when drive operates under rare extreme conditions resulting in increased heat sink temperature.The analysis will be examined by further laboratory testing simulating 60% duty cycle on a dynamometer.