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Robust PID controller design for time delay processes with peak of maximum sensitivity criteria 被引量:5
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作者 Mohammad Shamsuzzoha 《Journal of Central South University》 SCIE EI CAS 2014年第10期3777-3786,共10页
The motivation of this work is to obtain single PI/PID tuning formula for different types of processes with enhanced disturbance rejection performance. The proposed tuning formula consistently gives better performance... The motivation of this work is to obtain single PI/PID tuning formula for different types of processes with enhanced disturbance rejection performance. The proposed tuning formula consistently gives better performance in comparison to several well-known methods at the same degree of robustness for stable, integrating and unstable processes. For the selection of the closed-loop time constant(τc), a guideline is provided over a broad range of time-delay/time-constant ratios on the basis of the peak of maximum sensitivity(Ms). An analysis has been performed for the uncertainty margin with the different process parameters for the robust controller design. It gives the guideline of the Ms-value settings for the PI controller designs based on the process parameters uncertainty. Furthermore, a relationship has been developed between Ms-value and uncertainty margin with the different process parameters(k, τ and θ). Simulation study has been conducted for the broad class of processes and the controllers are tuned to have the same degree of robustness by measuring the maximum sensitivity, Ms, in order to obtain a reasonable comparison. 展开更多
关键词 pi/piD controller tuning internal model control(IMC) method unstable delay process integrating delay process disturbance rejection
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Control Algorithm Based on Limit Cycle Oscillator-FLL for UPQC-S with Optimized PI Gains 被引量:2
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作者 Sabha Raj Arya Sayed Javed Alam Papia Ray 《CSEE Journal of Power and Energy Systems》 SCIE CSCD 2020年第3期649-661,共13页
This paper involves a limit cycle oscillator-frequency lock loop(LCO-FLL)based control algorithm for unified power quality controllers-S type(UPQC-S)for compensation of reactive power,to maintain a unity power factor,... This paper involves a limit cycle oscillator-frequency lock loop(LCO-FLL)based control algorithm for unified power quality controllers-S type(UPQC-S)for compensation of reactive power,to maintain a unity power factor,regulate constant voltage at the PCC,mitigate sag,swell and to eliminate harmonics.In this approach,an extraction of fundamental in-phase and quadrature components for the estimation of reference signals are taken from the LCO-FLL circuit.The control LCO-FLL provides a high grade of protection against sag-swell voltages,unbalance loading and harmonics present in the utility grid.In addition to that,it has advantageous characteristics of synchronization with the grid frequency at any previously mentioned conditions without use of phase locked loops or trigonometric functions.Other advantages of the LCO-FLL are to give useful information to estimate fundamental components from a highly polluted grid scenario.The values obtained from the JAYA optimization algorithm are used to fine-tune the proportional integral(PI)controller gains,so that it maintains DC link voltage to the desired level.The mean square error(MSE)is employed as an objective function for optimizing the error between actual and reference values.The control algorithm based on LCO-FLL is developed in MATLAB/Simulink software and it is tested for power conditioning features. 展开更多
关键词 JAYA MSE LCO-FLL pi tuning SAG unbalanced VSC
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