基于PowerDesigner的家庭财务管理系统的数据库设计

该文介绍了基于Power Designer的家庭财务管理系统数据库建模的过程。通过对系统的需求和功能以及数据流程进行分析,设计系统所需数据项和数据结构。在数据库分析的基础上设计系统的实体和关系并使用Power Designer工具建立概念数据模型,逻辑数据模型。根据关系模式以及转换规则得到数据库模式。

A Low-Power-Consumption 9bit 10MS/s Pipeline ADC for CMOS Image Sensors

A low-power-consumption 9bit 10MS/s pipeline ADC,used in a CMOS image sensor,is proposed. In the design, the decrease of power consumption is achieved by applying low-power-consumption and large-output-swing amplifiers with gain boost structure, and biasing all the cells with the same voltage bias source, which requires careful layout design and large capacitors. In addition,capacitor array DAC is also applied to reduce power consumption,and low threshold voltage MOS transistors are used to achieve a large signal processing range. The ADC was implemented in a 0.18μm 4M-1 P CMOS process,and the experimental results indicate that it consumes only 7mW, which is much less than general pipeline ADCs. The ADC was used in a 300000 pixels CMOS image sensor.

Design of a Low Power DSP with Distributed and Early Clock Gating

A novel clock structure of a low-power 16-bit very large instruction word (VLIW) digital signal processor (DSP) was proposed. To improve deterministic clock gating and to solve the drawback of conventional clock gating circuit in high speed circuit, a distributed and early clock gating method was developed on its instruction fetch & decoder unit, its pipelined data-path unit and its super-Harvard memory interface unit. The core was implemented following the Synopsys back-end flow under TSMC (Taiwan Silicon manufacture corporation) 0.18-μm 1.8-V 1P6M process, with a core size of 2 mm×2 mm. Result shows that it can run under 200 MHz with a power performance around 0.3 mW/MIPS. Meanwhile, only 39.7% circuit is active simultaneously in average, compared to its non-gating counterparts.

A vector inserting TPG for BIST design with low peak power consumption

A test pattern generator （TPG） which can highly reduce the peak power consumption during built-in self-test （BIST） application is proposed. The proposed TPG, called LPpe-TPG, consists of a linear feedback shift register （LFSR） and some control circuits. A procedure is presented firstly to make compare vectors between pseudorandom test patterns by adding some circuits to the original LFSR and secondly to insert some vectors between two successive pseudorandom test patterns according to the ordinal selection of every two bits of the compare vector. Then the changes between any successive test patterns of the test set generated by the LPpe-TPG are not more than twice. This leads to a decrease of the weighted switching activity （WSA） of the circuit under test （CUT） and therefore a reduction of the power consumption. Experimental results based on some ISCAS＇ 85 benchmark circuits show that the peak power consumption has been reduced by 25.25% to 64.46%. Also, the effectiveness of our approach to reduce the total and average power consumption is kept, without losing stuck-at fault coverage.

Preliminary Design of Poloildal Field Power Supply for HT-7U Super-conducting Tokamak

This paper presents the preliminary design of poloidal field power supply system of HT-7U super-conducting tokamak. With an emphasis on AC/DC power converter, DC circuit breaker, quench protection, harmonic suppression and static var. compensation, and AC power system, the design principle and features are introduced, the design scheme and R & D progress are described, the simulation studies and laboratory test are presented too.

Design and Simulation for the Pulse High-Voltage DC Power Supply (HVPS) of 1.2 MW/2.45 GHz HT-7U Lower Hybrid Current Drive System

The superconducting tokamak HT-7U [1] has been designed by the Institute of Plasma Physics since 1998 and will be set up before 2003. The 1.2 MW /2.45 GHz HT-7U LHCD (Lower hybrid current drive) system which being the most efficient non-induction device can heat the plasma and drive the plasma current has been efficiently in operation 'owl and a particular design of the 2.8 MW/-35 kV high-voltage DC power supply has been already completed and will apply to the klystron of LHCD on HT-7 and the future HT-7U, and the project of the power supply has been examined and approved professionally by an authorized group of high-level specialist in the institute of Plasma Physics. The detailed design of the power supply and the simulation results are referred in the paper.

Dynamic Power Dissipation Control Method for Real-Time Processors Based on Hardware Multithreading

In order to eliminate the energy waste caused by the traditional static hardware multithreaded processor used in real-time embedded system working in the low workload situation, the energy efficiency of the hardware multithread is discussed and a novel dynamic multithreaded architecture is proposed. The proposed architecture saves the energy wasted by removing idle threads without manipulation on the original architecture, fulfills a seamless switching mechanism which protects active threads and avoids pipeline stall during power mode switching. The report of an implemented dynamic multithreaded processor with 45 nm process from synthesis tool indicates that the area of dynamic multithreaded architecture is only 2.27% higher than the static one in achieving dynamic power dissipation, and consumes 1.3% more power in the same peak performance.

X-band inverse class-F GaN internally-matched power amplifier

An X-band inverse class-F power amplifier is realized by a 1-mm Al Ga N/Ga N high electron mobility transistor（HEMT）.The intrinsic and parasitic components inside the transistor,especially output capacitor Cds,influence the harmonic impedance heavily at the X-band,so compensation design is used for meeting the harmonic condition of inverse class-F on the current source plane.Experiment results show that,in the continuous-wave mode,the power amplifier achieves 61.7% power added efficiency（PAE）,which is 16.3% higher than the class-AB power amplifier realized by the same kind of HEMT.To the best of our knowledge,this is the first inverse class-F Ga N internally-matched power amplifier,and the PAE is quite high at the X-band.

A Low Power Non-Volatile LR-WPAN Baseband Processor with Wake-Up Identification Receiver

The paper proposes a low power non-volatile baseband processor with wake-up identification(WUI) receiver for LR-WPAN transceiver.It consists of WUI receiver,main receiver,transmitter,non-volatile memory(NVM) and power management module.The main receiver adopts a unified simplified synchronization method and channel codec with proactive Reed-Solomon Bypass technique,which increases the robustness and energy efficiency of receiver.The WUI receiver specifies the communication node and wakes up the transceiver to reduce average power consumption of the transceiver.The embedded NVM can backup/restore the states information of processor that avoids the loss of the state information caused by power failure and reduces the unnecessary power of repetitive computation when the processor is waked up from power down mode.The baseband processor is designed and verified on a FPGA board.The simulated power consumption of processor is 5.1uW for transmitting and 28.2μW for receiving.The WUI receiver technique reduces the average power consumption of transceiver remarkably.If the transceiver operates 30 seconds in every 15 minutes,the average power consumption of the transceiver can be reduced by two orders of magnitude.The NVM avoids the loss of the state information caused by power failure and energy waste caused by repetitive computation.

Design of a Broadband E-Plane Power Combiner Based on Quarter-Arc Bent Rectangular Waveguides for Sub-THz and THz Wave

A method of designing an E-plane power combiner composed of two quarter-arc bent rectangular waveguides is proposed for sub-THz and THz waves. The quarter-arc bent-waveguide power combiner has a simple geometry which is easy to design and fabricate. By HFSS codes, the physical mechanism and performance of the power combiner are analyzed, and the relationship between the output characteristics and the structure/operating parameters is given. Simulation results show that our power combiner is suitable for the combining of two equalpower and reversed-phase signals, the bandwidth of the combiner is wide and can be adjusted by the radius of the quarter-arc, and the isolation performance of the combiner can be improved by adding thin film resistive septa at the junction of two quarter-arc bent waveguides. Meanwhile, an approximate method based on the analytic geometrical analysis is given to design this power combiner for different frequency bands.

Preliminary design for inland nuclear power plants completed

The State Nuclear Power Technology Corporation (SNPTC), which is responsible for the development of third-generation nuclear power technology in China, has completed the preliminary designs

Design and Construction of the Power Plant Multi-flue Chimneys in East China Area

This paper mainly introduces the designand construction of the multi-flue chimneysof Beilungang Power Plant, ShidongkouSecond Power Plant and Waigaoqiao PowerPlant which have been used in East Chinaarea. This paper contains the generalsituation of construction, material selection,lifting scheme of steel inner flue, designfeatures and construction method. It could bereferential to concerned design andconstruction companies.

Modeling and Validation of Thrust Prediction of Underwater Solid Rocket Motor

The solid rocket motor driven system is one of the common ways for submarines to launch underwater missiles. It has significant advantages in improving the missile’s water exit speed, anti-interference capability, and enemy striking power. The prediction of the underwater loading is a preliminary factor for the power system design of the underwater vehicle. This paper presents a rapid prediction method and validated by the experimental study for the underwater thrust of the solid rocket motor. Based on the potential flow assumption of the water field, a model of the bubble and a one-dimensional quasi-steady model of the nozzle are established to directly solve the flow status of the nozzle. The aerodynamic thrust and hydrodynamic thrust have been calculated and analyzed. The calculation results are within 5% error of the experimental results. Moreover, a design platform to predict the underwater thrust of the solid rocket motor has been developed based on Python and the PyQt library, which shows excellent system adaptability and computational efficiency.

基于J2EE的项目管理信息系统设计与开发

随着智能制造的快速推进,融汇市场所需促进科技创新成果资源集聚,各地都在推动结构转型升级加大科技创新力度。在传统的项目管理在信息传递、信息共享、信息时效等方面的不足逐渐显露出来这一问题的基础上,利用了J2EE技术和SQL数据库等工具搭建具有企业典型特色的项目管理信息系统,帮助企业提高工作效率、减少浪费、缩短工期的同时减轻员工工作压力,增加客户满意度。