Test system for miniature pulse-powered photoelectric invert switch based on CPLD

For electronic piezo gauge used for testing gun chamber pressure, its internal miniature pulse-powered photoelectric invert switch cannot often be powered up normally. To solve this problem, a test system for invert switch is presented to verify the reliability of the invert switch. The test system uses complex programmable logic device （CPLD） to control data acquisition of A/D converter and data storage of external flash memory, and then transmits the acquired data to a computer for data analysis and processing. The test system can provide the required sampling frequency of the signal in high temperature, normal temperature and low temperature environments, and the reliability of the invert switch can be verified according to the signal parameters. The results show that the test system has high precision and the tested invert switch has low power consumption and high reliability.

REVIEW OF ADVANCED FPGA ARCHITECTURES AND TECHNOLOGIES

Field Programmable Gate Array(FPGA) is an efficient reconfigurable integrated circuit platform and has become a core signal processing microchip device of digital systems over the last decade. With the rapid development of semiconductor technology, the performance and system integration of FPGA devices have been significantly progressed, and at the same time new challenges arise. The design of FPGA architecture is required to evolve to meet these challenges, while also taking advantage of ever increased microchip density. This survey reviews the recent development of advanced FPGA architectures, including improvement of the programming technologies, logic blocks, interconnects, and embedded resources. Moreover, some important emerging design issues of FPGA architectures, such as novel memory based FPGAs and 3D FPGAs, are also presented to provide an outlook for future FPGA development.

A driving pulse edge modulation technique and its complex programming logic devices implementation

With the continual increase in switching speed and rating of power semiconductors, the switching voltage spike becomes a serious problem. This paper describes a new technique of driving pulse edge modulation for insulated gate bipolar transistors(IGBTs). By modulating the density and width of the pulse trains, without regulating the hardware circuit, the slope of the gate driving voltage is controlled to change the switching speed. This technique is used in the driving circuit based on complex programmable logic devices(CPLDs), and the switching voltage spike of IGBTs can be restrained through software, which is easier and more flexible to adjust. Experimental results demonstrate the effectiveness and practicability of the proposed method.

Design of operation parameters of a high speed TDI CCD line scan camera

This paper analyzes the operation parameters of the time delay and integration (TDI) line scan CCD camera, such as resolution, line rate, clock frequency, etc. and their mathematical relationship is deduced. By analyzing and calculating these parameters, the working clocks of the TDI CCD line scan camera are designed, which guarantees the synchronization of the line scan rate and the camera movement speed. The IL-E2 TDI CCD of DALSA Co. is used as the sensor of the camera in the paper. The working clock generator used for the TDI CCD sensor is realized by using the programmable logic device (PLD). The experimental results show that the working clock generator circuit satisfies the requirement of high speed TDI CCD line scan camera.

Novel Distributed Fiber Bragg Grating Sensing System Based on M-Z Interferometer

One of the problems in using grating sensors is how to measure a small Bragg wavelength shift accurately. Nowadays demodulation techniques are mainly based on the edge filter, tunable filter, or interferometric scanning methods. Interferometric demodulation is widely accepted as the technology which can provide the high sensitivity. An interrogation system using the interferometric scanning method is presented, in which an unbalanced fiber M-Z interferometer is used as the wavelength scanner for temperature measurement. A novel fiber Bragg grating sensor system based on M-Z interferometric demodulation technique is presented in this paper. The temperature sensitivity measured in the experiment is almost consistent with that obtained from the theoretic calculation.

THE DESIGN OF VMEBUS BRIDGE CONTROLLER WITH SHARC BUS

Targeting at the high expense and inflexibility to realize VMEbus bridge controller by professional Integrated Circuit (IC), this paper presents a scheme of adopting CPLD/FPGA (Complicated Programmable Logic Device/Field Programmable Gate Array) to design bridge controller between VMEbus and local bus. SHARC DSP (Digital Signal Processor) bus is an example. It has functions of nearly entire master/slave interface of VMEbus, and can act as DMA (Direct Memory Access) controller and perform block transfer in DMA or master processor initiative way without length limit. External circuit of the design is very simple. In comparison with special ICs, it has high performance to price ratio and can be easily applied to local buses of other processors with quite a little modification.

A Versatile High-speed Image Processing System Based on DSP and CPLD

In this paper, we present an optimized design method for high-speed embedded image processing system using 32 bit floating-point Digital Signal Processor （DSP） and Complex Programmable Logic Device （CPLD）. The DSP acts as the main processor of the system： executes digital image processing algorithms and operates other devices such as image sensor and CPLD. The CPLD is used to acquire images and achieve complex logic control of the whole system. Some key technologies are introduced to enhance the performance of our system. In particular, the use of DSP/BIOS tool to develop DSP applications makes our program run much more efficiently. As a result, this system can provide an excellent computing platform not only for executing complex image processing algorithms, but also for other digital signal processing or multi-channel data collection by choosing different sensors or Analog-to-Digital （A/D） converters.

Implementation of Dynamic Matrix Control on Field Programmable Gate Array

High performance computer is often required by model predictive control(MPC) systems due to the heavy online computation burden.To extend MPC to more application cases with low-cost computation facilities, the implementation of MPC controller on field programmable gate array(FPGA) system is studied.For the dynamic matrix control(DMC) algorithm,the main design idea and the implemental strategy of DMC controller are introduced based on a FPGA’s embedded system.The performance tests show that both the computation efficiency and the accuracy of the proposed controller can be satisfied due to the parallel computing capability of FPGA.