Programmable Logic Based on Large Magnetoresistance of Germanium

We find extremely large low-magnetic-field magnetoresistance （~350% at 0.2 T and ~180% at 0.1 T） in germa- nium at room temperature and the magnetoresistanee is highly sensitive to the surface roughness. This unique magnetoelectric property is applied to fabricate logic architecture which could perform basic Boolean logic in- cluding AND, OR, NOR and NAND. Our logic device may pave the way for a high performance microprocessor and may make the germanium family more advanced.

Synthesis of Nonlinear Control of Switching Topologies of Buck-Boost Converter Using Fuzzy Logic on Field Programmable Gate Array (FPGA)

An intelligent fuzzy logic inference pipeline for the control of a dc-dc buck-boost converter was designed and built using a semi-custom VLSI chip. The fuzzy linguistics describing the switching topologies of the converter was mapped into a look-up table that was synthesized into a set of Boolean equations. A VLSI chip–a field programmable gate array (FPGA) was used to implement the Boolean equations. Features include the size of RAM chip independent of number of rules in the knowledge base, on-chip fuzzification and defuzzification, faster response with speeds over giga fuzzy logic inferences per sec (FLIPS), and an inexpensive VLSI chip. The key application areas are: 1) on-chip integrated controllers;and 2) on-chip co-integration for entire system of sensors, circuits, controllers, and detectors for building complete instrument systems.

Programmable Logic Controller Block Monitoring System for Memory Attack Defense in Industrial Control Systems

Cyberattacks targeting industrial control systems(ICS)are becoming more sophisticated and advanced than in the past.A programmable logic controller(PLC),a core component of ICS,controls and monitors sensors and actuators in the field.However,PLC has memory attack threats such as program injection and manipulation,which has long been a major target for attackers,and it is important to detect these attacks for ICS security.To detect PLC memory attacks,a security system is required to acquire and monitor PLC memory directly.In addition,the performance impact of the security system on the PLC makes it difficult to apply to the ICS.To address these challenges,this paper proposes a system to detect PLC memory attacks by continuously acquiring and monitoring PLC memory.The proposed system detects PLC memory attacks by acquiring the program blocks and block information directly from the same layer as the PLC and then comparing them in bytes with previous data.Experiments with Siemens S7-300 and S7-400 PLC were conducted to evaluate the PLC memory detection performance and performance impact on PLC.The experimental results demonstrate that the proposed system detects all malicious organization block(OB)injection and data block(DB)manipulation,and the increment of PLC cycle time,the impact on PLC performance,was less than 1 ms.The proposed system detects PLC memory attacks with a simpler detection method than earlier studies.Furthermore,the proposed system can be applied to ICS with a small performance impact on PLC.

A NEW APPROACH TO PROGRAMMABLE LOGIC ARRAY FOR SINGLE-CLOCK CMOS

Programmable Logic Array (PLA) is an important building circuit of VLSI chips and some of the FPGA architectures have evolved from the basic PLA architectures. In this letter, a dynamic and static mixed PLA with single-phased clock is presented. Combining both dynamic and static design style rather than introducing additional interface-buffers overcomes the racing problem, thereby saves the chip area. Besides inheriting the advantages of dynamic circuit-low power dissipation and compact structure, this approach also provides high-speed operation.

Novel Test Approach for Interconnect Resources in Field Programmable Gate Arrays

A novel test approach for interconnect resources （IRs） in field programmable gate arrays （FPGA） has been proposed.In the test approach,SBs （switch boxes） of IRs in FPGA has been utilized to test IRs.Furthermore,configurable logic blocks （CLBs） in FPGA have also been employed to enhance driving capability and the position of fault IR can be determined by monitoring the IRs associated SBs.As a result,IRs can be scanned maximally with minimum configuration patterns.In the experiment,an in-house developed FPGA test system based on system-on-chip （SoC） hardware/software verification technology has been applied to test XC4000E family of Xilinx.The experiment results revealed that the IRs in FPGA can be tested by 6 test patterns.

Enhancing Programmable Logic Controller Teaching in Vocational Colleges:Strategies for Deeper Understanding and Practical Application

This paper addresses the problems faced in programmable logic controller(PLC)teaching in vocational colleges and proposes countermeasures to overcome these challenges.The study emphasizes the need for a deeper understanding of fundamental concepts and the integration of practical application in PLC education.It suggests involving students in teacher-led projects to enhance their programming skills and problem-solving skills.Additionally,the paper highlights the importance of interactive learning and collaborative discussions to foster student engagement.Furthermore,it emphasizes the cultivation of innovation consciousness through participation in innovation competitions and projects.The implementation of these strategies has shown positive results in improving learning outcomes and preparing students for careers in automation and control.This research contributes to the development of effective teaching approaches in PLC education in vocational colleges.

Design and verification of an FPGA programmable logic element based on Sense-Switch pFLASH

This paper proposes a kind of programmable logic element(PLE)based on Sense-Switch pFLASH technology.By programming Sense-Switch pFLASH,all three-bit look-up table(LUT3)functions,partial four-bit look-up table(LUT4)functions,latch functions,and d flip flop(DFF)with enable and reset functions can be realized.Because PLE uses a choice of operational logic(COOL)approach for the operation of logic functions,it allows any logic circuit to be implemented at any ratio of combinatorial logic to register.This intrinsic property makes it close to the basic application specific integrated circuit(ASIC)cell in terms of fine granularity,thus allowing ASIC-like cell-based mappers to apply all their optimization potential.By measuring Sense-Switch pFLASH and PLE circuits,the results show that the“on”state driving current of the Sense-Switch pFLASH is about 245.52μA,and that the“off”state leakage current is about 0.1 pA.The programmable function of PLE works normally.The delay of the typical combinatorial logic operation AND3 is 0.69 ns,and the delay of the sequential logic operation DFF is 0.65 ns,both of which meet the requirements of the design technical index.

Design of logic process based low-power 512-bit EEPROM for UHF RFID tag chip

A 512-bit EEPROM IP was designed by using just logic process based devices.To limit the voltages of the devices within 5.5 V,EEPROM core circuits,control gate(CG) and tunnel gate(TG) driving circuits,DC-DC converters:positive pumping voltage(VPP=4.75 V) ,negative pumping voltage(VNN=4.75 V) ,and VNNL(=VNN/2) generation circuit were proposed.In addition,switching powers CG high voltage(CG_HV) ,CG low voltage(CG_LV) ,TG high voltage(TG_HV) ,TG low voltage(TG_LV) ,VNNL_CG and VNNL_TG switching circuit were supplied for the CG and TG driving circuit.Furthermore,a sequential pumping scheme and a new ring oscillator with a dual oscillation period were proposed.To reduce a power consumption of EEPROM in the write mode,the reference voltages VREF_VPP for VPP and VREE_VNN for VNN were used by dividing VDD(1.2 V) supply voltage supplied from the analog block in stead of removing the reference voltage generators.A voltage level detector using a capacitive divider as a low-power DC-DC converter design technique was proposed.The result shows that the power dissipation is 0.34μW in the read mode,13.76μW in the program mode,and 13.66μW in the erase mode.

基于5G多接入边缘计算的云化PLC系统架构设计与应用

随着工业控制系统对柔性化、扁平化的要求不断提升,以PLC为构建基础的传统工业控制网络在大规模接入、算力提升和部署灵活性方面均受到限制.针对这些问题,融合5G网络和边缘计算技术,设计了基于5G多接入边缘计算的云化PLC系统架构,阐述了该架构的运行机制和所涉及的关键技术;在此基础上,进行PLC系统的云化部署和调试,实现了工业现场、企业数据中心、5G网络和边缘网络的集成;最后,通过在某汽车制造公司产线改造过程中的应用,验证了所提架构的有效性.

Evaluation of Selected Control Programming Languages for Process Engineers by Means of Cognitive Effectiveness and Dimensions

Different programming languages can be used for discrete, abstract and process-oriented programming. Depending on the application, there exist additional requirements, which are not fulfilled by every programming language. Flexible programming and maintainability are especially important requirements for process engineers. In this paper, the programming languages Activity Diagram, State Chart Diagram and Sequential Function Chart are compared and evaluated with regard to these requirements. This evaluation is based on the principles of cognitive effectiveness and cognitive dimensions. The aim of this paper is to identify the programming language suited best for controlling sequential processes, e.g. thermomechanical or batch processes.

基于PLC反渗透海水淡化控制系统的设计与开发

针对反渗透海水淡化系统工艺复杂、运维繁琐、对操作人员专业技能要求高的特点,研发了一套反渗透海水淡化控制系统。详细研究整个工艺系统中预处理、反渗透等关键工艺环节的原理及自动控制过程。从系统的硬件设计和软件开发两个方面进行详细阐述。硬件设计方面,根据装置规模和控制需求完成控制系统设备选型。软件开发方面,完成控制器及人机交互界面多套软件的开发。该系统成功应用于高校反渗透海水淡化教学实践课。应用结果表明:该系统设计合理、操作界面简洁方便,在稳定安全运行的同时可实现教学培训、故障处理等目的。该系统在提高海水淡化操作人员专业技能的同时,也对高校创新其他专业的实操培训课程提供了借鉴和技术支撑。

面向学科交叉融合的综合性实训教学装置设计与教学实践

针对工程训练实训教学装置功能单一、缺乏多学科交叉与整合能力等问题,以多种特征的物料识别与分拣为应用背景,在综合应用PLC控制技术、传感器技术、气动控制与机电传动控制技术的基础上,结合数字图像处理与卷积神经网络技术,基于树莓派与Jetson嵌入式计算平台,自主研制了一种物料特征识别与分拣综合实训教学装置。与现有同类实训装置相比,该自制实训装置具有体积小,功能多和成本低的优势。实践教学表明,将传统PLC控制与人工智能技术元素有机结合,以及将课内教学延伸至创客活动和学生第二课堂,能有效提升学生的工程认知水平和工程实践能力,体现多学科交叉、多技术融合的高等工程教育特征。

基于特征融合的无人船目标识别系统设计

通过特征融合可获取全面的目标特征信息,利于提升目标识别的稳定性,为此设计基于特征融合的无人船目标识别系统。利用无人船搭载红外热成像仪与可见光摄像头,采集目标红外与可见光图像;通过处理器和可编程逻辑控制器,设计特征提取模块,用于提取红外与可见光图像的无人船目标特征;特征融合模块利用典型相关分析理论,融合红外与可见光图像的无人船目标特征;目标识别模块通过径向基函数网络,结合特征融合结果,输出无人船目标识别结果。实验结果证明,该系统可有效采集无人船目标的红外与可见光图像,完成特征提取;该系统具备较优的特征融合效果,并精准实现无人船目标识别。

一种基于可编程逻辑器件的多功能信号源设计

为适应不同应用场景下对多种信号类型和特性的需求改变,设计一种基于可编程逻辑器件的多功能信号源,以解决通信信号输出过程存在偏差问题。基于可编程逻辑器件进行多功能信号源的电路排布,采用巴特沃斯低通滤波器对信号噪声进行处理,确定波形优化指标,利用数字频率合成技术进行信号波形优化,设计顶层逻辑模块布局。对设计的多功能信号源进行性能测试,结果表明:在改变载波频率和调制度的情况下,设计的多功能信号源在传输过程中输出的信号频谱和解调波形的偏置精度,均优于传统的信号源。

脉冲式连续微波干燥树莓果浆的控制系统和品质优化

为改善微波加热均匀性,提高连续式微波干燥树莓果浆干后品质,在自行研制脉冲式微波输出可编程控制器(Programmable Logic Controller,PLC)控制系统上,采用中心组合试验设计方法,分析微波占空比、脉冲周期、风速和干燥时间四个实验因素对树莓果浆的平均温度、温度离散值、含水率、水分含量离散值、花青素保留率和花青素保留率离散值指标的影响规律,获得脉冲式微波干燥树莓果浆的最佳工艺。对比脉冲式微波干燥与常用的反馈控温微波干燥、间歇微波干燥和连续式微波干燥工艺的果浆干后品质及均匀性指标,进而研制连续式微波干燥树莓果浆品质优化控制系统。结果表明,脉冲式微波干燥通过PLC控制系统,使磁控管以脉冲形式输出矩形波形式功率,间歇性地开启磁控管比连续微波加热更有效,并且采用脉冲式微波干燥树莓果浆具有更优产品品质和加热效率,对比反馈控温系统成本更低可靠性更好。脉冲式微波干燥树莓果浆的最佳工艺为:微波占空比0.6、脉冲周期17 s、风速1.9 m/s、干燥时间12.5 min。相比于连续式微波干燥,脉冲式微波干燥果浆品质最优,脉冲式干后果浆花青素保留率提高35.31%±0.55%,反馈控温下提高33.59%±0.23%,间歇微波下提高16.42%±0.18%。脉冲式微波干燥通过控制功率降低果浆干后温度,改善干后品质均匀性,为树莓干制品工业化生产提供依据。

选煤厂生产线调度最优决策专家系统设计

为提升选煤工艺的运行效率、创造更多的企业效益,设计了一种生产线调度最优决策专家系统。采用多种终端等组件,构建网络连接子系统。采用传感器、采集器等不同设备,构建实时监测子系统。结合上位机与调度决策模块,组成移动调度子系统。以可编程逻辑控制器(PLC)控制程序与调度最优决策方案制定程序作为技术支持,根据最优决策的目标函数模型与约束条件,生成最优调度决策方案。试验结果表明,应用所设计系统,每吨煤炭的最长加工时间最小化至17.69 s,且用于调度的时间仅为17.13 s。由此证明:所设计系统运行速度较快;给出的决策方案完全符合调度目标;煤炭调度时间和加工时间均较短。该系统可行性与实时性优势显著。该设计能为企业创造较好的实践价值与经济效益。

基于PLC的仓库灯光指引系统

基于可编程逻辑控制器(Programmable Logic Controller,PLC)的仓库灯光指引系统,即利用灯光指引位置进行定位。该系统适用性广泛,不仅在仓储行业内使用,还可以应用在其他行业,为提高效率发挥重要作用。设计灯光指引系统可以实现客户端数据采集,客户端和下位机间的数据传输,以及下位机对LED灯进行驱动等功能。最后,系统利用不同灯号的不同颜色,表示不同功能的状态。

基于TIA Portal的HMI+PLC虚拟仿真探究

文章提出一种在TIA Portal软件上集成人机界面(Human Machine Interface,HMI)和可编程逻辑控制器(ProgrammableLogicController,PLC)进行虚拟仿真的方法。该方法能够在现有的硬件条件下,使学生不受时间、地点等的限制,只需要在计算机上安装TIA PORTAL软件就可以进行虚拟学习,构建控制系统,进行硬件组态、编程、控件组态、仿真运行和程序调试等。最后,以十字路口的交通灯为例,采用基于实际物理设备和基于TIAPORTAL软件虚拟仿真两种方式搭建控制系统,完成项目的设计、组态、编程、调试和运行测试。主要任务是寻找方法构建虚拟网络,将虚拟运行的PLC与HMI设备联系起来,实现虚拟设备之间和软件之间的数据传输,达到与使用实际物理设备效果相同的目的。

基于PLC的气动搬运机械手自动控制系统设计

为提高气动搬运机械手在复杂工厂流水线中的运行效率,该文设计了一套基于PLC的气动搬运机械手自动控制系统。在分析通用气动机械手将物品在不同位点之间搬运的运动流程的基础上,设计了自动控制系统的硬件架构。其中包含了可编程逻辑控制器(PLC)、伺服电机、传感器和交互屏等器件,并根据气动搬运机械手的运动流程,设计了相应的软件控制程序及界面。仿真实验结果证明,所提出的气动搬运机械手自动控制系统可以稳定地完成实验预设的功能需求,自动化程度较高。