Combinatorial design-based quasi-cyclic LDPC codes with girth eight

This paper presents a novel regular Quasi-Cyclic (QC)Low Density Parity Check (LDPC)codes with columnweight three and girth at least eight.These are designed on the basis of combinatorial design in which subsets applied for the construction of circulant matrices are determined by a particular subset.Considering the nonexistence of cycles four and six in the structure of the parity check matrix,a bound for their minimum weight is proposed.The simtdations conducted confirm that without applying a masking technique,the newly implemented codes have a performance similar to or better than other well-known codes.This is evident in the waterfall region, while their error floor at very low Bit Error Rate (BER)is expected.

DESIGN OF QUASI-CYCLIC LDPC CODES BASED ON EUCLIDEAN GEOMETRIES

A new method for constructing Quasi-Cyclic (QC) Low-Density Parity-Check (LDPC) codes based on Euclidean Geometry (EG) is presented. The proposed method results in a class of QC-LDPC codes with girth of at least 6 and the designed codes perform very close to the Shannon limit with iterative decoding. Simulations show that the designed QC-LDPC codes have almost the same performance with the existing EG-LDPC codes.

On the Girth of Tanner (5,7) Quasi-Cyclic LDPC Codes

The girth plays an important role in the design of LDPC codes. In order to determine the girth of Tanner(5,7) quasi-cyclic( QC) LDPC codes with length 7p for p being a prime with the form 35 m + 1,the cycles of lengths 4,6,8,and 10 are analyzed. Then these cycles are classified into sixteen categories,each of which can be expressed as an ordered block sequence,or a certain type. It is also shown that the existence of these cycles is equal to polynomial equations over Fpwho has a 35th unit root. We check if these polynomial equations have a 35th unit root and obtain the girth values of Tanner(5,7) QC LDPC codes.

Efficient construction and encoding of QC-LDPC codes by cyclic lifting of protographs

Quasi-cyclic low-density parity-check （QC-LDPC） codes can be constructed conveniently by cyclic lifting of protographs. For the purpose of eliminating short cycles in the Tanner graph to guarantee performance, first an algorithm to enumerate the harmful short cycles in the protograph is designed, and then a greedy algorithm is proposed to assign proper permutation shifts to the circulant permutation submatrices in the parity check matrix after lifting. Compared with the existing deterministic edge swapping （DES） algorithms, the proposed greedy algorithm adds more constraints in the assignment of permutation shifts to improve performance. Simulation results verify that it outperforms DES in reducing short cycles. In addition, it is proved that the parity check matrices of the cyclic lifted QC-LDPC codes can be transformed into block lower triangular ones when the lifting factor is a power of 2. Utilizing this property, the QC- LDPC codes can be encoded by preprocessing the base matrices, which reduces the encoding complexity to a large extent.

Design of Irregular QC-LDPC Code Based Multi-Level Coded Modulation Scheme for High Speed Optical Communication Systems

In this paper, we focus on the design of irregular QC-LDPC code based multi-level coded modulation(MLCM) scheme by jointly optimizing the component code rate and the degree distribution of the irregular QC-LDPC component code. Firstly, the sub-channel capacities of MLCM systems is analyzed and discussed, based on which the optimal component code rate can be obtained. Secondly, an extrinsic information transfer chart based two-stage searching algorithm is proposed to find the good irregular QC-LDPC code ensembles with optimal component code rates for their corresponding sub-channels. Finally, by constructing the irregular QC-LDPC component codes from the designed ensembles with the aim of possibly enlarging the girth and reducing the number of the shortest cycles, the designed irregular QC-LDPC code based 16QAM and 64QAM MLCM systems can achieve 0.4 dB and 1.2 dB net coding gain, respectively, compared with the recently proposed regular QC-LDPC code based 16QAM and 64QAM MLCM systems.

Design of good QC-LDPC codes without small girth in the p-plane

A construction method based on the p-plane to design high-girth quasi-cyclic low-density parity-check （QC-LDPC） codes is proposed. Firstly the good points in every line of the p-plane can be ascertained through filtering the bad points, because the designed parity-check matrixes using these points have the short cycles in Tanner graph of codes. Then one of the best points from the residual good points of every line in the p-plane will be found, respectively. The optimal point is also singled out according to the bit error rate （BER） performance of the QC-LDPC codes at last. Explicit necessary and sufficient conditions for the QC-LDPC codes to have no short cycles are presented which are in favor of removing the bad points in the p-plane. Since preventing the short cycles also prevents the small stopping sets, the proposed construction method also leads to QC-LDPC codes with a higher stopping distance.

Quantum quasi-cyclic low-density parity-check error-correcting codes

In this paper, we propose the approach of employing circulant permutation matrices to construct quantum quasicyclic （QC） low-density parity-check （LDPC） codes. Using the proposed approach one may construct some new quantum codes with various lengths and rates of no cycles-length 4 in their Tanner graphs. In addition, these constructed codes have the advantages of simple implementation and low-complexity encoding. Finally, the decoding approach for the proposed quantum QC LDPC is investigated.

QC-LDPC码的高性能译码器实现

在对分层译码算法优化的基础上,提出一种多码率QC-LDPC译码器。采用改进的分层消息传播算法实现快速收敛,将译码迭代次数降到经典方法的50%以下。架构中用于存储中间置信信息的存储器数量只有4个,减少了芯片面积和功耗。校验节点置信度更新采用校正的整数量化的分层算法,降低了计算复杂度。选取的校正因子降低了译码器的误码率。基于该架构实现QC-LDPC译码器,融合3种码率,芯片规模为60万门,时钟频率为110 MHz,1/2码率的译码速率可达134 Mb/s。

基于QC-LDPC码的Niederreiter公钥密码体制

提出基于准循环低密度奇偶校验(QC-LDPC)码构造的Niederreiter公钥密码体制。由于QC-LDPC的校验矩阵具有稀疏和分块循环的特性,且QC-LDPC的纠错能力大,与以往基于纠错码构造的公钥密码体制相比,该体制密钥量大大减少,提高了传信率。同时引入对角形式的可逆变换矩阵Q,通过线性变换产生新的校验矩阵H',隐藏了码字的校验矩阵,可以抵消矩阵H'稀疏易攻击的弱点,增加了体制的安全性。并且通过对现有的攻击方法分析,证明了体制的安全性。

Modified Benes network architecture for WiMAX LDPC decoder

A modified Benes network is proposed to be used as an optimal shuffle network in worldwide interoperability for microwave access （WiMAX） low density parity check （LDPC） decoders, When the size of the input is not a power of two, the modified Benes network can achieve the most optimal performance. This modified Benes network is non-blocking and can perform any sorts of permutations, so it can support 19 modes specified in the WiMAX system. Furthermore, an efficient algorithm to generate the control signals for all the 2 × 2 switches in this network is derived, which can reduce the hardware complexity and overall latency of the modified Benes network. Synthesis results show that the proposed control signal generator can save 25.4% chip area and the overall network latency can be reduced by 36. 2%.

存储紧缩性高速QC-LDPC译码器的FPGA实现

提出了一种高速部分并行准循环低密度奇偶校验码(quasi-cyclic low density parity check codes,QC-LDPC)译码器架构和该架构下的2种紧缩性存储策略,采用将多个相邻行的硬判决码字和外信息压缩到一个存储单元、硬判决待输出码字信息紧缩性存储及相对应的高速译码器架构,不仅减少了用于硬判决码字的存储块的数量,而且可以便于一个时钟周期内对多个数据同时进行访问并处理,从而提高了译码器的数据处理吞吐量。通过采用Xilinx XC4VLX160 FPGA 实现CCSDS标准中的LDPC译码器验证了文中提出的这种紧缩性存储策略及其高速译码器架构可以有效地利用FPGA资源来实现高速译码器,实现结果显示该译码器在布局布线后时钟频率可以工作在250 MHz,译码器采用14次迭代,对应2 Gb/s的译码吞吐量。

Weighted symbol-flipping decoding algorithm for nonbinary LDPC codes with flipping patterns

A novel low-complexity weighted symbol-flipping algorithm with flipping patterns to decode nonbinary low-density parity-check codes is proposed. The proposed decoding procedure updates the hard-decision received symbol vector iteratively in search of a valid codeword in the symbol vector space. Only one symbol is flipped in each iteration, and symbol flipping function, which is employed as the symbol flipping metric, combines the number of failed checks and the reliabilities of the received bits and calculated symbols. A scheme to avoid infinite loops and select one symbol to flip in high order Galois field search is also proposed. The design of flipping pattern＇s order and depth, which is dependent of the computational requirement and error performance, is also proposed and exemplified. Simulation results show that the algorithm achieves an appealing tradeoff between performance and computational requirement over relatively low Galois field for short to medium code length.

NEW CONSTRUCTIONS OF LDPC CODES BASED ON CIRCULANT PERMUTATION MATRICES FOR AWGN CHANNEL

Two new design approaches for constructing Low-Density Parity-Check(LDPC) codes are proposed.One is used to design regular Quasi-Cyclic LDPC(QC-LDPC) codes with girth at least 8.The other is used to design irregular LDPC codes.Both of their parity-check matrices are composed of Circulant Permutation Matrices(CPMs).When iteratively decoded with the Sum-Product Algorithm(SPA),these proposed codes exhibit good performances over the AWGN channel.

Real-Time Implementation for Reduced-Complexity LDPC Decoder in Satellite Communication

In this paper,it has proposed a realtime implementation of low-density paritycheck(LDPC) decoder with less complexity used for satellite communication on FPGA platform.By adopting a(2048.4096)irregular quasi-cyclic(QC) LDPC code,the proposed partly parallel decoding structure balances the complexity between the check node unit(CNU) and the variable node unit(VNU) based on min-sum(MS) algorithm,thereby achieving less Slice resources and superior clock performance.Moreover,as a lookup table(LUT) is utilized in this paper to search the node message stored in timeshare memory unit,it is simple to reuse and save large amount of storage resources.The implementation results on Xilinx FPGA chip illustrate that,compared with conventional structure,the proposed scheme can achieve at last 28.6%and 8%cost reduction in RAM and Slice respectively.The clock frequency is also increased to 280 MHz without decoding performance deterioration and convergence speed reduction.

Low-Density Parity-Check Codes:Highway to Channel Capacity

Low-density parity-check(LDPC)codes are not only capacity-approaching,but also greatly suitable for high-throughput implementation.Thus,they are the most popular codes for high-speed data transmission in the past two decades.Thanks to the low-density property of their parity-check matrices,the optimal maximum a posteriori probability decoding of LDPC codes can be approximated by message-passing decoding with linear complexity and highly parallel nature.Then,it reveals that the approximation has to carry on Tanner graphs without short cycles and small trapping sets.Last,it demonstrates that well-designed LDPC codes with the aid of computer simulation and asymptotic analysis tools are able to approach the channel capacity.Moreover,quasi-cyclic(QC)structure is introduced to significantly facilitate their high-throughput implementation.In fact,compared to the other capacity-approaching codes,QC-LDPC codes can provide better area-efficiency and energy-efficiency.As a result,they are widely applied in numerous communication systems,e.g.,Landsat satellites,Chang’e Chinese Lunar mission,5G mobile communications and so on.What’s more,its extension to non-binary Galois fields has been adopted as the channel coding scheme for BeiDou navigation satellite system.

A NOVEL CONSTRUCTION OF QUANTUM LDPC CODES BASED ON CYCLIC CLASSES OF LINES IN EUCLIDEAN GEOMETRIES

The dual-containing (or self-orthogonal) formalism of Calderbank-Shor-Steane (CSS) codes provides a universal connection between a classical linear code and a Quantum Error-Correcting Code (QECC). We propose a novel class of quantum Low Density Parity Check (LDPC) codes constructed from cyclic classes of lines in Euclidean Geometry (EG). The corresponding constructed parity check matrix has quasi-cyclic structure that can be encoded flexibility, and satisfies the requirement of dual-containing quantum code. Taking the advantage of quasi-cyclic structure, we use a structured approach to construct Generalized Parity Check Matrix (GPCM). This new class of quantum codes has higher code rate, more sparse check matrix, and exactly one four-cycle in each pair of two rows. Ex-perimental results show that the proposed quantum codes, such as EG(2,q)II-QECC, EG(3,q)II-QECC, have better performance than that of other methods based on EG, over the depolarizing channel and decoded with iterative decoding based on the sum-product decoding algorithm.

一种基于循环移位矩阵的LDPC码构造方法

具有准循环结构的低密度奇偶校验码(QC-LDPC Codes)是目前被广泛采用的一类LDPC码。本文提出了一种结合PEG算法构造基于循环移位矩阵的QC-LDPC码的方法。该方法首先将QC-LDPC码传统的基于比特的二分图简化为基于Block的二分图,然后在该图中采用PEG算法遵循的环路最大原则确定每一个循环移位矩阵的位置,最后根据QC-LDPC码的环路特性为每一个循环移位矩阵挑选循环移位偏移量。利用该算法,本文构造了长度从1008bit到8064bit,码率从1/2到7/8各种参数的LDPC码。仿真结果表明,本文构造的LDPC码性能优于目前采用有限几何、两个信息符号的RS码、组合数学等常用的代数方法构造的QC-LDPC码。

Regular Quasi Cyclic Low Density Parity Check Codes with Girth 8 from Elementary Number Theory

This paper is concerned with (3,n) and (4,n) regular quasi-cyclic Low Density Parity Check (LDPC) code constructions from elementary number theory.Given the column weight,we determine the shift values of the circulant permutation matrices via arithmetic analysis.The proposed constructions of quasi-cyclic LDPC codes achieve the following main advantages simultaneously:1) our methods are constructive in the sense that we avoid any searching process;2) our methods ensure no four or six cycles in the bipartite graphs corresponding to the LDPC codes;3) our methods are direct constructions of quasi-cyclic LDPC codes which do not use any other quasi-cyclic LDPC codes of small length like component codes or any other algorithms/cyclic codes like building block;4)the computations of the parameters involved are based on elementary number theory,thus very simple and fast.Simulation results show that the constructed regular codes of high rates perform almost 1.25 dB above Shannon limit and have no error floor down to the bit-error rate of 10-6.

Half Rate Quasi Cyclic Low Density Parity Check Codes Based on Combinatorial Designs

This paper presents new half rate Quasi Cyclic Low Density Parity Check (QC- LDPC) codes formed on the basis of combinatorial designs. In these codes, circulant matrices of the parity check matrix are formed on the basis of subsets in which the difference between any two elements of a subset is unique with all differences obtained from the same or different subsets. This structure of circulant matrices guarantees non-existence of cycle-4 in the Tanner graph of QC-LDPC codes. First, an irregular code with girth 6 constituted by two rows of circulant matrices is proposed. Then, more criteria will be considered on the structure of subsets with the mentioned feature aiming to represent a new scheme of regular QC-LPDC codes with girth at least 8. From simulations, it is confirmed that codes have similar to or better performance than other well-known half rate codes, while require lower complexity in their design.

Code Design and Shuffled Iterative Decoding of a Quasi-Cyclic LDPC Coded OFDM System

In multipath environments, the error rate performance of orthogonal frequency division multiplexing （OFDM） is severely degraded by the deep fading subcarriers. Powerful error-correcting codes must be used with OFDM. This paper presents a quasi-cyclic low-density parity-check （LDPC） coded OFDM system, in which the redundant bits of each codeword are mapped to a higher-order modulation constellation. The op- timal degree distribution was calculated using density evolution. The corresponding quasi-cyclic LDPC code was then constructed using circulant permutation matrices. Group shuffled message passing scheduling was used in the iterative decoding. Simulation results show that the system achieves better error rate performance and faster decoding convergence than conventional approaches on both additive white Gaussian noise （AWGN） and Rayleigh fading channels.