通过数值模拟手段，用归一化的方法研究了界面陷阱、硅膜厚度和沟道掺杂浓度对R－G电流大小的影响规律。结果表明：无论在FD还是在PD SOI MOS器件中，界面陷阱密度是决定R－G电流峰值的主要因素，硅膜厚度和沟道掺杂浓度的影响却因器...通过数值模拟手段，用归一化的方法研究了界面陷阱、硅膜厚度和沟道掺杂浓度对R－G电流大小的影响规律。结果表明：无论在FD还是在PD SOI MOS器件中，界面陷阱密度是决定R－G电流峰值的主要因素，硅膜厚度和沟道掺杂浓度的影响却因器件的类型而导。为了精确地用R－G电流峰值确定界面陷阱的大小，器件参数的影响也必须包括在模型之中。展开更多
Forward gated-diode Recombination-Generation(R-G) current method is applied to an NMOSFET/SOI to measure the stress-induced interface traps in this letter. This easy but accurate experimental method can directly give ...Forward gated-diode Recombination-Generation(R-G) current method is applied to an NMOSFET/SOI to measure the stress-induced interface traps in this letter. This easy but accurate experimental method can directly give stress-induced average interface traps for characterizing the device's hot carrier characteristics. For the tested device, an expected power law relationship of ANit ～ t0.787 between pure stress-induced interface traps and accumulated stressing time is obtained.展开更多
文摘通过数值模拟手段，用归一化的方法研究了界面陷阱、硅膜厚度和沟道掺杂浓度对R－G电流大小的影响规律。结果表明：无论在FD还是在PD SOI MOS器件中，界面陷阱密度是决定R－G电流峰值的主要因素，硅膜厚度和沟道掺杂浓度的影响却因器件的类型而导。为了精确地用R－G电流峰值确定界面陷阱的大小，器件参数的影响也必须包括在模型之中。
基金Sponsored by Motorola-Peking University Joint Project.Contract No.:MSPSDDLCHINA-0004
文摘Forward gated-diode Recombination-Generation(R-G) current method is applied to an NMOSFET/SOI to measure the stress-induced interface traps in this letter. This easy but accurate experimental method can directly give stress-induced average interface traps for characterizing the device's hot carrier characteristics. For the tested device, an expected power law relationship of ANit ～ t0.787 between pure stress-induced interface traps and accumulated stressing time is obtained.
