研究一种工作于电流断续模式(discontinuous current mode,DCM)、基于电流源型全桥Boost拓扑的三相单级功率因数校正(power factor correction,PFC)变换器的起动及升压电感的关机磁复位方法。利用带中心抽头和反激绕组的电感取代原有的...研究一种工作于电流断续模式(discontinuous current mode,DCM)、基于电流源型全桥Boost拓扑的三相单级功率因数校正(power factor correction,PFC)变换器的起动及升压电感的关机磁复位方法。利用带中心抽头和反激绕组的电感取代原有的升压电感,提出了一种新颖的可自行起动并实现升压电感关机磁复位的PFC电路结构。该电路在起动和关机过程中工作于反激式(Flyback)模式,利用反激绕组分别实现了输出滤波电容的充电以及升压电感的磁复位。分析了变换器的起动以及升压电感的关机磁复位过程,并对比稳态特性,给出了该电路关键参数的约束条件。实验结果表明,该电路实现了正常的起动以及关机磁复位,验证了所提出方法的正确性和可行性。展开更多
越南Song Tranh 2水电站蓄水发电后,大坝出现了大量渗漏水,亟需处理。通过对漏水原因进行分析,提出了在结构缝上游面设置表面止水并结合结构缝化学灌浆的处理方案,治理后效果显著。本文阐述了渗漏治理方案、渗漏水下处理施工过程和治理...越南Song Tranh 2水电站蓄水发电后,大坝出现了大量渗漏水,亟需处理。通过对漏水原因进行分析,提出了在结构缝上游面设置表面止水并结合结构缝化学灌浆的处理方案,治理后效果显著。本文阐述了渗漏治理方案、渗漏水下处理施工过程和治理效果,可为类似工程处理提供借鉴。展开更多
The multilevel storage capability of nonvolatile resistive random access memory(ReRAM)is greatly de-sired to accomplish high functioning memory density.In this study,Ta_(2)O_(5) thin film with different thick-nesses(2...The multilevel storage capability of nonvolatile resistive random access memory(ReRAM)is greatly de-sired to accomplish high functioning memory density.In this study,Ta_(2)O_(5) thin film with different thick-nesses(2,4,and 6 nm)was exploited as an appropriate interfacial barrier layer for limiting the formation of the interfacial layer between the 10 nm thick sputtering deposited resistive switching(RS)layer and Ta ohmic electrode to improve the switching cycle endurance and uniformity.Results show that lower form-ing voltage,narrow distribution of SET-voltages,good dc switching cycles(10^(3)),high pulse endurance(10^(6) cycles),long retention time(10^(4) s at room temperature and 100℃),and reliable multilevel resis-tance states were obtained at an appropriate thickness of∼2 nm Ta_(2)O_(5) interfacial barrier layer instead of without Ta_(2)O_(5) and with∼4 nm,and∼6 nm Ta_(2)O_(5) barrier layer,ZrO_(2)-based memristive devices.Besides,multilevel resistance states have been scientifically investigated via modulating the compliance current(CC)and RESET-stop voltages,which displays that all of the resistance states were distinct and stayed stable without any considerable deprivation over 10^(4) s retention time and 104 pulse endurance cycles.The I-V characteristics of RESET-stop voltage(from−1.7 to−2.3 V)of HRS are found to be a good linear fit with the Schottky equation.It can be seen that Schottky barrier height rises by increasing the stop-voltage during RESET-operation,resulting in enhancing the data storage memory window(on/offratio).Moreover,RESET-voltage and CC control of HRS and LRS revealed the physical origin of the RS mecha-nism,which entails the formation and rupture of conducting nanofilaments.It is thoroughly investigated that proper optimization of the barrier layer at the ohmic interface and the switching layer is essential in memristive devices.These results demonstrate that the ZrO_(2)-based memristive device with an optimized∼2 nm Ta_(2)O_(5) barrier layer is a promising candidate for multilevel data storage memory applications.展开更多
文摘研究一种工作于电流断续模式(discontinuous current mode,DCM)、基于电流源型全桥Boost拓扑的三相单级功率因数校正(power factor correction,PFC)变换器的起动及升压电感的关机磁复位方法。利用带中心抽头和反激绕组的电感取代原有的升压电感,提出了一种新颖的可自行起动并实现升压电感关机磁复位的PFC电路结构。该电路在起动和关机过程中工作于反激式(Flyback)模式,利用反激绕组分别实现了输出滤波电容的充电以及升压电感的磁复位。分析了变换器的起动以及升压电感的关机磁复位过程,并对比稳态特性,给出了该电路关键参数的约束条件。实验结果表明,该电路实现了正常的起动以及关机磁复位,验证了所提出方法的正确性和可行性。
基金supported in part by the National Research Foundation of Korea (NRF) grant funded by the Korean government (MSIP) (No.2021R1C1C1004422)the Dongguk University Research Fund of 2020supported through the National Research Foundation of Korea (NRF) funded by the Ministry of Science,ICT & Future Planning (Nos.NRF2020M3F3A2A02082449 and NRF-2016R1A6A1A03013422)。
文摘The multilevel storage capability of nonvolatile resistive random access memory(ReRAM)is greatly de-sired to accomplish high functioning memory density.In this study,Ta_(2)O_(5) thin film with different thick-nesses(2,4,and 6 nm)was exploited as an appropriate interfacial barrier layer for limiting the formation of the interfacial layer between the 10 nm thick sputtering deposited resistive switching(RS)layer and Ta ohmic electrode to improve the switching cycle endurance and uniformity.Results show that lower form-ing voltage,narrow distribution of SET-voltages,good dc switching cycles(10^(3)),high pulse endurance(10^(6) cycles),long retention time(10^(4) s at room temperature and 100℃),and reliable multilevel resis-tance states were obtained at an appropriate thickness of∼2 nm Ta_(2)O_(5) interfacial barrier layer instead of without Ta_(2)O_(5) and with∼4 nm,and∼6 nm Ta_(2)O_(5) barrier layer,ZrO_(2)-based memristive devices.Besides,multilevel resistance states have been scientifically investigated via modulating the compliance current(CC)and RESET-stop voltages,which displays that all of the resistance states were distinct and stayed stable without any considerable deprivation over 10^(4) s retention time and 104 pulse endurance cycles.The I-V characteristics of RESET-stop voltage(from−1.7 to−2.3 V)of HRS are found to be a good linear fit with the Schottky equation.It can be seen that Schottky barrier height rises by increasing the stop-voltage during RESET-operation,resulting in enhancing the data storage memory window(on/offratio).Moreover,RESET-voltage and CC control of HRS and LRS revealed the physical origin of the RS mecha-nism,which entails the formation and rupture of conducting nanofilaments.It is thoroughly investigated that proper optimization of the barrier layer at the ohmic interface and the switching layer is essential in memristive devices.These results demonstrate that the ZrO_(2)-based memristive device with an optimized∼2 nm Ta_(2)O_(5) barrier layer is a promising candidate for multilevel data storage memory applications.
