本文作者从Turbo RS级联码的结构剖析了级联RS码提高Turbo码特性的原因;给出了Tur bo RS级联码的各种编译码方案,并对其中的完全迭代型RS硬判决译码方法做了详细的分析与模拟,结果显示:Turbo RS级联码的帧错率和误码率改善明显,时间... 本文作者从Turbo RS级联码的结构剖析了级联RS码提高Turbo码特性的原因;给出了Tur bo RS级联码的各种编译码方案,并对其中的完全迭代型RS硬判决译码方法做了详细的分析与模拟,结果显示:Turbo RS级联码的帧错率和误码率改善明显,时间复杂度比Turbo码有所降低。展开更多
An error tolerant hardware efficient verylarge scale integration （VLSI） architecture for bitparallel systolic multiplication over dual base, which canbe pipelined, is presented. Since this architecture has thefeatur...An error tolerant hardware efficient verylarge scale integration （VLSI） architecture for bitparallel systolic multiplication over dual base, which canbe pipelined, is presented. Since this architecture has thefeatures of regularity, modularity and unidirectionaldata flow, this structure is well suited to VLSIimplementations. The length of the largest delay pathand area of this architecture are less compared to the bitparallel systolic multiplication architectures reportedearlier. The architecture is implemented using Austria Micro System＇s 0.35 μm CMOS （complementary metaloxide semiconductor） technology. This architecture canalso operate over both the dual-base and polynomialbase.展开更多
Based on the Berlekamp-Massy （BM） algorithm for Reed-Solomon（RS） decoding, an improved version is proposed, which focuses on how to find the error locator polynomial using least iterative operations. The condition...Based on the Berlekamp-Massy （BM） algorithm for Reed-Solomon（RS） decoding, an improved version is proposed, which focuses on how to find the error locator polynomial using least iterative operations. The conditions to end the iterative operations is derived. As a special case, criterion of only one error symbol in one received codeword is derived as well. Steps are listed concerning the implementation of the improved iterative decoding algorithm, which is carried out as software on the platform of TI＇s C6416 DSP. Decoding performance and decoding-delay of both improved and original algorithms under different （n,k） conditions are simulated. The results of simulations demonstrate that the improved algorithm has less computational complexity when the number of errors in a received codeword is relatively small. Therefore, in channels with low noise power spectrum density, the improved algorithm results in less decoding-delay than BM algorithm.展开更多
An approach based on adaptive congestion control and adaptive error recovery with RS (Reed-Solomon) coding method is presented for efficient video transmission over the Internet. Featured by weighted moving average ra...An approach based on adaptive congestion control and adaptive error recovery with RS (Reed-Solomon) coding method is presented for efficient video transmission over the Internet. Featured by weighted moving average rate control and TCP-friendliness, AVSP, a novel adaptive video streaming protocol, is designed with adjustable rate control parameters so as to respond quickly to the QoS status fluctuation during video transmission over the Internet. Combined with congestion control policy, an adaptive RS coding error recovery scheme with variable parameters is presented to enhance the robustness of MPEG video transmission over the Internet with restriction to the total system bandwidth .展开更多
文摘An error tolerant hardware efficient verylarge scale integration （VLSI） architecture for bitparallel systolic multiplication over dual base, which canbe pipelined, is presented. Since this architecture has thefeatures of regularity, modularity and unidirectionaldata flow, this structure is well suited to VLSIimplementations. The length of the largest delay pathand area of this architecture are less compared to the bitparallel systolic multiplication architectures reportedearlier. The architecture is implemented using Austria Micro System＇s 0.35 μm CMOS （complementary metaloxide semiconductor） technology. This architecture canalso operate over both the dual-base and polynomialbase.
基金Sponsored by the National High Technology Research and Development Program of China ("863"Program) (2007AA01Z293)
文摘Based on the Berlekamp-Massy （BM） algorithm for Reed-Solomon（RS） decoding, an improved version is proposed, which focuses on how to find the error locator polynomial using least iterative operations. The conditions to end the iterative operations is derived. As a special case, criterion of only one error symbol in one received codeword is derived as well. Steps are listed concerning the implementation of the improved iterative decoding algorithm, which is carried out as software on the platform of TI＇s C6416 DSP. Decoding performance and decoding-delay of both improved and original algorithms under different （n,k） conditions are simulated. The results of simulations demonstrate that the improved algorithm has less computational complexity when the number of errors in a received codeword is relatively small. Therefore, in channels with low noise power spectrum density, the improved algorithm results in less decoding-delay than BM algorithm.
文摘An approach based on adaptive congestion control and adaptive error recovery with RS (Reed-Solomon) coding method is presented for efficient video transmission over the Internet. Featured by weighted moving average rate control and TCP-friendliness, AVSP, a novel adaptive video streaming protocol, is designed with adjustable rate control parameters so as to respond quickly to the QoS status fluctuation during video transmission over the Internet. Combined with congestion control policy, an adaptive RS coding error recovery scheme with variable parameters is presented to enhance the robustness of MPEG video transmission over the Internet with restriction to the total system bandwidth .
