The study of lithographic variation in resistive random access memory

Reducing the process variation is a significant concern for resistive random access memory(RRAM).Due to its ultrahigh integration density,RRAM arrays are prone to lithographic variation during the lithography process,introducing electrical variation among different RRAM devices.In this work,an optical physical verification methodology for the RRAM array is developed,and the effects of different layout parameters on important electrical characteristics are systematically investigated.The results indicate that the RRAM devices can be categorized into three clusters according to their locations and lithography environments.The read resistance is more sensitive to the locations in the array(~30%)than SET/RESET voltage(<10%).The increase in the RRAM device length and the application of the optical proximity correction technique can help to reduce the variation to less than 10%,whereas it reduces RRAM read resistance by 4×,resulting in a higher power and area consumption.As such,we provide design guidelines to minimize the electrical variation of RRAM arrays due to the lithography process.

Advances of embedded resistive random access memory in industrial manufacturing and its potential applications

Embedded memory,which heavily relies on the manufacturing process,has been widely adopted in various industrial applications.As the field of embedded memory continues to evolve,innovative strategies are emerging to enhance performance.Among them,resistive random access memory(RRAM)has gained significant attention due to its numerousadvantages over traditional memory devices,including high speed(<1 ns),high density(4 F^(2)·n^(-1)),high scalability(~nm),and low power consumption(~pJ).This review focuses on the recent progress of embedded RRAM in industrial manufacturing and its potentialapplications.It provides a brief introduction to the concepts and advantages of RRAM,discusses the key factors that impact its industrial manufacturing,and presents the commercial progress driven by cutting-edge nanotechnology,which has been pursued by manysemiconductor giants.Additionally,it highlights the adoption of embedded RRAM in emerging applications within the realm of the Internet of Things and future intelligent computing,with a particular emphasis on its role in neuromorphic computing.Finally,the review discusses thecurrent challenges and provides insights into the prospects of embedded RRAM in the era of big data and artificial intelligence.

Recent advances in organic-based materials for resistive memory applications

With the rapid development of data-driven human interaction,advanced datastorage technologies with lower power consumption,larger storage capacity,faster switching speed,and higher integration density have become the goals of future memory electronics.Nevertheless,the physical limitations of conventional Si-based binary storage systems lag far behind the ultrahigh-density requirements of post-Moore information storage.In this regard,the pursuit of alternatives and/or supplements to the existing storage technology has come to the forefront.Recently,organic-based resistive memory materials have emerged as promising candidates for next-generation information storage applications,which provide new possibilities of realizing high-performance organic electronics.Herein,the memory device structure,switching types,mechanisms,and recent advances in organic resistive memory materials are reviewed.In particular,their potential of fulfilling multilevel storage is summarized.Besides,the present challenges and future prospects confronted by organic resistive memory materials and devices are discussed.

Cellular automata basedmulti-bit stuck-at fault diagnosis for resistive memory

This paper presents a group-based dynamic stuck-at fault diagnosis scheme intended for resistive randomaccess memory(ReRAM).Traditional static random-access memory,dynamic random-access memory,NAND,and NOR flash memory are limited by their scalability,power,package density,and so forth.Next-generation memory types like ReRAMs are considered to have various advantages such as high package density,non-volatility,scalability,and low power consumption,but cell reliability has been a problem.Unreliable memory operation is caused by permanent stuck-at faults due to extensive use of write-or memory-intensive workloads.An increased number of stuck-at faults also prematurely limit chip lifetime.Therefore,a cellular automaton(CA)based dynamic stuck-at fault-tolerant design is proposed here to combat unreliable cell functioning and variable cell lifetime issues.A scalable,block-level fault diagnosis and recovery scheme is introduced to ensure readable data despite multi-bit stuck-at faults.The scheme is a novel approach because its goal is to remove all the restrictions on the number and nature of stuck-at faults in general fault conditions.The proposed scheme is based on Wolfram’s null boundary and periodic boundary CA theory.Various special classes of CAs are introduced for 100%fault tolerance:single-lengthcycle single-attractor cellular automata(SACAs),single-length-cycle two-attractor cellular automata(TACAs),and single-length-cycle multiple-attractor cellular automata(MACAs).The target micro-architectural unit is designed with optimal space overhead.

Resistive Switching Memory of TiO2 Nanowire Networks Grown on Ti Foil by a Single Hydrothermal Method

The resistive switching characteristics of TiO_2 nanowire networks directly grown on Ti foil by a single-step hydrothermal technique are discussed in this paper. The Ti foil serves as the supply of Ti atoms for growth of the TiO_2 nanowires, making the preparation straightforward. It also acts as a bottom electrode for the device. A top Al electrode was fabricated by e-beam evaporation process. The Al/TiO_2 nanowire networks/Ti device fabricated in this way displayed a highly repeatable and electroforming-free bipolar resistive behavior with retention for more than 10~4 s and an OFF/ON ratio of approximately 70. The switching mechanism of this Al/TiO_2 nanowire networks/Ti device is suggested to arise from the migration of oxygen vacancies under applied electric field. This provides a facile way to obtain metal oxide nanowire-based Re RAM device in the future.

Observation of Resistive Switching Memory by Reducing Device Size in a New Cr/CrO_x/TiO_x/TiN Structure

The resistive switching memory characteristics of 100 randomly measured devices were observed by reducing device size in a Cr/Cr Ox/Ti Ox/Ti N structure for the first time.Transmission electron microscope image confirmed a viahole size of 0.4 lm.A 3-nm-thick amorphous Ti Oxwith 4-nm-thick polycrystalline Cr Oxlayer was observed.A small 0.4-lm device shows reversible resistive switching at a current compliance of 300 l A as compared to other larger size devices(1–8 lm)owing to reduction of leakage current through the Ti Oxlayer.Good device-to-device uniformity with a yield of[85%has been clarified by weibull distribution owing to higher slope/shape factor.The switching mechanism is based on oxygen vacancy migration from the Cr Oxlayer and filament formation/rupture in the Ti Oxlayer.Long read pulse endurance of[105cycles,good data retention of 6 h,and a program/erase speed of 1 ls pulse width have been obtained.

Improved resistive switching stability of Pt/ZnO/CoO_x /ZnO/Pt structure for nonvolatile memory devices

For Pt(Ag)/ZnO single-layer/Pt structure,random 10 formation and rupture of conductive filaments composed by oxygen vacancies or metallic ions often cause dispersion problems of resistive switching(RS)parameters,which is disadvantageous to devices application.In this study,ZnO/CoOx/ZnO(ZCZ)tri-layers were utilized as the switching layers to investigate their RS properties as compared with ZnO-based single-layer devices.It is interestingly noted that Pt/ZCZ/Pt devices show quite stable bipolar RS behaviors with little resistance value fluctuations compared to Ag/ZCZ/Pt devices and Pt(Ag)/ZnO/Pt devices,which minimize the dispersion of the resistances of RS.This highly stable RS effect of Pt/ZCZ/Pt structure would be promising for high density memory devices.

Flexible and degradable resistive switching memory fabricated with sodium alginate

Transient electronics has attracted interest as an emerging technology to solve electronic-waste problem,due to its physically vanishing ability in solution.Here in this work,we demonstrate a flexible and degradable transient resistive switching(RS) memory device with simple structure of Cu/sodium alginate(SA)/ITO.The device presents excellent RS characteristics as well as high flexibility,including low operating voltage(<1.5 V) and multilevel RS behavior.No performance degradation occurs after bending the device 50 times.Moreover,our device can be absolutely dissolved in deionized water.The proposed SA-based transient memory device has great potential for the development of green and security memory devices.

Resistive switching memory for high density storage and computing

The resistive random access memory(RRAM)has stimulated a variety of promising applications including programmable analog circuit,massive data storage,neuromorphic computing,etc.These new emerging applications have huge demands on high integration density and low power consumption.The cross-point configuration or passive array,which offers the smallest footprint of cell size and feasible capability of multi-layer stacking,has received broad attention from the research community.In such array,correct operation of reading and writing on a cell relies on effective elimination of the sneaking current coming from the neighboring cells.This target requires nonlinear I-V characteristics of the memory cell,which can be realized by either adding separate selector or developing implicit build-in nonlinear cells.The performance of a passive array largely depends on the cell nonlinearity,reliability,on/off ratio,line resistance,thermal coupling,etc.This article provides a comprehensive review on the progress achieved concerning 3D RRAM integration.First,the authors start with a brief overview of the associative problems in passive array and the category of 3D architectures.Next,the state of the arts on the development of various selector devices and self-selective cells are presented.Key parameters that influence the device nonlinearity and current density are outlined according to the corresponding working principles.Then,the reliability issues in 3D array are summarized in terms of uniformity,endurance,retention,and disturbance.Subsequently,scaling issue and thermal crosstalk in 3D memory array are thoroughly discussed,and applications of 3D RRAM beyond storage,such as neuromorphic computing and CMOL circuit are discussed later.Summary and outlooks are given in the final.

Atomic crystals resistive switching memory

Facing the growing data storage and computing demands, a high accessing speed memory with low power and non- volatile character is urgently needed. Resistive access random memory with 4F2 cell size, switching in sub-nanosecond, cycling endurances of over 1012 cycles, and information retention exceeding 10 years, is considered as promising next- generation non-volatile memory. However, the energy per bit is still too high to compete against static random access memory and dynamic random access memory. The sneak leakage path and metal film sheet resistance issues hinder the further scaling down. The variation of resistance between different devices and even various cycles in the same device, hold resistive access random memory back from commercialization. The emerging of atomic crystals, possessing fine interface without dangling bonds in low dimension, can provide atomic level solutions for the obsessional issues. Moreover, the unique properties of atomic crystals also enable new type resistive switching memories, which provide a brand-new direction for the resistive access random memory.

Analysis and modeling of resistive switching mechanisms oriented to resistive random-access memory

With the progress of the semiconductor industry,the resistive random-access memory（RAM） has drawn increasing attention.The discovery of the memristor has brought much attention to this study.Research has focused on the resistive switching characteristics of different materials and the analysis of resistive switching mechanisms.We discuss the resistive switching mechanisms of different materials in this paper and analyze the differences of those mechanisms from the view point of circuitry to establish their respective circuit models.Finally,simulations are presented.We give the prospect of using different materials in resistive RAM on account of their resistive switching mechanisms,which are applied to explain their resistive switchings.

Resistive switching characteristic and uniformity of low-power HfO_x-based resistive random access memory with the BN insertion layer

In this letter,the Ta/HfO/BN/TiN resistive switching devices are fabricated and they exhibit low power consumption and high uniformity each.The reset current is reduced for the HfO/BN bilayer device compared with that for the Ta/HfO/TiN structure.Furthermore,the reset current decreases with increasing BN thickness.The HfOlayer is a dominating switching layer,while the low-permittivity and high-resistivity BN layer acts as a barrier of electrons injection into TiN electrode.The current conduction mechanism of low resistance state in the HfO/BN bilayer device is space-chargelimited current(SCLC),while it is Ohmic conduction in the HfOdevice.

Analysis of tail bits generation of multilevel storage in resistive switching memory

The tail bits of intermediate resistance states（IRSs） achieved in the SET process（IRSS） and the RESET process（IRSR） of conductive-bridge random-access memory were investigated. Two types of tail bits were observed, depending on the filament morphology after the SET/RESET operation.（i） Tail bits resulting from lateral diffusion of Cu ions introduced an abrupt increase of device resistance from IRS to ultrahigh-resistance state, which mainly happened in IRSS.（ii） Tail bits induced by the vertical diffusion of Cu ions showed a gradual shift of resistance toward lower value. Statistical results show that more than 95% of tail bits are generated in IRSS. To achieve a reliable IRS for multilevel cell（MLC） operation, it is desirable to program the IRS in RESET operation. The mechanism of tail bit generation that is disclosed here provides a clear guideline for the data retention optimization of MLC resistive random-access memory cells.

Thermal stability and data retention of resistive random access memory with HfOx/ZnO double layers

As an industry accepted storage scheme, hafnium oxide（HfO_x） based resistive random access memory（RRAM）should further improve its thermal stability and data retention for practical applications. We therefore fabricated RRAMs with HfO_x/ZnO double-layer as the storage medium to study their thermal stability as well as data retention. The HfO_x/ZnO double-layer is capable of reversible bipolar switching under ultralow switching current（〈 3 μA） with a Schottky emission dominant conduction for the high resistance state and a Poole–Frenkel emission governed conduction for the low resistance state. Compared with a drastically increased switching current at 120℃ for the single HfO_x layer RRAM, the HfO_x/ZnO double-layer exhibits excellent thermal stability and maintains neglectful fluctuations in switching current at high temperatures（up to 180℃）, which might be attributed to the increased Schottky barrier height to suppress current at high temperatures. Additionally, the HfO_x/ZnO double-layer exhibits 10-year data retention @85℃ that is helpful for the practical applications in RRAMs.

Graphene resistive random memory - the promising memory device in next generation

Graphene-based resistive random access memory （GRRAM） has grasped researchers＇ attention due to its merits com- pared with ordinary RRAM. In this paper, we briefly review different types of GRRAMs. These GRRAMs can be divided into two categories： graphene RRAM and graphene oxide （GO）/reduced graphene oxide （rGO） RRAM. Using graphene as the electrode, GRRAM can own many good characteristics, such as low power consumption, higher density, transparency, SET voltage modulation, high uniformity, and so on. Graphene flakes sandwiched between two dielectric layers can lower the SET voltage and achieve multilevel switching. Moreover, the GRRAM with rGO and GO as the dielectric or electrode can be simply fabricated. Flexible and high performance RRAM and GO film can be modified by adding other materials layer or making a composite with polymer, nanoparticle, and 2D materials to further improve the performance. Above all, GRRAM shows huge potential to become the next generation memory.

Synthesis of benzo[b]phosphole-based alkynylgold(I)complexes with resistive memory properties modulated by donor–acceptor chromophores

A class of benzo[b]phosphole-based alkynylgold(I)complexes has been synthesized and characterized.These complexes share a similar benzo-[b]phosphole ligand,in which the phosphole moiety is substituted with variousπ-conjugated units with different donor strengths,namely phenoxazinylphenyl,tris(di-tert-butylcarbazolyl)phenyl and 2,4-dimethylphenyl moieties.These phosphole-containing gold(I)complexes are found to be strongly luminescent in toluene with tunable emission maxima and possess solvatochromic behaviors,suggesting an emission of metal-perturbed intraligand charge transfer origin.Cyclic voltammetry studies reveal that the presence of gold(I)metal center strongly perturbs the electronic properties of the phosphole moiety of the resultant complexes,which can be further finetuned by the auxiliary ligand on the gold(I)center.In the resistive memory studies,devices based on these alkynylgold(I)complexes exhibit satisfactory binary memory behaviors,demonstrating low threshold voltages in narrow distributions,high durability and low misreading rates.Such performances are believed to be originated from a field-induced charge transfer of the alkynylgold(I)complexes,in which the electron-accepting phosphole-gold(I)unit plays a crucial role in stabilizing the charge transfer state and that led to the observed resistive switching and memory behavior.

Analysis of the resistive switching behaviors of vanadium oxide thin film

We demonstrate the polarization of resistive switching for a Cu/VOx/Cu memory cell.The switching behaviors of Cu/VOx/Cu cell are tested by using a semiconductor device analyzer（Agilent B1500A）,and the relative micro-analysis of I-V characteristics of VOx/Cu is characterized by using a conductive atomic force microscope（CAFM）.The I-V test results indicate that both the forming and the reversible resistive switching between low resistance state（LRS） and high resistance state（HRS） can be observed under either positive or negative sweep.The CAFM images for LRS and HRS directly exhibit evidence for the formation and rupture of filaments based on positive or negative voltage.The Cu/VOx/Cu sandwiched structure exhibits reversible resistive switching behavior and shows potential applications in the next generation of nonvolatile memory.

Bipolar resistive switching in Cr-doped TiO_x thin films

The electric-pulse-induced resistive switching effect is studied for Tio.s5Cro.15Ox （TCO） films grown on Ir-Si substrates by pulsed laser deposition. Such a TCO device exhibits bipolar switching behaviour with an electric-pulse- induced resistance ratio as large as about 1000% and threshold voltages smaller than 2 V. The resistive switching characteristics may be understood by resistance changes of a Schottky junction composed of a metal and an n-type semiconductor, and its nonvolatility is attributed to the movement of oxygen vacancies near the interface.

Resistive switching characteristics of Ti/ZrO_2/Pt RRAM device

In this paper, the bipolar resistive switching characteristic is reported in Ti/ZrO2/Pt resistive switching memory de- vices. The dominant mechanism of resistive switching is the formation and rupture of the conductive filament composed of oxygen vacancies. The conduction mechanisms for low and high resistance states are dominated by the ohmic conduc- tion and the trap-controlled space charge limited current （SCLC） mechanism, respectively. The effect of a set compliance current on the switching parameters is also studied： the low resistance and reset current are linearly dependent on the set compliance current in the log-log scale coordinate; and the set and reset voltage increase slightly with the increase of the set compliance current. A series circuit model is proposed to explain the effect of the set compliance current on the resistive switching behaviors.

TiOx-based self-rectifying memory device for crossbar WORM memory array applications

Resistive switching with a self-rectifying feature is one of the most effective solutions to overcome the crosstalk issue in a crossbar array. In this paper, a memory device based on Pt/TiO_(x)/W structure with self-rectifying property is demonstrated for write-once-read-many-times(WORM) memory application. After programming, the devices exhibit excellent uniformity and keep in the low resistance state(LRS) permanently with a rectification ratio as high as 10^(4) at ±1 V. The self-rectifying resistive switching behavior can be attributed to the Ohmic contact at TiO_(x)/W interface and the Schottky contact at Pt/TiO_(x) interface. The results in this paper demonstrate the potential application of TiO_(x)-based WORM memory device in crossbar arrays.