Winter-spring minimum temperature variations inferred from tree-ring δ^(13)C in southeastern China

Long-term temperature variations inferred from high-resolution proxies provide an important context to evaluate the intensity of current warming.However,tem-perature reconstructions in humid southeastern China are scarce and particularly lack long-term data,limiting us to obtain a complete picture of regional temperature evolution.In this study,we present a well-verified reconstruction of winter-spring(January–April)minimum temperatures over southeastern China based on stable carbon isotopic(δ^(13)C)records of tree rings from Taxus wallichiana var.mairei from 1860 to 2014.This reconstruction accounted for 56.4%of the total observed variance.Cold periods occurred during the 1860s–1910s and 1960s–1970s.Although temperatures have had an upward trend since the 1920s,most of the cold extremes were in recent decades.The El Niño-Southern Oscillation(ENSO)variance acted as a key modulator of regional winter-spring minimum temperature variability.However,teleconnections between them were a nonlinear process,i.e.,a reduced or enhanced ENSO variance may result in a weakened or intensified temperature-ENSO relationship.

Ring Oscillator for 60 Meter Bandwidth

The 60-meter band range is tremendously useful in telecommunication,military and governmental applications.The I.T.U.(International Telecommunication Union)required isolationism to former radio frequency services because the various frequency bands are extremely overloaded.The allocation of new frequency bands are a lengthy procedure as well as time taking.As a result,the researchers use bidirectional,amateur radio frequency communication for 60-meter band,usually the frequency slot of 5250-5450 KHz,although the entire band is not essentially obtainable for all countries.For transmission and reception of these frequencies,a local oscillator is used in the mixer unit to generate the local signal for mixing the input and reference signals.For this function different type of oscillators are used.In this paper,a three-stage ring oscillator is designed with 1 V supply.Ring oscillators(RO)is the base to explore like to identifying,specify with modelling resources in the disparity in behaviour of the circuit in terms of industrialized design and layout parameters.This type of oscillators are free from noise as inductor is not used to the circuit as in LC oscillator,Heartly oscillator,Colpitt and tuned oscillators.The present approach of circuit designing,the scaling of CMOS(Complementary Metal Oxide Semiconductor)transistor will moderate,the procedure variability.In the forthcoming article,a ring oscillator with fixed capacitor(1 pF)and with variable capacitors(1 to 100 pF)is analysed.The frequency analysis with different capacitor is performed.The total delay of 3-stage oscillator is 4.82 ns with 5.2 MHz oscillation frequency.The overall Power dissipation of the circuit is 1.852μWat 1 V supply.The simulation analysis is performed on 45 nm CMOS technology with both transistor width are 278 and 420 nm.

Dual-Delay-Path Ring Oscillator with Self-Biased Delay Cells for Clock Generation

This work summarizes the structure and operating features of a high-performance 3-stage dual-delay-path (DDP) voltage-controlled ring oscillator (VCRO) with self-biased delay cells for Phase-Locked Loop (PLL) structurebased clock generation and digital system driving. For a voltage supply VDD = 1.8 V, the resulting set of performance parameters include power consumption PDC = 4.68 mW and phase noise PN@1MHz = -107.8 dBc/Hz. From the trade-off involving PDC and PN, a system level high performance is obtained considering a reference figure-of-merit ( FoM = -224 dBc/Hz ). Implemented at schematic level by applying CMOS-based technology (UMC L180), the proposed VCRO was designed at Cadence environment and optimized at MunEDA WiCkeD tool.

A Low Jitter Design of Ring Oscillators in 1.25GHz Serdes

A new configuration for delay cells used in voltage controlled oscillators is presented. A jitter comparison between the source-coupled differential delay cell and the proposed CMOS inverter based delay cell is given. A new method to optimize loop parameters based on low-jitter in PLL is also introduced. A low-jitter 1.25GHz Serdes is implemented in a 0.35μm standard 2P3M CMOS process. The result shows that the RJ （random jitter） RMS of 1.25GHz data rate series output is 2. 3ps （0. 0015UI） and RJ （1 sigma） is 0. 0035UI. A phase noise measurement shows - 120dBc/Hz@100kHz at 1111100000 clock-pattern data out.

Effects of Semi-floating Ring Bearing Outer Clearance on the Subsynchronous Oscillation of Turbocharger Rotor

Semi-floating ring bearing（SFRB） is developed to control the vibration of turbocharger rotor. The outer clearance of SFRB affects the magnitude and frequency of nonlinear whirl motion, which is significant for the design of turbocharger. In order to explore the effects of outer clearance, a transient finite element analysis program for rotor and oil film bearing is built and validated by a published experimental case. The nonlinear dynamic behaviors ofrotor-SFRB system are simulated. According to the simulation results, two representative subsynchronous oscillations excited by the two hearings respectively are discovered. As the outer clearance of SFRB increases from 24 ~tm to 60 pro, the low-frequency subsynchronous oscillation experiences three steps, including a strong start, a gradual recession and a combination with the other one. At the same time, the high-frequency subsynchronous oscillation starts to appear gradually, then strengthens, and finally combines. If gravity and unbalance are neglected, the combination will start starts from high rotor speed and extents to low rotor speed, just like a ＂zipper＂. It is found from the quantitative analysis that when the outer clearance increases, the vibration amplitude experiences large value firstly, then reduction, and suddenly increasing after combination. A useful design principle of SFRB outer clearance for minimum vibration amplitude is proposed： the outer clearance value should be chosen to keep the frequency of two subsynchronous oscillations clearly separated and their amplitudes close.

A spatiotemporal signal processing technique for wafer-scale IC thermomechanical stress monitoring by an infrared camera

In this paper, we describe a new silicon-die thermal monitoring approach using spatiotemporal signal processing technique for Wafer-Scale IC thermome- chanical stress monitoring. It is proposed in the context of a wafer-scale-based (WaferICTM) rapid prototyping platform for electronic systems. This technique will be embedded into the structure of the WaferIC, and will be used as a preventive measure to protect the wafer from possible damages that can be caused by excessive thermomechanical stress. The paper also presents spatial and spatiotemporal algorithms and the experimental results from an IR images collection campaign conducted using an IR camera.

Conductance Oscillations through an Aharonov Bohm Ring with a Quantum Gate

Based on a one dimensional quantum wave guide theory, we investigate the ballistic conductance through an Aharonov Bohm ring with a quantum gate. The analytical expression of the conductance is exactly obtained as the function of magnetic flux penetrating the ring and Fermi energy of indcident electrons. When Fermi energy equals that of bound states in the isolated stub, the conductance is fixed at a constant value which is only determined by the geometric structure of the ring system. We have found that there are a new kind of conductance oscillations for some special mesoscopic ring systems. As Fermi energy of incident electrons crosses that of bound state in the isolated stub, the conductance oscillations have no abrupt change of phase by π and are in phase. This striking feature is not in ageement with that of previous experiments and theories. The mechanism causing this new feature is discussed.

Quantum Rings with Two Deeply Bound Electrons under a Magnetic Field

A model is proposed to study the quantum rings with two deeply bound electrons under a variable magnetic field. The emphasis is placed to clarify the effect of the size （diameter） and the width of the ring on the fractional Aharonov-Bohm oscillation. It was found that the reduction of size will lead to a very strong oscillation in the ground state energy and in the persistent current. The electronic correlation has also been demonstrated by showing the nodal structures of wave functions.

Collective Behavior of a Ring of Van Der Pol Oscillators under Gaussian and Random Coupling Schemes

The collective behavior of a ring of coupled identical van der Pol oscillators is numerically studied in this work. Constant, gaussian and random distributions of the coupling parameter along the ring are considered. Three values of the oscillators constant are assumed in order to cover from quasilinear to nonlinear dynamic performance. Single and multiple coupled frequencies are obtained using power spectra of the long term time series. Phase portraits are obtained from numerical simulations, and the coupled behavior is analyzed, compared and discussed.

Millimeter Wave Ring Oscillator Using Carbon Nano-Tube Field Effect Transistor in 150 GHz and Beyond

Carbon Nano-Tube Field Effect Transistors (CNTFETS) are the competitor of the conventional MOSFET technology due to their higher current drive capability, ballistic transport, lesser power delay product, higher thermal stability, and so on. Based on these promising properties of CNTFETs, a CNTFET-based millimeter wave ring oscillator operating around 150 GHz and beyond is introduced here in 32 nm technology node. To prevent overestimation, the CNT interconnects between transistors are also included in simulation, which are assumed to be a single layer of ballistic metallic CNTs in parallel. For the sake of simplicity in RF design, the oscillator is based on CNTFET-based inverters. The inverters with DC gain of 87.5 dB are achieved by proper design with the non-loaded delay around 0.6 ps, which is at least one order of magnitude better than the same 32 nm MOSFET-based inverters. The oscillator’s average power consumption is as low as 40 μW with the fundamental harmonic amplitude of around –6.5 dB. These values are, based on our knowledge, for the first time reported in the literature in CNTFET-based oscillator designs. Also, on the average, the performance of the designed oscillator is 5 - 6 times better than MOSFET-based designs.

Frequency Performance of Ring Oscillators Based on a-IGZO Thin-Film Transistors

Ring oscillators based on indium gallium zinc oxide thin film transistors are fabricated on glass substrates. The oscillator circuit consists of seven delay stages and an output buffer inverter. The element inverter exhibits a voltage gain higher than -6 V/V and a wide output swing close to 85% of the full swing range. The dynamic performance of the ring oscillators is evaluated as a function of supply voltage and at different gate lengths. A maximum oscillation frequency of 0.88MHz is obtained for a supply voltage of 50V, corresponding to a propagation delay of less than 85 ns/stage.

The relativistic bound states for a new ring-shaped harmonic oscillator

In this paper a new ring-shaped harmonic oscillator for spin 1/2 particles is studied, and the corresponding eigenfunctions and eigenenergies are obtained by solving the Dirac equation with equal mixture of vector and scalar potentials. Several particular cases such as the ring-shaped non-spherical harmonic oscillator, the ring-shaped harmonic oscillator, non-spherical harmonic oscillator, and spherical harmonic oscillator are also discussed.

Exact solutions of the Klein-Gordon equation with ring-shaped oscillator potential by using the Laplace integral transform

We present exact solutions for the Klein Gordon equation with a ring-shaped oscillator potential. The energy eigenvalues and the normalized wave functions are obtained for a particle in the presence of non-central oscillator potential. The angulm＂ functions are expressed in terms of the hypergeometric functions. The radial eigenfunetions have been obtained by using the Laplace integral transform. By means of the Laplace transform method, which is efficient and simple, the radial Klein-Gordon equation is reduced to a first-order differential equation.

一种基于频差自校准的高精度RC振荡器

提出了一种基于频差自校准的高精度RC振荡器。通过对PTAT高频环形振荡器时钟计数,得到RC振荡器和参考时钟的计数偏差。数字自校准电路通过电阻阵列校准参考电压,减小计数偏差,进而得到稳定的振荡频率。参考时钟仅在工作前校准,实际工作中不需要额外的参考时钟。该RC振荡器采用CSMC 0.18μm工艺,工作电压为1.8 V。仿真结果表明,该电路可以产生2 MHz的稳定振荡频率,整个系统的功耗为48.4μW,启动时间小于15μs。在-40~125℃温度范围内,振荡频率变化率小于±0.2%。在1.70~1.98 V供电电压范围内,振荡频率变化率小于±0.25%/V。

一种支持SoC数字电路老化及寿命的评估方法

使用Spice可靠性仿真技术和高温稳态寿命(HTOL)实验相结合的方法,研究不同的MOSFET器件组成的环振电路在持续翻转状态下,不同应力时间和应力电压对其寿命退化的影响。依据仿真结果和Power-Law模型建立数字电路的寿命预测理论模型。通过HTOL实验验证模型的准确性。结果表明,随着时间的增加,器件的寿命退化率逐渐增加,且随着时间的推移,寿命的变化率越来越小。随着应力电压的增加,器件的寿命退化率更快趋向于稳定。器件退化符合R-D模型,仿真结果与试验结果高度,进一步证实了本模型对SoC数字电路寿命预测的准确性。通过这种组合仿真和实验的方法,可以更加准确地评估数字电路的寿命,为芯片制造过程中的可靠性设计提供参考。

基于时钟抖动流水线结构的高效率真随机数发生器

现代加密系统对密钥随机性的需求不断增加。使用时序抖动、热噪声、亚稳态等作为熵源的真随机数发生器,因其可以提供高质量的随机性成为该领域的研究热点。因此,提出一种可配置、轻量级、高效率的真随机数发生器。该发生器使用基于随机数学模型的设计方法,由差分构架的两级时钟抖动流水线组成。第一级流水线中两个环形振荡器在规定时间内累积抖动,第二级流水线利用近似相同的两个环形振荡器的微小周期差构建时间数字转换器,对第一级输出的高斯抖动进行量化,通过数字化模块输出随机比特。在时间数字转换器运行过程中,第一级流水线已经重新启动累积下一个阶段的抖动,减少了空闲时间,提高了真随机数的质量和效率。在Xilinx Atrix-7平台进行了验证,该结构的硬件资源仅消耗了25个LUTs和13个DFFs,获得高达32.55 Mb/s的吞吐量。

4H-SiC CMOS高温集成电路设计与制造

设计、制造并测试了基于碳化硅材料的横向MOSFET器件和CMOS电路。常温时,N型和P型MOSFET在片测试的阈值电压分别约为5.4 V和-6.3 V;温度达到300℃时,N型和P型MOSFET的阈值电压分别为4.3 V和-5.3 V。由N型和P型MOSFET组成的CMOS反相器在常温下输出的上升时间为1.44μs,下降时间为2.17μs,且在300℃高温条件下仍可正常工作。由CMOS反相器级联成的环形振荡器在常温下的测试工作频率为147 kHz,在高温下也可正常工作。

改进的可配置RO PUF及其实现

为增加从FPGA芯片的物理特性中提取出的ID数量,更好地用于设备认证等用途,对Maiti的"可配置基于环形振荡器的物理不可克隆功能"(ring-oscillator-based physical unclonable function,RO PUF)进行改进。在基本RO PUF的基础上,增加"可调延时单元",在FPGA开发平台上进行实验。实验结果表明,改进后的RO PUF可以显著增加提取出的ID数量,提高片内逻辑阵列块(logic array block,LAB)的资源利用率,提高ID的"片内稳定性"和"片间差异性",验证了其有效性和可行性。

一种基于电容充放电的低功耗时钟发生器

基于SMIC 0.18μm CMOS工艺,设计了一种基于电容充放电的新型低功耗时钟发生器。为了减小温度变化引起的频率波动,设计了负温度系数偏置电路。采用了传统的占空比调节电路,可调节振荡波形的占空比。仿真结果显示,在3.3 V电源电压下,该振荡器可以稳定输出7.16 MHz频率的信号,相位噪声为-104.4 dBc/Hz,系统功耗为1.411 mW,其中环形振荡器功耗为0.811 mW。在-40℃~110℃温度变化范围内,振荡器的频率变化为7.116~7.191 MHz,容差在1.05%以内。同其他时钟发生器相比,该电路具有结构简单、功耗低,以及在宽温度范围内具有较高的频率稳定性等显著特点,能够满足芯片的工作要求,为芯片提供稳定时钟。