To improve the total-dose radiation hardness,silicon-on-insulator （SOI） wafers fabricated by the separation-by-implanted-oxygen （SIMOX） method are modified by Si ion implantation into the buried oxide with a post ...To improve the total-dose radiation hardness,silicon-on-insulator （SOI） wafers fabricated by the separation-by-implanted-oxygen （SIMOX） method are modified by Si ion implantation into the buried oxide with a post anneal. The ID- VG characteristics can be tested with the pseudo-MOSFET method before and after radiation. The results show that a proper Si-ion-implantation method can enhance the total-dose radiation tolerance of the materials.展开更多
In order to suppress drain-induced barrier lowering in dual material gate SOI MOSFETs,halo doping is used in the channel near the source. Two-dimensional analytical models of surface potential and threshold voltage fo...In order to suppress drain-induced barrier lowering in dual material gate SOI MOSFETs,halo doping is used in the channel near the source. Two-dimensional analytical models of surface potential and threshold voltage for the novel SOI MOSFET are developed based on the explicit solution of the two-dimensional Poisson＇s equation. Its characteristic improvement is investigated. It is concluded that the novel structure exhibits better suppression of drain-induced barrier lowering and higher carrier transport efficiency than conventional dual material gate SOI MOSFETs. Its drain-induced barrier lowering decreases with increasing halo doping concentration but does not change monotonically with halo length. The analytical models agree well with the two-dimensional device simulator MEDICI.展开更多
A dual material gate silicon-on-insulator MOSFET with asymmetrical halo is presented to improve short channel effect and carder transport efficiency for the first time. The front gate consists of two metal gates with ...A dual material gate silicon-on-insulator MOSFET with asymmetrical halo is presented to improve short channel effect and carder transport efficiency for the first time. The front gate consists of two metal gates with different work functions by making them contacting laterally, and the channel is more heavily doped near the source than in the rest. Using a three-region polynomial potential distribution and a universal boundary condition, a two-dimensional analytical model for the fully depleted silicon-on-insulator MOSFET is developed based on the explicit solution of two-dimensional Poisson＇s equation. The model includes the calculation of potential distribution along the channel and subthreshold current. The performance improvement of the novel silicon-on-insulator MOSFET is examined and compared with the traditional silicon-on-insulator MOSFET using the analytical model and two-dimensional device simulator MEDICI. It is found that the novel silicon-on-insulator MOSFET could not only suppress short channel effect, but also increase cartier transoort efficiency noticeably. The derived analytical model agrees well with MEDICI.展开更多
A novel patterned-SOI LDMOSFET with a silicon window beneath the p-type channel was designed and fabricated for RF power amplifier applications. This novel device has good DC and RF characteristics. It has no kink eff...A novel patterned-SOI LDMOSFET with a silicon window beneath the p-type channel was designed and fabricated for RF power amplifier applications. This novel device has good DC and RF characteristics. It has no kink effect on output performance,an off-state breakdown of up to 13V,and fT = 6GHz at DC bias of Vg = Vd = 3.6V.At 1.5GHz,a power-added efficiency （PAE） of 50% is achieved with an output power of up to 27dBm from this device.展开更多
DSOI,bulk Si and SOI MOSFETs are fabricated on the same die successfully using local oxygen implantation process.The thermal properties of the three kinds of devices are described and compared from simulation and mea...DSOI,bulk Si and SOI MOSFETs are fabricated on the same die successfully using local oxygen implantation process.The thermal properties of the three kinds of devices are described and compared from simulation and measurement.Both simulation and measurement prove that DSOI MOSFETs have the advantage of much lower thermal resistance of substrate and suffer less severe self heating effect than their SOI counterparts. At the same time,the electrical advantages of SOI devices can stay.The thermal resistance of DSOI devices is very close to that of bulk devices and DSOI devices can keep this advantage into deep sub micron realm.展开更多
This paper presents the total dose radiation performance of 0.8μm SOI CMOS devices fabricated with full dose SIMOX technology. The radiation performance is characterized by threshold voltage shifts and leakage curren...This paper presents the total dose radiation performance of 0.8μm SOI CMOS devices fabricated with full dose SIMOX technology. The radiation performance is characterized by threshold voltage shifts and leakage currents of transistors and standby currents of ASIC as functions of the total dose up to 500krad（Si）. The experimental results show that the worst case threshold voltage shifts of front channels are less than 320mV for pMOS transistors under off-gate radiation bias at 1Mrad（Si） and less than 120mV for nMOS transistors under on-gate radiation bias. No significant radiation-induced leakage current is observed in transistors to 1Mrad （Si）. The standby currents of ASIC are less than the specification of 5μA over the total dose range of 500krad（Si）.展开更多
文摘To improve the total-dose radiation hardness,silicon-on-insulator （SOI） wafers fabricated by the separation-by-implanted-oxygen （SIMOX） method are modified by Si ion implantation into the buried oxide with a post anneal. The ID- VG characteristics can be tested with the pseudo-MOSFET method before and after radiation. The results show that a proper Si-ion-implantation method can enhance the total-dose radiation tolerance of the materials.
文摘In order to suppress drain-induced barrier lowering in dual material gate SOI MOSFETs,halo doping is used in the channel near the source. Two-dimensional analytical models of surface potential and threshold voltage for the novel SOI MOSFET are developed based on the explicit solution of the two-dimensional Poisson＇s equation. Its characteristic improvement is investigated. It is concluded that the novel structure exhibits better suppression of drain-induced barrier lowering and higher carrier transport efficiency than conventional dual material gate SOI MOSFETs. Its drain-induced barrier lowering decreases with increasing halo doping concentration but does not change monotonically with halo length. The analytical models agree well with the two-dimensional device simulator MEDICI.
基金Project 60472003 supported by National Natural Science Foundation of China and 2005CB321701 by the State Key Development Program for BasicResearch of China
文摘A dual material gate silicon-on-insulator MOSFET with asymmetrical halo is presented to improve short channel effect and carder transport efficiency for the first time. The front gate consists of two metal gates with different work functions by making them contacting laterally, and the channel is more heavily doped near the source than in the rest. Using a three-region polynomial potential distribution and a universal boundary condition, a two-dimensional analytical model for the fully depleted silicon-on-insulator MOSFET is developed based on the explicit solution of two-dimensional Poisson＇s equation. The model includes the calculation of potential distribution along the channel and subthreshold current. The performance improvement of the novel silicon-on-insulator MOSFET is examined and compared with the traditional silicon-on-insulator MOSFET using the analytical model and two-dimensional device simulator MEDICI. It is found that the novel silicon-on-insulator MOSFET could not only suppress short channel effect, but also increase cartier transoort efficiency noticeably. The derived analytical model agrees well with MEDICI.
文摘A novel patterned-SOI LDMOSFET with a silicon window beneath the p-type channel was designed and fabricated for RF power amplifier applications. This novel device has good DC and RF characteristics. It has no kink effect on output performance,an off-state breakdown of up to 13V,and fT = 6GHz at DC bias of Vg = Vd = 3.6V.At 1.5GHz,a power-added efficiency （PAE） of 50% is achieved with an output power of up to 27dBm from this device.
文摘DSOI,bulk Si and SOI MOSFETs are fabricated on the same die successfully using local oxygen implantation process.The thermal properties of the three kinds of devices are described and compared from simulation and measurement.Both simulation and measurement prove that DSOI MOSFETs have the advantage of much lower thermal resistance of substrate and suffer less severe self heating effect than their SOI counterparts. At the same time,the electrical advantages of SOI devices can stay.The thermal resistance of DSOI devices is very close to that of bulk devices and DSOI devices can keep this advantage into deep sub micron realm.
文摘This paper presents the total dose radiation performance of 0.8μm SOI CMOS devices fabricated with full dose SIMOX technology. The radiation performance is characterized by threshold voltage shifts and leakage currents of transistors and standby currents of ASIC as functions of the total dose up to 500krad（Si）. The experimental results show that the worst case threshold voltage shifts of front channels are less than 320mV for pMOS transistors under off-gate radiation bias at 1Mrad（Si） and less than 120mV for nMOS transistors under on-gate radiation bias. No significant radiation-induced leakage current is observed in transistors to 1Mrad （Si）. The standby currents of ASIC are less than the specification of 5μA over the total dose range of 500krad（Si）.
