SoC已逐渐成为集成电路设计的主流发展趋势,而其中的微处理器部分尤为重要。选用LEON 2处理器核,是一款可合成的VHDL模型,是基于SPARC V 8结构的32位处理器,具有高度的可配置性,尤其适用于SoC设计,设计者可为其特定应用选择不同的外围设...SoC已逐渐成为集成电路设计的主流发展趋势,而其中的微处理器部分尤为重要。选用LEON 2处理器核,是一款可合成的VHDL模型,是基于SPARC V 8结构的32位处理器,具有高度的可配置性,尤其适用于SoC设计,设计者可为其特定应用选择不同的外围设备IP核。本文介绍了LEON 2处理器核的基本特征及其外围设备的IP核,主要讨论了基于LEON 2处理器的SoC设计。展开更多
A multiple MIPS 4Kc processor cores based interrupt processing system is introduced. The interrupt controller plays a key role in the high definition television （HDTV） system-on-a-chip （SoC） platform, especially w...A multiple MIPS 4Kc processor cores based interrupt processing system is introduced. The interrupt controller plays a key role in the high definition television （HDTV） system-on-a-chip （SoC） platform, especially when it is a multiple processor system. Based on a general introduction to the whole HDTV SoC platform, a layered interrupt controller and its implementation are discussed in detail. The proposed scheme was implemented in our FPGA verification board. The results indicate that our scheme is reliable and efficient. Meanwhile, as a functional intellectual property （IP）, the interrupt controller has reusability and expandability with the layered structure.展开更多
There are varieties of embedded systems in the world. It is a big challenge to optimize the instruction sets of System on Chips (SoCs) according to different systems' working environments. The idea of programmable...There are varieties of embedded systems in the world. It is a big challenge to optimize the instruction sets of System on Chips (SoCs) according to different systems' working environments. The idea of programmable instruction set is an effective method to gain embedded system's re-configurability. This letter presents a logic module for Java processor to be capable of using programmable instruction set. Cost (area, power, and timing) of the module is trivial. Such module is also reusable for other embedded system solutions besides Java systems.展开更多
文摘A multiple MIPS 4Kc processor cores based interrupt processing system is introduced. The interrupt controller plays a key role in the high definition television （HDTV） system-on-a-chip （SoC） platform, especially when it is a multiple processor system. Based on a general introduction to the whole HDTV SoC platform, a layered interrupt controller and its implementation are discussed in detail. The proposed scheme was implemented in our FPGA verification board. The results indicate that our scheme is reliable and efficient. Meanwhile, as a functional intellectual property （IP）, the interrupt controller has reusability and expandability with the layered structure.
基金Supported by the Guangzhou Key Technology R&D Program (No.2007Z2-D0011)
文摘There are varieties of embedded systems in the world. It is a big challenge to optimize the instruction sets of System on Chips (SoCs) according to different systems' working environments. The idea of programmable instruction set is an effective method to gain embedded system's re-configurability. This letter presents a logic module for Java processor to be capable of using programmable instruction set. Cost (area, power, and timing) of the module is trivial. Such module is also reusable for other embedded system solutions besides Java systems.
