This paper presents a frequency synthesizer architecture based on the time delay digital tanlock loop (TDTL). The loop is of the first order type. The synthesizer architecture includes an adaptation mechanism to keep ...This paper presents a frequency synthesizer architecture based on the time delay digital tanlock loop (TDTL). The loop is of the first order type. The synthesizer architecture includes an adaptation mechanism to keep the complete system in lock. The mechanism uses a frequency sensing structure to control critical TDTL parameters responsible for locking. Both integer and fractional multiples of the loop reference frequency are synthesized by the new architecture. The ability of the TDTL based frequency synthesizer to respond to sudden variations in the system input frequency is studied. The results obtained indicate the proposed synthesizer has a robust performance and is capable of responding to those changes provided that they are within the bounds of its locking region.展开更多
为适用CDMA各类收发机的射频本振的应用要求,研制了一种低杂散低相噪高分辨率的P波段频率合成器。利用DDS输出信号具有高分辨率和PLL具有窄带跟踪滤波特性,通过有效的频率规划和参数配置,规避了DDS由于相位截断近端杂散无法消除的缺陷,...为适用CDMA各类收发机的射频本振的应用要求,研制了一种低杂散低相噪高分辨率的P波段频率合成器。利用DDS输出信号具有高分辨率和PLL具有窄带跟踪滤波特性,通过有效的频率规划和参数配置,规避了DDS由于相位截断近端杂散无法消除的缺陷,有效抑制了DDS中DAC非线性和幅度量化误差引起的宽带杂散。通过仿真分析了方案的可行性,设计了样品并进行了测试。结果显示,所设计的频率合成器输出频率范围为755 MHz^765 MHz,频率分辨率为100.5 k Hz,杂散优于-71 d Bc,相位噪声优于-105 d Bc/Hz@1 k Hz。展开更多
文摘This paper presents a frequency synthesizer architecture based on the time delay digital tanlock loop (TDTL). The loop is of the first order type. The synthesizer architecture includes an adaptation mechanism to keep the complete system in lock. The mechanism uses a frequency sensing structure to control critical TDTL parameters responsible for locking. Both integer and fractional multiples of the loop reference frequency are synthesized by the new architecture. The ability of the TDTL based frequency synthesizer to respond to sudden variations in the system input frequency is studied. The results obtained indicate the proposed synthesizer has a robust performance and is capable of responding to those changes provided that they are within the bounds of its locking region.
文摘为适用CDMA各类收发机的射频本振的应用要求,研制了一种低杂散低相噪高分辨率的P波段频率合成器。利用DDS输出信号具有高分辨率和PLL具有窄带跟踪滤波特性,通过有效的频率规划和参数配置,规避了DDS由于相位截断近端杂散无法消除的缺陷,有效抑制了DDS中DAC非线性和幅度量化误差引起的宽带杂散。通过仿真分析了方案的可行性,设计了样品并进行了测试。结果显示,所设计的频率合成器输出频率范围为755 MHz^765 MHz,频率分辨率为100.5 k Hz,杂散优于-71 d Bc,相位噪声优于-105 d Bc/Hz@1 k Hz。
