An adaptive ramp generator based on linear histogram was proposed for the built-in selftest (BIST) of analog to digital convertor (ADC) in CMOS image sensor. By comparing the generated ramp signal to a reference volta...An adaptive ramp generator based on linear histogram was proposed for the built-in selftest (BIST) of analog to digital convertor (ADC) in CMOS image sensor. By comparing the generated ramp signal to a reference voltage and feeding back a calibration signal, the slope adjustment was implemented, and high linearity and precision of ramp slope were realized. By modulating the pulse width and reference voltage, sweep length varied from microsecond to second and signal swing could reach 3 V with 5.6 mW power consumption. The ramp was used as input to an ideal 10-bit single-slope ADC, and the corresponding DNL and INL were 0.032 LSB and 0.078 LSB, re-spectively.展开更多
This paper describes the method of built-in self-repairing of RAM on board, designs hardware circuit, and logic for the RAM's faults self-repairing system based on FPGA. The key technology is that it utilizes FPGA...This paper describes the method of built-in self-repairing of RAM on board, designs hardware circuit, and logic for the RAM's faults self-repairing system based on FPGA. The key technology is that it utilizes FPGA to test RAM according to some algorithm to find out failure memory units and replace the faulty units with FPGA. Then it can build a memory that has no fault concern to external controller, and realizes the logic binding between external controller and RAM. Micro Controller Unit (MCU) can operate external RAM correctly even if RAM has some fault address units. Conventional MCS-51 is used to simulate the operation of MCU operating external memory. Simulation shows FPGA can complete the faulty address units' mapping and MCU can normally read and write external RAM. This design realizes the RAM's built-in self-repairing on board.展开更多
基金National Natural Science Foundation of China(No.60576025)Tianjin Science and Technology Development Program (No.06YFGZGX03400)
文摘An adaptive ramp generator based on linear histogram was proposed for the built-in selftest (BIST) of analog to digital convertor (ADC) in CMOS image sensor. By comparing the generated ramp signal to a reference voltage and feeding back a calibration signal, the slope adjustment was implemented, and high linearity and precision of ramp slope were realized. By modulating the pulse width and reference voltage, sweep length varied from microsecond to second and signal swing could reach 3 V with 5.6 mW power consumption. The ramp was used as input to an ideal 10-bit single-slope ADC, and the corresponding DNL and INL were 0.032 LSB and 0.078 LSB, re-spectively.
文摘This paper describes the method of built-in self-repairing of RAM on board, designs hardware circuit, and logic for the RAM's faults self-repairing system based on FPGA. The key technology is that it utilizes FPGA to test RAM according to some algorithm to find out failure memory units and replace the faulty units with FPGA. Then it can build a memory that has no fault concern to external controller, and realizes the logic binding between external controller and RAM. Micro Controller Unit (MCU) can operate external RAM correctly even if RAM has some fault address units. Conventional MCS-51 is used to simulate the operation of MCU operating external memory. Simulation shows FPGA can complete the faulty address units' mapping and MCU can normally read and write external RAM. This design realizes the RAM's built-in self-repairing on board.
