Settling Time Design and Parameter Tuning Methods for Finite-Time P-PI Control

High precision position control and high speed control of the robot manipulators are fundamental and important control problems. The effectiveness of finite-time P-PI control was confirmed by end-effector position control of robot manipulators. However, parameter tuning method has not been proposed to finite-time P-PI control. In this paper, we propose a settling time design method and a parameter tuning method for the finite-time P-PI control. The effectiveness of the proposed parameter tuning method is confirmed by experiments of end-effcctor position control of a robot manipulator.

Fixed-Time Stabilization of High-Order Uncertain Nonlinear Systems:Output Feedback Control Design and Settling Time Analysis

This paper is devoted to stabilizing the high-order uncertain nonlinear system in a fixed time by output feedback control.First,a novel settling time solution method is proposed by establishing an indirect double system and using the comparison principle.Then a fixed-time observer and a neural networked based adaptive law are constructed to estimate the state and the unknown disturbance for the high-order uncertain nonlinear system.Furthermore,a fixed-time output feedback controller is proposed via the homogeneity technique.The upper bound of the settling time is analyzed for the closed-loop system under the proposed output feedback control.Finally,simulation examples are given to illustrate the effectiveness of the theoretical results.

A Novel Clock Feedthrough Frequency Compensation for Fast-Settling of Folded-Cascode OTA

Based on the minimum settling time （MST） theory and step-response analysis of the second order system in active switched capacitor （SC） networks, a novel clock feedthrough frequency compensation （CFFC） method for a folded-cascode OTA is proposed. The damping factor r/is adjusted by using MOS capacitors to introduce clock feedthrough so that the OTA can obtain the MST state and thus achieve fast settling. Research results indicate that the settling time of the compensated OTA is reduced by 22.7% ;as the capacitor load varies from 0.5 to 2.5pF,the improved settling time increases approximately linearly from 3.62 to 4.46ns： for VGA application, fast settling can also be achieved by modifying the MOS capacitor value accordingly when the closed loop gain of the compensated OTA varies.

INDIRECT ACCELERATED ADAPTIVE FUZZY CONTROLLER

According to a type of normal nonlinear system, an indirect adaptive fuzzy （IAF） controller has been applied to those systems where no accurate mathematical models of the systems under control are available. To satisfy with system performance, an indirect accelerated adaptive fuzzy （IAAF） controller is proposed, and its general form is presented. The general form IAAF controller ensures necessary control criteria and system＇s global stability using Lyapunov Theorem. It has been proved that the close-loop system error converges to a small neighborhood of equilibrium point. The optimal IAAF controller is derived to guarantee the process＇s shortest settling time. Simulation results indicate the IAAF controller make the system more stable, accurate, and fast.

Development of inclusions in 3104 alloy melt during heating and holding treatments

Developments in the contents of different typical inclusions in 3104 alloy melt were described during heating and holding processing. The settling process of inclusion particles was investigated by measuring the contents of inclusions in the surface, center, and bottom layers of the molten metal. In the results, main inclusions observed and determined by Prefil and PoD FA methods are MgO, Al2O3, spinel（MgAl2O4）, and TiB2 particles or thin films. It is found that some small particles of Al2O3 and MgO are transformed into spinel particles, and the formation rate increases as the temperature and the holding period of melt increase. The content of inclusions increases from 3.37 mm^2×kg^-1 to 7.54 mm^2×kg^-1 and then decreases to 3.08 mm^2×kg^-1 after holding for 90 min. This is attributed to a settling phenomenon and a significant increase in settling velocity after holding for 60 min. The content of inclusion particles decreases by means of settlement and flotation in liquid aluminum with an increase in holding time. The theoretical analysis and experiment results are in essential agreement with those from industrial production.

Feedback control for stochastic finite-time/fixed-time synchronization of stochastic coupled nonlinear systems

A novel feedback control is proposed to investigate the stochastic finite-time/fixed-time synchronization between two stochas-tic coupled nonlinear systems(SCNSs).Based on graph theory and Lyapunov function methods,some effective stochastic finite-time/fixed-time synchronization criteria for SCNSs are established.Finally,the examples are included to demonstrate our analytical results.

A 2-mW 50-dB DR wideband hybrid AGC for a GNSS receiver in 65 nm CMOS

A low-power wideband hybrid automatic gain control （AGC） loop for a GNSS receiver is presented. Single AGC in the I/Q path is composed of four-stage programmable gain amplifiers （PGAs）, a differential peak detector, two comparators, a control algorithm logic, a decoder and the reference voltage source. Besides being controlled by an AGC loop, the gain of PGAs could altematively be controlled by an off-chip digital baseband processor through the SPI interface. To obtain low power consumption and noise, an improved source degenerated amplifier is adopted, and the I/Q path phase mismatch within the ±5° range is calibrated with 0.2° accuracy. Implemented in 65 nm CMOS, the measured PGA total gains range from 9.8 to 59.5 dB with an average step of 0.95 dB and simulated bandwidth of more than 110 MHz. The settling time is about 180 μs with 80% AM input with measured signal power from -76.7 to -56.6 dBm from a radio-frequency amplifier （RFA） input port, and also reduces to 90 #s with clock frequency doubling. The single AGC consumes almost 0.8 mA current from the 2.5-V supply and occupies an area of 750 × 300 μm2.

A programmable gain amplifier with digitally assisted DC offset calibration for a direct-conversion WLAN receiver

This paper presents a programmable gain amplifier（PGA） circuit with a digitally assisted DC offset cancellation（DCOC） scheme for a direct conversion WLAN receiver.Implemented in a standard 0.13-μm CMOS process,the PGA occupies 0.39 mm2 die area and dissipates 6.5 mW power from a 1.2 V power supply.By using a single loop single digital-to-analog converter（DAC） mixed signal DC offset cancellation topology,the minimum DCOC settling time achieved is as short as 1.6μs with the PGA gain ranging from -8 to 54 dB in a 2 dB step.The DCOC loop utilizes a segmented DAC structure to lower the design complexity without sacrificing accuracy and a digital control algorithm to dynamically set the DCOC loop to fast or normal response mode,making the PGA circuit in compliance with the targeted WLAN specifications.