Comparative Study of Monolayer and Bilayer Epitaxial Graphene Field-Effect Transistors on SiC Substrates

Monolayer and bilayer graphenes have generated tremendous excitement as the potentially useful electronic materials due to their unique features. We report on monolayer and bilayer epitaxial graphene field-effect transistors （GFETs） fabricated on SiC substrates. Compared with monolayer GFETs, the bilayer GFETs exhibit a significant improvement in dc characteristics, including increasing current density I DS, improved transconductance g m, reduced sheet resistance lion, and current saturation. The improved electrical properties and tunable bandgap in the bilayer graphene lead to the excellent dc performance of the bilayer GFETs. Furthermore, the improved dc characteristics enhance a better rf performance for bilayer graphene devices, demonstrating that the quasifree-standing bilayer graphene on SiC substrates has a great application potential for the future graphene-based electronics.

High-Quality and Strain-Relaxation GaN Epilayer Grown on SiC Substrates Using AIN Buffer and AlGaN Interlayer

We study the effect of the AlGaN interlayer on structural quality and strain engineering of the GaN films grown on SiC substrates with an AlN buffer layer, hnproved structural quality and tensile stress releasing are realized in unintentionally doped GaN thin films grown on 6H-SiC substrates by metal organic chemical vapor deposition. Using the optimized AlGaN interlayer, we find that the full width at half maximum of x-ray diffraction peaks for GaN decreases dramatically, indicating an improved crystalline quality. Meanwhile, it is revealed that the biaxial tensile stress in the GaN film is significantly reduced from the Raman results. Photoluminescence spectra exhibit a shift of the peak position of the near-band-edge emission, as well as the integrated intensity ratio variation of the near-band-edge emission to the yellow luminescence band. Thus by optimizing the AlGaN interlayer, we could acquire the high-quality and strain-relaxation GaN epilayer with large thickness on SiC substrates.

A comparison of the field emission characteristics of vertically aligned graphene sheets grown on different SiC substrates

The field emission （FE） properties of vertically aligned graphene sheets （VAGSs） grown on different SiC substrates are reported. The VAGSs grown on nonpolar SiC （10-10） substrate show an ordered alignment with the graphene basal plane-parallel to each other, and show better FE features, with a lower turn-on field and a larger field enhancement factor. The VAGSs grown on polar SiC （000-1 ） substrate reveal a random petaloid-shaped arrangement and stable current emission over 8 hours with a maximum emission current fluctuation of only 4%. The reasons behind the differing FE characteristics of the VAGSs on different SiC substrates are analyzed and discussed.

Effect of surface morphology on the electron mobility of epitaxial graphene grown on 0° and 8° Si-terminated 4H-SiC substrates

Graphene with different surface morphologies were fabricated on 8°-off-axis and on-axis 4H-SiC（0001） substrates by high-temperature thermal decompositions. Graphene grown on Si-terminated 8°-off-axis 4H-SiC（0001） shows lower Hall mobility than the counterpart of on-axis SiC substrates. The terrace width is not responsible for the different electron mobility of graphene grown on different substrates, as the terrace width is much larger than the mean free path of the electrons. The electron mobility of graphene remains unchanged with an increasing terrace width on Si- terminated on-axis SiC. Interface scattering and short-range scattering are the main factors affecting the mobility of epitaxial graphene. After the optimization of the growth process, the Hall mobility of the graphene reaches 1770 cm^2/V.s at a carrier density of 9.8.×10^12 cm^-2. Wafer-size graphene was successfully achieved with an excellent double-layer thickness uniformity of 89.7% on a 3-inch SiC substrate.

Comparison of the formation epitaxial graphenes on Si- and process and properties of C-face 6H-SiC substrates

In this paper, the epitaxial graphene layers grown on Si- and C-face 6H-SiC substrates are investigated under a low pressure of 400 Pa at 1600℃ By using atomic force microscopy and Raman spectroscopy, we find that there are distinct differences in the formation and the properties between the epitaxial graphene layers grown on the Si-face and the C-face substrates, including the hydrogen etching process, the stacking type, and the number of layers. Hopefully, our results will be useful for improving the quality of the epitaxial graphene on SiC substrate.

Spectroscopic and scanning probe analysis on large-area epitaxial graphene grown under pressure of 4 mbar on 4H-SiC(0001)substrates

We produced epitaxial graphene under a moderate pressure of 4 mbar （about 400 Pa） at temperature 1600 ℃. Raman spectroscopy and optical microscopy were used to confirm that epitaxial graphene has taken shape continually with slight thickness variations and regularly with a centimeter order of magnitude on 4H-SiC （0001） substrates. Then using X-ray photoelectron spectroscopy and Auger electron spectroscopy, we analyzed the chemical compositions and estimated the layer number of epitaxial graphene. Finally, an atomic force microscope and a scanning force microscope were used to characterize the morphological structure. Our results showed that under 4-mbar pressure, epitaxial graphene could be produced on a SiC substrate with a large area, uniform thickness but a limited morphological property. We hope our work will be of benefit to understanding the formation process of epitaxial graphene on SiC substrate in detail.

Raman analysis of epitaxial graphene grown on 4H-SiC (0001) substrate under low pressure condition

In this paper, we report a feasible route of growing epitaxial graphene on 4H-SiC （0001） substrate in a low pressure of 4 mbar （1 bar=105 Pa） with an argon flux of 2 standard liters per minute at 1200, 1300, 1400, and 1500 ℃ in a commercial chemical vapour deposition SiC reactor. Using Raman spectroscopy and scanning electron microscopy, we confirm that epitaxial graphene evidently forms on SiC surface above 1300 ℃ with a size of several microns. By fitting the 2D band of Raman data with two-Lorentzian function, and comparing with the published reports, we conclude that epitaxial graphene grown at 1300 ℃ is four-layer graphene.

形成过程的比较和 Si 脸和 C 脸 6HSiC 底层上的取向附生的 graphenes 的性质

In this paper,the epitaxial graphene layers grown on Si-and C-face 6H-SiC substrates are investigated under a low pressure of 400 Pa at 1600 C.By using atomic force microscopy and Raman spectroscopy,we find that there are distinct differences in the formation and the properties between the epitaxial graphene layers grown on the Si-face and the C-face substrates,including the hydrogen etching process,the stacking type,and the number of layers.Hopefully,our results will be useful for improving the quality of the epitaxial graphene on SiC substrate.

Material removal rate of 6H-SiC crystal substrate CMP using an alumina(Al_2O_3) abrasive

The influences of the polishing slurry composition,such as the pH value,the abrasive size and its concentration,the dispersant and the oxidants,the rotational velocity of the polishing platen and the carrier and the polishing pressure,on the material removal rate of SiC crystal substrate（0001） Si and a（0001） C surface have been studied based on the alumina abrasive in chemical mechanical polishing（CMP）.The results proposed by our research here will provide a reference for developing the slurry,optimizing the process parameters,and investigating the material removal mechanism in the CMP of SiC crystal substrate.

An improved analytical model of 4H-SiC MESFET incorporating bulk and interface trapping effects

An improved analytical model for the current–voltage（I–V） characteristics of the 4H-SiC metal semiconductor field effect transistor（MESFET） on a high purity semi-insulating（HPSI） substrate with trapping and thermal effects is presented. The 4H-SiC MESFET structure includes a stack of HPSI substrates and a uniformly doped channel layer. The trapping effects include both the effect of multiple deep-level traps in the substrate and surface traps between the gate to source/drain. The self-heating effects are also incorporated to obtain the accurate and realistic nature of the analytical model. The importance of the proposed model is emphasised through the inclusion of the recent and exact nature of the traps in the 4H-SiC HPSI substrate responsible for substrate compensation.The analytical model is used to exhibit DC I–V characteristics of the device with and without trapping and thermal effects. From the results, the current degradation is observed due to the surface and substrate trapping effects and the negative conductance introduced by the self-heating effect at a high drain voltage. The calculated results are compared with reported experimental and two-dimensional simulations（Silvaco -TCAD）. The proposed model also illustrates the effectiveness of the gate–source distance scaling effect compared to the gate–drain scaling effect in optimizing 4H-SiC MESFET performance. Results demonstrate that the proposed I–V model of 4H-SiC MESFET is suitable for realizing SiC based monolithic circuits（MMICs） on HPSI substrates.

Low ohmic contact AlN/GaN HEMTs grown by MOCVD

AlN/GaN high-electron-mobility transistors （HEMTs） on SiC substrates were fabricated by metalorganic chemical vapor deposition （MOCVD） and then characterized. An Si/Ti/Al/Ni/Au stack was used to reduce ohmic contact resistance （0.33 g2.mm） at a low annealing temperature. The fabricated devices exhibited a maximum drain current density of 1.07 A/mm （Vows = I V） and a maximum peak extrinsic transconductance of 340 mS/mm. The off-state breakdown voltage of the device was 64 V with a gate-drain distance of 1.9 μm. The current gain extrinsic cutoff frequency fT and the maximum oscillation frequency fmax were 36 and 80 GHz with a 0.25 μm gate length, respectively.