Fabrication and Characterization of 1700 V 4H-SiC Vertical Double-Implanted Metal-Oxide-Semiconductor Field-Effect Transistors

The fabrication and characterization of 1700 V 7 A 4H-SiC vertical double-implanted metal-oxide-semiconductor field-effect transistors （VDMOSFETs） are reported. The drift layer is 17μm in thickness with 5 × 10^15 cm^-3 n-type doping, and the channel length is 1μm. The MOSFETs show a peak mobility of 17cm2/V.s and a typical threshold voltage of 3 V. The active area of 0.028cm2 delivers a forward drain current of 7A at Vcs = 22 V and VDS= 15 V. The specific on-resistance （Ron,sv） is 18mΩ.cm2 at VGS= 22 V and the blocking voltage is 1975 V （IDS 〈 lOOnA） at VGS = 0 V.

基于第一性原理的碳化硅界面态机制研究进展

碳化硅(SiC)金属–氧化物–半导体场效应晶体管(metal-oxide-semiconductor field-effect transistor,MOSFET)具有低导通电阻及高击穿临界场强等特点,在高压开关器件领域有着较为广阔的应用及发展前景。但由于SiC/SiO_2具有较高的界面态密度,使得器件反型沟道电子迁移率过低,从而严重阻碍SiC器件的广泛应用。为有效地控制界面态,回顾了国内外对SiC/SiO_2界面态的第一性原理研究进展,分析界面态的形成机制,讨论近导带边界中高界面态的根本原因,为SiC器件工艺制备提供理论指导。