A Novel Radiation Tolerant SOI Isolation Structure

A novel radiation tolerant SOI isolation structure,consisting of thin SiO2/polysilicon/field SiO2 multilayers,is proposed. A device with this structure does not show obvious changes in subthreshold characteristics and leakage current,indicating a superior radiation tolerance to traditional LOCOS.

Laser-Induced Single Event Transients in Local Oxidation of Silicon and Deep Trench Isolation Silicon-Germanium Heterojunction Bipolar Transistors

We present a study on the single event transient （SET） induced by a pulsed laser in different silicon-germanium （SiGe） heterojunction bipolar transistors （HBTs） with the structure of local oxidation of silicon （LOCOS） and deep trench isolation （DTI）. The experimental results are discussed in detail and it is demonstrated that a SiGe HBT with the structure of LOCOS is more sensitive than the DTI SiGe HBT in the SET. Because of the limitation of the DTI structure, the charge collection of diffusion in the DTI SiGe HBT is less than that of the LOCOS SiGe HBT. The SET sensitive area of the LOCOS SiGe HBT is located in the eollector-substrate （C/S） junction, while the sensitive area of the DTI SiGe HBT is located near to the collector electrodes.

Utilizing a shallow trench isolation parasitic transistor to characterize the total ionizing dose effect of partially-depleted silicon-on-insulator input/output n-MOSFETs

we investigate the effects of 60^Co γ-ray irradiation on the 130 nm partially-depleted silicon-on-isolator （PDSOI） input/output （I/O） n-MOSFETs. A shallow trench isolation （STI） parasitic transistor is responsible for the observed hump in the back-gate transfer characteristic curve. The STI parasitic transistor, in which the trench oxide acts as the gate oxide, is sensitive to the radiation, and it introduces a new way to characterize the total ionizing dose （TID） responses in the STI oxide. A radiation enhanced drain induced barrier lower （DIBL） effect is observed in the STI parasitic transistor. It is manifested as the drain bias dependence of the radiation-induced off-state leakage and the increase of the DIBL parameter in the STI parasitic transistor after irradiation. Increasing the doping concentration in the whole body region or just near the STI sidewall can increase the threshold voltage of the STI parasitic transistor, and further reduce the radiation-induced off-state leakage. Moreover, we find that the radiation-induced trapped charge in the buried oxide leads to an obvious front-gate threshold voltage shift through the coupling effect. The high doping concentration in the body can effectively suppress the radiation-induced coupling effect.

A CMOS-compatible silicon substrate optimization technique and its application in radio frequency crosstalk isolation

In this paper, a complementary metal-oxide semiconductor （CMOS）-compatible silicon substrate optimization technique is proposed to achieve effective isolation. The selective growth of porous silicon is used to effectively suppress the substrate crosstalk. The isolation structures are fabricated in standard CMOS process and then this post-CMOS substrate optimization technique is carried out to greatly improve the performances of crosstalk isolation. Three-dimensional electro-magnetic simulation is implemented to verify the obvious effect of our substrate optimization technique. The morphologies and growth condition of porous silicon fabricated have been investigated in detail. Furthermore, a thick selectively grown porous silicon （SGPS） trench for crosstalk isolation has been formed and about 20dB improvement in substrate isolation is achieved. These results demonstrate that our post-CMOS SGPS technique is very promising for RF IC applications.

Enhanced radiation-induced narrow channel effects in 0.13-μm PDSOI nMOSFETs with shallow trench isolation

Total ionizing dose responses of different transistor geometries after being irradiated by ^（60）Co γ-rays, in 0.13-μm partially-depleted silicon-on-insulator（PD SOI） technology are investigated. The negative threshold voltage shift in an n-type metal-oxide semiconductor field effect transistor（nMOSFET） is inversely proportional to the channel width due to radiation-induced charges trapped in trench oxide, which is called the radiation-induced narrow channel effect（RINCE）.The analysis based on a charge sharing model and three-dimensional technology computer aided design（TCAD） simulations demonstrate that phenomenon. The radiation-induced leakage currents under different drain biases are also discussed in detail.

Transfer of Thin Epitaxial Silicon Films by Wafer Bonding and Splitting of Double Layered Porous Silicon for SOI Fabrication

A double layered porous silicon with different porosity is formed on a heavy doped p type Si(111) substrate by changing current density during the anodizing.Then a high quality epitaxial mono crystalline silicon film is grown on the porous silicon using an ultra high vacuum electron beam evaporator.This wafer is bonded with other silicon wafer with a thermal oxide layer at room temperature.The bonded pairs are split along the porous silicon layer during subsequent thermal annealing.Thus the epitaxial Si film is transferred to the oxidized wafer to form a silicon on insulator structure.SEM,XTEM,spreading resistance probe and Hall measurement show that the SOI structure has good structural and electrical quality.

Dependence of R-G Currenton Bulk Traps Characteristics and Silicon Film Structure in SOI Gated-Diode

The dependence of the Recombination- Generation( R- G) current on the bulk trap characteristics and sili- con film structure in SOI lateral p+ p- n+ diode has been analyzed num erically by using the simulation tool,DESSIS- ISE.By varying the bulk trap characteristics such as the trap density and energy level spectrum systematically,the dependence of the R- G current on both of them has been dem onstrated in details.Moreover,the silicon film doping concentration and thickness are changed to make silicon body varies from the fully- depletion m ode into the partial- ly- depletion one.The influence of the transfer of silicon body characteristics on the R- G currenthas also been care- fully examined.A better understanding is obtained of the behavior of bulk trap R- G current in the SOI lateral gat- ed- diode.

SOI高压LDMOS器件氧化层抗总电离剂量辐射效应研究

绝缘体上硅(SOI)高压横向扩散金属氧化物半导体(LDMOS)器件是高压集成电路的核心器件,对其进行了总电离剂量(TID)辐射效应研究。利用仿真软件研究了器件栅氧化层、场氧化层和埋氧化层辐射陷阱电荷对电场和载流子分布的调制作用,栅氧化层辐射陷阱电荷主要作用于器件沟道区,而场氧化层和埋氧化层辐射陷阱电荷则主要作用于器件漂移区;辐射陷阱电荷在器件内部感生出的镜像电荷改变了器件原有的电场和载流子分布,从而导致器件阈值电压、击穿电压和导通电阻等参数的退化。对80 V SOI高压LDMOS器件进行了总电离剂量辐射实验,结果表明在ON态和OFF态下随着辐射剂量的增加器件性能逐步衰退,当累积辐射剂量为200 krad(Si)时,器件的击穿电压大于80 V,阈值电压漂移为0.3 V,器件抗总电离剂量辐射能力大于200 krad(Si)。

A new analytical model of high voltage silicon on insulator(SOI) thin film devices

A new analytical model of high voltage silicon on insulator （SOI） thin film devices is proposed, and a formula of silicon critical electric field is derived as a function of silicon film thickness by solving a 2D Poisson equation from an effective ionization rate, with a threshold energy taken into account for electron multiplying. Unlike a conventional silicon critical electric field that is constant and independent of silicon film thickness, the proposed silicon critical electric field increases sharply with silicon fihn thickness decreasing especially in the case of thin films, and can come to 141V/μm at a film thickness of 0.1 μm which is much larger than the normal value of about 30 V/μm. From the proposed formula of silicon critical electric field, the expressions of dielectric layer electric field and vertical breakdown voltage （VB,V） are obtained. Based on the model, an ultra thin film can be used to enhance dielectric layer electric field and so increase vertical breakdown voltage for SOI devices because of its high silicon critical electric field, and with a dielectric layer thickness of 2 μm the vertical breakdown voltages reach 852 and 300V for the silicon film thicknesses of 0.1 and 5μm, respectively. In addition, a relation between dielectric layer thickness and silicon film thickness is obtained, indicating a minimum vertical breakdown voltage that should be avoided when an SOI device is designed. 2D simulated results and some experimental results are in good agreement with analytical results.

The Dynamic Characteristics of Silicone Rubber Isolator

The dynamic stiffness and the specific damping energy, as well as the vibration response characteristics of a silicone rubber isolator were researched. The results of the vibration test showed that the silicone rubber isolator was excellent in the performance of vibration control. The dynamic stiffness and the damping characteristics were non-linear. From the comparison between experimental results and simulation analysis, the displacement transmissibility characteristics of the isolator were obtained. As a result, the dynamic characteristics of the isolator could be accurately described by the quadratic type non-linear terms at small amolitude.

THE GROWTH OF MONOCRYSTALLINE SILICON THIN FILM ON INSULATOR (SOI) BY SCANNING ELECTRON BEAM

An experiment for preparation of SOI films by using the scanning electron beam to modify the polycrystalline silicon on SiO2 is presented. This method takes on the epitaxial lateral growth of liquid phase with the crystallon to form monocrystalline silicon films. The effects of the beam power density, scanning velocity, temperature of the substrates and the construction of samples on the quality of the monocrystalline silicon films were discussed. A good experimental result has been obtained, the monocrystalline silicon zone is nearly 200×25μm2.

热老化对不同封装形式SOI基压阻式芯片的影响

采用热老化的手段提高封装后芯片的输出稳定性及使用寿命,并对热老化温度与老化时间的匹配问题进行了研究。首先介绍了压阻传感器的老化机理,然后在不同温度下对同批次不同封装形式绝缘体上硅(SOI)基压阻芯片进行老化,并对芯片老化前后数据进行对比。结果表明,300℃加电老化情况下,芯片稳定输出的时间为12h,且老化后芯片的各项指标均有改善。在温度允许范围内,适当的老化温度可以使芯片达到稳定输出状态,提升工作效率的同时为优化SOI基压阻芯片的老化时间提供了参考。

Effects of galactooligosaccharide glycation on the functional properties of soy protein isolate and its application in noodles

Soybean protein has high nutritional value, but its functional properties are easily affected by external factors,which limits its application in food industry. In the study, soybean protein isolate(SPI) was modified by dry heat glycation of galactooligosaccharides(GOS). The gel properties, antioxidant properties and structural changes of SPI-GOS conjugates were investigated. The application of SPI-GOS conjugates in noodles was also explored. The results observed that the glycation degree of SPI increased with the increasing reaction time. SDS-PAGE and spectral analysis showed the changes of spatial conformation of SPI after glycation. The antioxidant activity of SPI increased after glycation and DPPH radical scavenging activity of SPI-GOS peaked at 48 h of reaction. The hardness, elasticity and resilience of soybean protein gel reached their relative maximum at 48 h, 48 h and 12 h of glycation reaction, respectively. Moreover, the appropriate addition of glycated SPI improved the quality of noodles. The noodles with 4% addition of SPI-GOS had higher hardness, elasticity and tensile properties. This study will provide an effective method to modify soybean protein and expand the use of soybean protein in food industry.

SDB-SOI制备过程中工艺控制

SOI(Silicom-On-Insulator)晶圆是绝缘氧化物上有一层薄硅膜的硅晶圆。在SDB-SOI晶圆制备过程中,需要在进行晶圆键合、磨削、抛光等工序过程中,通过对键合空腔、顶硅厚度、顶硅TTV、顶硅形状、顶硅表面等参数的控制,可以降低后续工序加工难度,最终制备出高质量的产品。

SOI材料和器件及其应用的新进展

综述了绝缘层上的硅(SOI)材料的新结构包括不同绝缘埋层和不同半导体材料结构的最新进展,介绍了SOI器的新结构和SOI器件在抗辐射电子学方面的应用,报道了国内在SOI技术的研发和产业化的最新动态。

SOI微型电场传感器的设计与测试

该文研制了一种新型的基于SOI(Silicon-On-Insulator)微机械加工技术的高性能电场传感器敏感结构。为提高传感器的灵敏度和信噪比,该器件采用侧面屏蔽感应电极的独特设计方案,降低了传感器屏蔽电极的边缘效应;并基于有限元仿真,进一步优化了传感器敏感结构参数。在室温和室内大气压条件下,测试表明,测试量程0～50kV/m,传感器总不确定度优于2%,分辨率为50 V/m。

SOI高温压力传感器的研究现状

SOI(silicononinsulator)高温压力传感器是一种新型的半导体高温压力传感器,具有耐高温、抗辐射、稳定性好等优点,能够解决石油、汽车、航空、航天等领域对高温压力传感器的迫切需求,在高温领域有很大的潜力.本文论述了SOI材料的制备方法-特别是硅片直接键合技术(SDB),简单介绍了SOI压力传感器的优势、制作工艺以及SOI压力传感器的发展现状.

低插入损耗高隔离度SOI射频开关电路的研究

基于0.18μm RF SOI CMOS工艺,提出了一种可广泛应用于无线通信系统中的低插入损耗高隔离度SOI射频开关电路。该电路利用SOI器件的特殊结构(隐埋氧化层BOX,高阻衬底)和特殊SOI器件(FB,BC,BT等),使电路采用的器件较之体硅CMOS器件具有更优的隔离性能,实现了降低插入损耗和增加隔离度的目的。该电路经过模拟仿真,在频率为2.4GHz时,插入损耗和隔离度分别为-1dB和40dB。

基于MEMS工艺的SOI高温压力传感器设计

利用MEMS(微机电系统)工艺中的扩散,刻蚀,氧化,金属溅射等工艺制备出SOI高温压力敏感芯片,并通过静电键合工艺在SOI芯片背面和玻璃间形成真空参考腔,最后通过引线键合工艺完成敏感芯片与外部设备的电气连接。对封装的敏感芯片进行高温下的加压测试,高温压力测试结果表明,在21℃(常温)至300℃的温度范围内,传感器敏感芯片可在压力量程内正常工作,传感器敏感芯片的线性度从0.9 985下降为0.9 865,控制在较小的范围内。高温压力下的性能测试结果表明,该压力传感器可用于300℃恶劣环境下的压力测量,其高温下的稳定性能为压阻式高温压力芯片的研制提供了参考。

基于SOI晶圆材料的硅微压传感器

为解决硅微压传感器制作过程中存在的问题,以SOI晶圆材料为基础,使用有限元方法优化设计岛-膜型1kPa压力敏感结构,采用MEMS工艺完成传感器芯片制作,并对封装后的传感器进行了测试。测试结果表明,传感器输出灵敏度大于60 mV/kPa,非线性小于0.1%FS,精度小于0.5%FS,器件具有较好的性能指标。