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A Diamond Electrochemical Cleaning Technique for Organic Contaminants on Silicon Wafer Surfaces 被引量:2
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作者 张建新 刘玉岭 +4 位作者 檀柏梅 牛新环 边永超 高宝红 黄妍妍 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第3期473-477,共5页
Peroxodiphosphate anion (a powerful oxidant) can be formed in a special water-based cleaning agent through an electrochemical reaction on boron-doped diamond electrodes. This electrochemical reaction was applied dur... Peroxodiphosphate anion (a powerful oxidant) can be formed in a special water-based cleaning agent through an electrochemical reaction on boron-doped diamond electrodes. This electrochemical reaction was applied during the oxidation,decomposition, and removal of organic contaminations on a silicon wafer surface, and it was used as the first step in the diamond electrochemical cleaning technique (DECT). The cleaning effects of DECT were compared with the RCA cleaning technique, including the silicon surface chemical composition that was observed with X-ray photoelectron spectroscopy and the morphology observed with atomic force microscopy. The measurement results show that the silicon surface cleaned by DECT has slightly less organic residue and lower micro-roughness,so the new technique is more effective than the RCA cleaning technique. 展开更多
关键词 organic contaminations silicon wafer surface cleaning boron-doped diamond electrodes powerful oxidant micro-roughness electrochemical cleaning
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An Improved Angle Polishing Method for Measuring Subsurface Damage in Silicon Wafers 被引量:2
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作者 霍凤伟 康仁科 +2 位作者 郭东明 赵福令 金洙吉 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2006年第3期506-510,共5页
We present an improved angle polishing method in which the end of the cover slice near the glue layer is beveled into a thin,defect-free wedge,the straight edge of which is used as the datum for measuring the depth of... We present an improved angle polishing method in which the end of the cover slice near the glue layer is beveled into a thin,defect-free wedge,the straight edge of which is used as the datum for measuring the depth of subsurface damage. The bevel angle can be calculated from the interference fringes formed in the wedge. The minimum depth of the subsurface damage that can be measured by this method is a few hundred nanometers. Our results show that the method is straightforward, accurate, and convenient. 展开更多
关键词 silicon wafer subsurface damage angle polishing defect etching wedge fringes
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Effect of Rapid Thermal Annealing Ambient on Gettering Efficiency and Surface Microstructure in 300mm CZ Silicon Wafers
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作者 冯泉林 何自强 +1 位作者 常青 周旗钢 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2008年第5期822-826,共5页
The effect of rapid thermal annealing (RTA) ambient on denuded zone and oxygen precipitates in Czochralski (CZ) silicon wafers is studied in this paper. N2 and a N2/NH3 mixture are used as RTA ambient. It is demon... The effect of rapid thermal annealing (RTA) ambient on denuded zone and oxygen precipitates in Czochralski (CZ) silicon wafers is studied in this paper. N2 and a N2/NH3 mixture are used as RTA ambient. It is demonstrated that a high density of oxygen precipitates and thin denuded zone are obtained in N2/NH3 ambient,while a relatively lower density of oxygen precipitates and thicker denuded zone are observed in N2 ambient. As the RTA duration times increased, the oxygen precipitate density increased and the denuded zone depth decreased. X-ray photoelectron spectroscopy (XPS) data and atomic force microscope (AFM) results show that there RTA process,which can explain the different effect of RTA was a surface nitriding reaction during the N2/NH3 ambient ambient. 展开更多
关键词 300mm CZ silicon wafer denuded zone intrinsic gettering RTA XPS AFM
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STUDIES OF SURFACE GRINDING TEMPERATURE AFFECTED BY DIFFERENT GRINDING WAYS OF SILICON WAFER
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作者 林彬 于爱兵 +1 位作者 胡军 徐燕申 《Transactions of Tianjin University》 EI CAS 2000年第1期85-89,共5页
The surface grinding temperature of the silicon wafer ground by diamond wheels is studied.Rudimentally,the properties of the surface grinding temperature generated by two grinding methods,ground by straight and cup wh... The surface grinding temperature of the silicon wafer ground by diamond wheels is studied.Rudimentally,the properties of the surface grinding temperature generated by two grinding methods,ground by straight and cup wheels respectively,are analyzed.In addition,considering the effects of grain size and grinding depth on surface grinding temperature during these two grinding processes,significant results and conclusions are obtained from experimental research. 展开更多
关键词 surface grinding temperature straight wheel cup wheel silicon wafer
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Microstructure studies of the grinding damage in monocrystalline silicon wafers 被引量:9
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作者 ZHANG Yinxia KANG Renke GUO Dongming JIN Zhuji 《Rare Metals》 SCIE EI CAS CSCD 2007年第1期13-18,共6页
The depth and nature of the subsurface damage in a silicon wafer will limit the performance of IC components. Damage microstructures of the silicon wafers ground by the #325, #600, and #2000 grinding wheels was analyz... The depth and nature of the subsurface damage in a silicon wafer will limit the performance of IC components. Damage microstructures of the silicon wafers ground by the #325, #600, and #2000 grinding wheels was analyzed. The results show that many microcracks, fractures, and dislocation rosettes appear in the surface and subsurface of the wafer ground by the #325 grinding wheel. No obvious microstructure change exists. The amorphous layer with a thickness of about 100 nm, microcracks, high density dislocations, and polycrystalline silicon are observed in the subsurface of the wafer ground by the #600 grinding wheel. For the wafer ground by the #2000 grinding wheel, an amorphous layer of about 30 nm thickness, a polycrystalline silicon layer, a few dislocations, and an elastic deformation layer exist. In general, with the decrease in grit size, the material removal mode changes from micro-fracture mode to ductile mode gradually. 展开更多
关键词 silicon wafers GRINDING subsurface damage MICROSTRUCTURE
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Residual stress analysis on silicon wafer surface layers induced by ultraprecision grinding 被引量:2
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作者 ZHANG Yinxia WANG Dong +1 位作者 GAO Wei KANG Renke 《Rare Metals》 SCIE EI CAS CSCD 2011年第3期278-281,共4页
Grinding residual stresses of silicon wafers affect the performance of IC circuits. Based on the wafer rotation ultra-precision grinding ma-chine, the residual stress distribution along grinding marks and ground surfa... Grinding residual stresses of silicon wafers affect the performance of IC circuits. Based on the wafer rotation ultra-precision grinding ma-chine, the residual stress distribution along grinding marks and ground surface layer depth of the ground wafers are investigated using Raman microspectroscopy. The results show that the ground wafer surfaces mainly present compressive stress. The vicinity of pile-ups between two grinding marks presents higher a compressive stress. The stress value of the rough ground wafer is the least because the material is removed by the brittle fracture mode. The stress of the semi-fine ground wafer is the largest because the wafer surface presents stronger phase trans-formations and elastic-plastic deformation. The stress of the fine ground wafer is between the above two. The strained layer depths for the rough, semi-fine, and fine ground wafers are about 7.6 m, 2.6 m, and 1.1 m, respectively. The main reasons for generation of residual stresses are phase transformations and elastic-plastic deformation. 展开更多
关键词 silicon wafers GRINDING residual stresses Raman spectroscopy
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Electrochemical behaviors of silicon wafers in silica slurry 被引量:1
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作者 Xiaolan Song Haiping Yang +2 位作者 Xunda Shi Xi He Guanzhou Qiu 《Journal of University of Science and Technology Beijing》 CSCD 2008年第4期495-499,共5页
The electrochemical behaviors of n-type silicon wafers pH value and solid content of the slurry on the corrosion of silicon in silica-based slurry were investigated, and the influences of the wafers were studied by us... The electrochemical behaviors of n-type silicon wafers pH value and solid content of the slurry on the corrosion of silicon in silica-based slurry were investigated, and the influences of the wafers were studied by using electrochemical DC polarization and AC impedance techniques. The results revealed that these factors affected the corrosion behaviors of silicon wafers to different degrees and had their suitable parameters that made the maximum corrosion rate of the wafers. The corrosion potential of (100) sttrface was lower than that of(111), whereas the current density of (100) was much higher than that of(111). 展开更多
关键词 silicon wafers electrochemical behavior IMPEDANCE CORROSION polarization curves
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DESIGN AND FABRICATION OF SUPER-HYDROPHOBIC SURFACES ON SILICON WAFERS AND STUDY OF EFFECTS TO HYDROPHOBICITY 被引量:3
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作者 LI Baojia ZHOU Ming +1 位作者 QIAN Kunxi CAI Lan 《Chinese Journal of Mechanical Engineering》 SCIE EI CAS CSCD 2008年第4期18-21,共4页
Some superhydrophobic siliconbased surfaces with periodic square pillar array microstructures were designed and fabricated, also their apparent contact angles (CAs) were quantitatively measured. On the basis of the ... Some superhydrophobic siliconbased surfaces with periodic square pillar array microstructures were designed and fabricated, also their apparent contact angles (CAs) were quantitatively measured. On the basis of the classical Wenzel's theory and Cassie's theory, two generally applicable equations corresponding of the cases of wetted contact and composite contact, which could reflect the relations between geometrical parameters of square pillar microstructures and apparent CAs, were educed. Then a theoretical prediction of the fabricated siliconbased surfaces was carried out by the equations, which was compatible with the result of experimental measurement, and this showed the rationality of the educed equations. The CAs of the surface prepared by merely plasma etching to create microstructures and by only Teflon treating were compared, and the result indicated that the effect of the former on achieving hydrophobic surfaces was greater than that of the later. Under the premise of synthetically considering transition between the two contact states, the effects of geometrical parameters of the square pillar microstructures to hydrophobicity were analyzcation, thereon a design condition and a design principle for super-hydrophobic surfaces which would be of specific application value were summarized. 展开更多
关键词 Superhydrophobicity silicon wafers Square pillar microstructures Apparent contact angles
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Development of a miniature silicon wafer fuel cell using L-ascorbic acid as fuel 被引量:1
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作者 Jian WU Zhi-yong XIAO +1 位作者 Yi-bin YING Philip C.H. CHAN 《Journal of Zhejiang University-Science A(Applied Physics & Engineering)》 SCIE EI CAS CSCD 2008年第7期955-960,共6页
In the current studies a miniature silicon wafer fuel cell(FC) using L-ascorbic acid as fuel was developed. The cell employs L-ascorbic acid and air as reactants and a thin polymer electrolyte as a separator. Inductiv... In the current studies a miniature silicon wafer fuel cell(FC) using L-ascorbic acid as fuel was developed. The cell employs L-ascorbic acid and air as reactants and a thin polymer electrolyte as a separator. Inductively coupled plasma(ICP) silicon etching was employed to fabricate high aspect-ratio columns on the silicon substrate to increase the surface area. A thin platinum layer deposited directly on the silicon surface by the sputtering was used as the catalyst layer for L-ascorbic acid electro-oxidation. Cyclic voltammetry shows that the oxidation of L-ascorbic acid on the sputtered platinum layer is irreversible and that the onset potentials for the oxidation of L-ascorbic acid are from 0.27 V to 0.35 V versus an Ag/AgCl reference electrode. It is found that at the room temperature,with 1 mol/L L-ascorbic acid/PBS(phosphate buffered solution) solution pumped to the anode at 1 ml/min flow rate and air spontaneously diffusing to the cathode as the oxidant,the maximum output power density of the cell was 1.95 mW/cm2 at a current density of 10 mA/cm2. 展开更多
关键词 L-ascorbic acid Fuel cell (FC) silicon wafer
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Stability Behaviour of Monolayer Tetraether Lipids on the Amino-Silanised Silicon Wafer: Comparative Study between Langmuir-Blodgett Monolayers with Self-Assembled Monolayers 被引量:1
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作者 Sri Vidawati Udo Bakowsky Urich Rothe 《Advances in Materials Physics and Chemistry》 2020年第11期270-281,共12页
This study investigated the stability behaviour of molecular monolayer symmetric chemically modified tetraether lipids caldarchaeol-PO<sub>4</sub> on the amino-silanised silicon wafer using Langmuir-Blodge... This study investigated the stability behaviour of molecular monolayer symmetric chemically modified tetraether lipids caldarchaeol-PO<sub>4</sub> on the amino-silanised silicon wafer using Langmuir-Blodgett films, Self Assembling Monolayers (SAMs), ellipsometry, and atomic force microscopy (AFM). The monolayers of caldarchaeol-PO<sub>4 </sub>were stable on the solid surface amino-silanised silicon wafer. The organizations of molecular monolayers caldarchaeol-PO<sub>4</sub> by Langmuir-Blodgett method and SAMs have been analyzed. The surface of pressure in Langmuir-Blodgett processing is carried out monolayers caldarchaeol-PO<sub>4</sub> more flat island inhomogeneous. Another method of monolayers caldarchaeol-PO<sub>4</sub> by SAMs is showed a large flat domain. Monolayers caldarchaeol-PO<sub>4</sub> by Langmuir-Blodgett method seems to be stable and chemically resistant after washing with organic solvent and an additional treatment ultrasonification with various thickness lipids arround 2 nm to 6 nm. Conversely, monolayer caldarchaeol-PO<sub>4</sub> by SAMs appears fewer than monolayers caldarchaeol-PO<sub>4</sub> by Langmuir-Blodgett method, the thickness of various from 1 nm to 3 nm. 展开更多
关键词 Caldarchaeol-PO4 Langmuir-Blodgett Films Self Assembling Monolayers (SAMs) Amino-Silanised silicon wafer
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Finite Element Analysis for Grinding and Lapping of Wire-sawn Silicon Wafers
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作者 Z J PEI X J XIN 《厦门大学学报(自然科学版)》 CAS CSCD 北大核心 2002年第S1期10-,共1页
Silicon wafers are the most widely used substrates for semiconductors. The falling price of silicon wafers has created tremendous pressure on silicon wafer manufacturers to develop cost-effective manufacturing process... Silicon wafers are the most widely used substrates for semiconductors. The falling price of silicon wafers has created tremendous pressure on silicon wafer manufacturers to develop cost-effective manufacturing processes. A critical issue in wafer production is the waviness induced by wire sawing. If this waviness is not removed, it will affect wafer flatness and semiconductor performance. In practice, both lapping and grinding have been used to flatten wire-sawn wafers. Although grinding is not as effective as lapping in removing waviness, it has many other advantages over lapping (such as higher throughput, fully automatic, and more benign to environment) and has great potential to reduce manufacturing cost of silicon wafers. This paper presents a finite element analysis (FEA) study on grinding and lapping of wire-sawn silicon wafers. An FEA model is first developed to simulate the waviness deformation of wire-sawn wafers in grinding and lapping processes. It is then used to explain how the waviness is removed or reduced by lapping and grinding and why the effectiveness of grinding in removing waviness is different from that of lapping. Furthermore, the model is used to study the effects of various parameters including active-grinding-zone orientation, grinding force, waviness wavelength, and waviness height on the reduction and elimination of waviness. Finally, the results of pilot experiments to verify the model are discussed. 展开更多
关键词 finite element analysis GRINDING LAPPING silicon wafer waviness removal
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Surface Damage in Wire cut Silicon Wafers
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作者 樊瑞新 阙端麟 《Rare Metals》 SCIE EI CAS CSCD 1999年第4期315-318,共4页
The surface damage and the damage depth in wire-cut silicon wafers and inner-diameter (ID) cut silicon wafers were studied by means of thickness meter, scanning electron microscopy (SEM) and double crystal X-ray diffr... The surface damage and the damage depth in wire-cut silicon wafers and inner-diameter (ID) cut silicon wafers were studied by means of thickness meter, scanning electron microscopy (SEM) and double crystal X-ray diffractometer. The results show that the surface of wire-cut silicon wafers is rougher than that of ID-cut silicon wafers and the surface damage in wire-cut silicon wafers is more serious than that in ID-cut silicon wafers, while the damage depth in wire-cut silicon wafers is smaller than that in ID-cut silicon wafers. The possible reasons for the generation of surface damage in wire-cut silicon wafers were also discussed. 展开更多
关键词 wire-cut surface damage silicon wafer
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Effects of thermal transport properties on temperature distribution within silicon wafer
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作者 王爱华 牛义红 +1 位作者 陈铁军 P.F.HSU 《Journal of Central South University》 SCIE EI CAS 2014年第4期1402-1410,共9页
A combined conduction and radiation heat transfer model was used to simulate the heat transfer within wafer and investigate the effect of thermal transport properties on temperature non-uniformity within wafer surface... A combined conduction and radiation heat transfer model was used to simulate the heat transfer within wafer and investigate the effect of thermal transport properties on temperature non-uniformity within wafer surface. It is found that the increased conductivities in both doped and undoped regions help reduce the temperature difference across the wafer surface. However, the doped layer conductivity has little effect on the overall temperature distribution and difference. The temperature level and difference on the top surface drop suddenly when absorption coefficient changes from 104 to 103 m-1. When the absorption coefficient is less or equal to 103 m-1, the temperature level and difference do not change much. The emissivity has the dominant effect on the top surface temperature level and difference. Higher surface emissivity can easily increase the temperature level of the wafer surface. After using the improved property data, the overall temperature level reduces by about 200 K from the basis case. The results will help improve the current understanding of the energy transport in the rapid thermal processing and the wafer temperature monitor and control level. 展开更多
关键词 silicon wafer thermal transport properties temperature distribution radiation heat transfer
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Slim Water Injection Nozzle for Silicon Wafer Wet Cleaning Bath
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作者 Shogo Okuyama Kento Miyazaki +2 位作者 Nobutaka Ono Hitoshi Habuka Akihiro Goto 《Advances in Chemical Engineering and Science》 2016年第4期345-354,共10页
In order to effectively and quickly clean the surface of semiconductor silicon wafers, the fluid flow is one of the significant issues. For a batch-type silicon wafer wet cleaning bath, a slim water injection nozzle c... In order to effectively and quickly clean the surface of semiconductor silicon wafers, the fluid flow is one of the significant issues. For a batch-type silicon wafer wet cleaning bath, a slim water injection nozzle consisting of a dual tube was studied, based on theoretical calculations and experiments. A thin inner tube was placed at the optimum position in the water injection nozzle. Such a simple design could make the water injection direction normal and the water velocity profile symmetrical along the nozzle. The water flow in the wet cleaning bath was observed using a blue-colored ink tracer. When the nozzle developed in this study was placed at the bottom of the bath, a fast and symmetrical upward water stream was formed between and around the wafers. 展开更多
关键词 silicon wafer Wet Cleaning Bath Water Injection Nozzle Water Flow
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Culture of neural cells on silicon wafer with nano-topography
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《Chinese Journal of Biomedical Engineering(English Edition)》 2001年第4期184-,共1页
关键词 Culture of neural cells on silicon wafer with nano-topography
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Formation of subsurface cracks in silicon wafers by grinding 被引量:5
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作者 Jingfei Yin Qian Bai +1 位作者 Yinnan Li Bi Zhang 《Nanotechnology and Precision Engineering》 EI CAS CSCD 2018年第3期172-179,共8页
Single-crystal silicon is an important material in the semiconductor and optical industries.However,being hard and brittle,a silicon wafer is vulnerable to subsurface cracks(SSCs)during grinding,which is detrimental t... Single-crystal silicon is an important material in the semiconductor and optical industries.However,being hard and brittle,a silicon wafer is vulnerable to subsurface cracks(SSCs)during grinding,which is detrimental to the performance and lifetime of a wafer product.Therefore,studying the formation of SSCs is important for optimizing SSC-removal processes and thus improving surface integrity.In this study,a statistical method is used to study the formation of SSCs induced during grinding of silicon wafers.The statistical results show that grinding-induced SSCs are not stochastic but anisotropic in their distributions.Generally,when grinding with coarse abrasive grains,SSCs form along the cleavage planes,primarily the{111}planes.However,when grinding with finer abrasive grains,SSCs tend to form along planes with a fracture-surface energy higher than that of the cleavage planes.These findings provide a guidance for the accurate detection of SSCs in ground silicon wafers. 展开更多
关键词 silicon wafer SUBSURFACE CRACK CLEAVAGE INCLINATION angle Thermal energy
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Challenges in Processing Diamond Wire Cut and Black Silicon Wafers in Large-Scale Manufacturing of High Efficiency Solar Cells 被引量:2
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作者 Kishan Shetty Yudhbir Kaushal +2 位作者 Nagesh Chikkan D. S. Murthy Chandra Mauli Kumar 《Journal of Power and Energy Engineering》 2020年第2期65-77,共13页
Texturing of diamond wire cut wafers using a standard wafer etch process chemistry has always been a challenge in solar cell manufacturing industry. This is due to the change in surface morphology of diamond wire cut ... Texturing of diamond wire cut wafers using a standard wafer etch process chemistry has always been a challenge in solar cell manufacturing industry. This is due to the change in surface morphology of diamond wire cut wafers and the abundant presence of amorphous silicon content, which are introduced from wafer manufacturing industry during sawing of multi-crystalline wafers using ultra-thin diamond wires. The industry standard texturing process for multi-crystalline wafers cannot deliver a homogeneous etched silicon surface, thereby requiring an additive compound, which acts like a surfactant in the acidic etch bath to enhance the texturing quality on diamond wire cut wafers. Black silicon wafers on the other hand require completely a different process chemistry and are normally textured using a metal catalyst assisted etching technique or by plasma reactive ion etching technique. In this paper, various challenges associated with cell processing steps using diamond wire cut and black silicon wafers along with cell electrical results using each of these wafer types are discussed. 展开更多
关键词 DIAMOND WIRE CUT BLACK silicon Slurry wafers Amorphous silicon Additives Etching and TEXTURIZATION
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Detailed Micro Raman Spectroscopy Analysis of Doped Silicon Thin Film Layers and Its Feasibility for Heterojunction Silicon Wafer Solar Cells
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作者 Z. P. Ling J. Ge +2 位作者 R. Stangl A. G. Aberle T. Mueller 《Journal of Materials Science and Chemical Engineering》 2013年第5期1-14,共14页
Hydrogenated doped silicon thin films deposited using RF (13.56 MHz) PECVD were studied in detail using micro Raman spectroscopy to investigate the impact of doping gas flow, film thickness, and substrate type on the ... Hydrogenated doped silicon thin films deposited using RF (13.56 MHz) PECVD were studied in detail using micro Raman spectroscopy to investigate the impact of doping gas flow, film thickness, and substrate type on the film characteristics. In particular, by deconvoluting the micro Raman spectra into amorphous and crystalline components, qualitative and quantitative information such as bond angle disorder, bond length, film stress, and film crystallinity can be determined. By selecting the optimum doped silicon thin film deposition conditions, and combining our p-doped and n-doped silicon thin films in different heterojunction structures, we demonstrate both (i) an efficient field effect passivation and (ii) further improvement to c-Si/a-Si:H(i) interface defect density with observed improvement in implied open-circuit voltage VOC and minority carrier lifetimes across all injections levels of interest. In particular, the heterojunction structure (a-Si:H(p)/a-Si:H(i)/c-Si(n)/a-Si:H(i)/a-Si:H(p)) demonstrates a minority carrier lifetime of 2.4 ms at an injection level of 1015 cm-3, and a high implied open-circuit voltage of 725 mV. Simulation studies reveal a strong dependence of the interface defect density Dit on the heterojunction silicon wafer solar cell performance, affected by the deposition conditions of the overlying doped silicon thin film layers. Using our films, and a fitted Dit of 5 × 1010 cm-2·eV-1, we demonstrate that a solar cell efficiency of ~22.5% can be potentially achievable. 展开更多
关键词 RAMAN Spectroscopy HETEROJUNCTION silicon wafer Solar Cells Doped silicon Simulation PASSIVATION
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The Effect of Quartz Window on Bistability of the Silicon Wafer in Lamp-Based Reactor
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作者 Valeriya P. Prigara Aleksandr N. Kupriyanov Vladimir V. Ovcharov 《Journal of Materials Science and Chemical Engineering》 2020年第1期54-65,共12页
The effect of a quartz plate (window) on the silicon wafer temperature is studied in the conditions of the combined thermal transfer in a lamp-based chamber for the rapid thermal treatment (RTP) set up. The chamber fo... The effect of a quartz plate (window) on the silicon wafer temperature is studied in the conditions of the combined thermal transfer in a lamp-based chamber for the rapid thermal treatment (RTP) set up. The chamber for RTP is simulated by a radiative-closed thermal system including the influence of quartz window as a spectral filter of lamp emission and a source of emitted thermal radiation. Energy equations for thermal fluxes involved in the heat input and output from the working wafer and quartz window are solved in spectral approximation. The transfer characteristics that are defined by the temperature dependencies of the silicon wafer and the quartz window on the temperature of the heater are accounted. It is shown that temperature bistability in the silicon wafer initiates an induced bistability into the quartz window that does not reveal bistable behavior because of the linear temperature dependence of its total optical characteristics. A possibility for simulation of the quartz window by spectral restriction of the heater radiation is confirmed. The availability of the weak bistable effect in the mode of zero effective heat exchange coefficient of a non-radiative component of the thermal flux removed from the working wafer has been obtained. 展开更多
关键词 Lamp-Based Rector silicon wafer QUARTZ WINDOW Temperature and Optical BISTABILITY Induced BISTABILITY Effect
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Characteristics of a Silicon Wafer <111>and <004>after Planting Nitrogen
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作者 Mehdi Simiari Ramin Roozehdar Mogaddam 《Advances in Materials Physics and Chemistry》 2017年第5期173-187,共15页
In this paper, different steps of work and experiments that are done in order to implant nitrogen ion in silicon with the energy of 25 keV, density of 24 μA/cm2 and doses of 5 × 1013 atom/cm2, 1?× 1014 atom... In this paper, different steps of work and experiments that are done in order to implant nitrogen ion in silicon with the energy of 25 keV, density of 24 μA/cm2 and doses of 5 × 1013 atom/cm2, 1?× 1014 atom/cm2 and 1?× 1015 atom/ cm2 (according to the calculation and applying time at planting) at room temperature (in the lack of heat phase) and without annealing will be presented. The XRD analysis is done before and after planting to observe changes in the lattice and the possibility of forming a crystalline phase of silicon nitride in this case. Also, the study of changes in the lattice arrangement and AFM analysis is done to observe the topography of the surface. Besides, the investigation on surface roughness and changes caused by ion implantation on the surface and spectrophotometry analysis before and after planting due to the study of changes in optical properties are done. 展开更多
关键词 silicon wafer NITROGEN Ion IMPLANTATION XRD ANALYSIS AFM ANALYSIS SPECTROPHOTOMETRY ANALYSIS
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