By using the pulsed laser single event effect facility and electro-static discharge （ESD） test system, the characteristics of the ＂high current＂, relation with external stimulus and relevance to impacted modes of ...By using the pulsed laser single event effect facility and electro-static discharge （ESD） test system, the characteristics of the ＂high current＂, relation with external stimulus and relevance to impacted modes of single event latch-up （SEL） and transient-induced latch-up （TLU） are studied, respectively, for a 12-bit complementary metal--oxide semiconductor （CMOS） analog-to-digital converter. Furthermore, the sameness and difference in physical mechanism between ＂high current＂ induced by SEL and that by TLU are disclosed in this paper. The results show that the minority carrier diffusion in the PNPN structure of the CMOS device which initiates the active parasitic NPN and PNP transistors is the common reason for the ＂high current＂ induced by SEL and for that by TLU, However, for SEL, the minority carder diffusion is induced by the ionizing radiation, and an underdamped sinusoidal voltage on the supply node （the ground node） is the cause of the minority carrier diffusion for TLU.展开更多
宇宙空间存在大量高能粒子,这些粒子会导致空间系统中的CMOS集成电路发生单粒子闩锁。基于0.18μm CMOS工艺,利用TCAD器件模拟仿真软件,开展CMOS反相器的单粒子闩锁效应研究。结合单粒子闩锁效应的触发机制,分析粒子入射位置、工作电压...宇宙空间存在大量高能粒子,这些粒子会导致空间系统中的CMOS集成电路发生单粒子闩锁。基于0.18μm CMOS工艺,利用TCAD器件模拟仿真软件,开展CMOS反相器的单粒子闩锁效应研究。结合单粒子闩锁效应的触发机制,分析粒子入射位置、工作电压、工作温度、有源区距阱接触距离、NMOS和PMOS间距等因素对SEL敏感性的影响,并通过工艺加固得出最优的设计结构。重离子试验表明,采用3.2μm外延工艺,可提高SRAM电路抗SEL能力,当L1、L2分别为0.86μm和0.28μm时,其单粒子闩锁阈值高达99.75 Me V·cm2/mg。展开更多
As technology scales down, clock distribution networks(CDNs) in integrated circuits(ICs) are becoming increasingly sensitive to single-event transients(SETs).The SET occurring in the CDN can even lead to failure of th...As technology scales down, clock distribution networks(CDNs) in integrated circuits(ICs) are becoming increasingly sensitive to single-event transients(SETs).The SET occurring in the CDN can even lead to failure of the entire circuit system. Understanding the factors that influence the SET sensitivity of the CDN is crucial to achieving radiation hardening of the CDN and realizing the design of highly reliable ICs. In this paper, the influences of different sequential elements(D-flip-flops and D-latches, the two most commonly used sequential elements in modern synchronous digital systems) on the SET susceptibility of the CDN were quantitatively studied. Electrical simulation and heavy ion experiment results reveal that the CDN-SET-induced incorrect latching is much more likely to occur in DFF and DFF-based designs. This can supply guidelines for the design of IC with high reliability.展开更多
基金Project supported by the National Natural Science Foundation of China(Grant No.41304148)
文摘By using the pulsed laser single event effect facility and electro-static discharge （ESD） test system, the characteristics of the ＂high current＂, relation with external stimulus and relevance to impacted modes of single event latch-up （SEL） and transient-induced latch-up （TLU） are studied, respectively, for a 12-bit complementary metal--oxide semiconductor （CMOS） analog-to-digital converter. Furthermore, the sameness and difference in physical mechanism between ＂high current＂ induced by SEL and that by TLU are disclosed in this paper. The results show that the minority carrier diffusion in the PNPN structure of the CMOS device which initiates the active parasitic NPN and PNP transistors is the common reason for the ＂high current＂ induced by SEL and for that by TLU, However, for SEL, the minority carder diffusion is induced by the ionizing radiation, and an underdamped sinusoidal voltage on the supply node （the ground node） is the cause of the minority carrier diffusion for TLU.
文摘宇宙空间存在大量高能粒子,这些粒子会导致空间系统中的CMOS集成电路发生单粒子闩锁。基于0.18μm CMOS工艺,利用TCAD器件模拟仿真软件,开展CMOS反相器的单粒子闩锁效应研究。结合单粒子闩锁效应的触发机制,分析粒子入射位置、工作电压、工作温度、有源区距阱接触距离、NMOS和PMOS间距等因素对SEL敏感性的影响,并通过工艺加固得出最优的设计结构。重离子试验表明,采用3.2μm外延工艺,可提高SRAM电路抗SEL能力,当L1、L2分别为0.86μm和0.28μm时,其单粒子闩锁阈值高达99.75 Me V·cm2/mg。
基金supported by the National Natural Science Foundation of China(No.61434007)the National Natural Science Foundation of China(No.61704192)
文摘As technology scales down, clock distribution networks(CDNs) in integrated circuits(ICs) are becoming increasingly sensitive to single-event transients(SETs).The SET occurring in the CDN can even lead to failure of the entire circuit system. Understanding the factors that influence the SET sensitivity of the CDN is crucial to achieving radiation hardening of the CDN and realizing the design of highly reliable ICs. In this paper, the influences of different sequential elements(D-flip-flops and D-latches, the two most commonly used sequential elements in modern synchronous digital systems) on the SET susceptibility of the CDN were quantitatively studied. Electrical simulation and heavy ion experiment results reveal that the CDN-SET-induced incorrect latching is much more likely to occur in DFF and DFF-based designs. This can supply guidelines for the design of IC with high reliability.
