A novel small-signal equivalent circuit model for GaN HEMTs incorporating a dual-field-plate

An accurate and novel small-signal equivalent circuit model for GaN high-electron-mobility transistors(HEMTs)is proposed,which considers a dual-field-plate(FP)made up of a gate-FP and a source-FP.The equivalent circuit of the overall model is composed of parasitic elements,intrinsic transistors,gate-FP,and source-FP networks.The equivalent circuit of the gate-FP is identical to that of the intrinsic transistor.In order to simplify the complexity of the model,a series combination of a resistor and a capacitor is employed to represent the source-FP.The analytical extraction procedure of the model parameters is presented based on the proposed equivalent circuit.The verification is carried out on a 4×250μm GaN HEMT device with a gate-FP and a source-FP in a 0.45μm technology.Compared with the classic model,the proposed novel small-signal model shows closer agreement with measured S-parameters in the range of 1.0 to 18.0 GHz.

Small-Signal Equivalent Circuit Modeling of a Photodetector Chip

A small-signal equivalent circuit model and the ted. The equivalent lumped circuit, which takes the main extraction techniques for photodetector chips are presen- factors that limit a photodetector＇s RF performance into consideration,is first determined based on the device＇s physical structure. The photodetector＇s S parameters are then on-wafer measured, and the measured raw data are processed with further calibration. A genetic algorithm is used to fit the measured data, thereby allowing us to calculate each parameter value of the model. Experimental resuits show that the modeled parameters are well matched to the measurements in a frequency range from 130MHz to 20GHz, and the proposed method is proved feasible. This model can give an exact description of the photodetector chip＇s high frequency performance,which enables an effective circuit-level prediction for photodetector and optoelectronic integrated circuits.

A Novel Framework to Construct S-Box Quantum Circuits Using System Modeling: Application to 4-Bit S-Boxes

Quantum computers accelerate many algorithms based on the superposition principle of quantum mechanics.The Grover algorithm provides significant performance to malicious users attacking symmetric key systems.Since the performance of attacks using quantum computers depends on the efficiency of the quantum circuit of the encryption algorithms,research research on the implementation of quantum circuits is essential.This paper presents a new framework to construct quantum circuits of substitution boxes(S-boxes)using system modeling.We model the quantum circuits of S-boxes using two layers:Toffoli and linear layers.We generate vector spaces based on the values of qubits used in the linear layers and apply them to find quantum circuits.The framework finds the circuit bymatching elements of vector spaces generated fromthe input and output of a given S-box,using the forward search or themeet-in-the-middle strategy.We developed a tool to apply this framework to 4-bit S-boxes.While the 4-bit S-box quantum circuit construction tool LIGHTER-R only finds circuits that can be implemented with four qubits,the proposed tool achieves the circuits with five qubits.The proposed tool can find quantum circuits of 4-bit odd permutations based on the controlled NOT,NOT,and Toffoli gates,whereas LIGHTER-R is unable to perform this task in the same environment.We expect this technique to become a critical step toward optimizing S-box quantum circuits.

Total ionizing dose effect modeling method for CMOS digital-integrated circuit

Simulating the total ionizing dose(TID)of an electrical system using transistor-level models can be difficult and expensive,particularly for digital-integrated circuits(ICs).In this study,a method for modeling TID effects in complementary metaloxide semiconductor(CMOS)digital ICs based on the input/output buffer information specification(IBIS)was proposed.The digital IC was first divided into three parts based on its internal structure:the input buffer,output buffer,and functional area.Each of these three parts was separately modeled.Using the IBIS model,the transistor V-I characteristic curves of the buffers were processed,and the physical parameters were extracted and modeled using VHDL-AMS.In the functional area,logic functions were modeled in VHDL according to the data sheet.A golden digital IC model was developed by combining the input buffer,output buffer,and functional area models.Furthermore,the golden ratio was reconstructed based on TID experimental data,enabling the assessment of TID effects on the threshold voltage,carrier mobility,and time series of the digital IC.TID experiments were conducted using a CMOS non-inverting multiplexer,NC7SZ157,and the results were compared with the simulation results,which showed that the relative errors were less than 2%at each dose point.This confirms the practicality and accuracy of the proposed modeling method.The TID effect model for digital ICs developed using this modeling technique includes both the logical function of the IC and changes in electrical properties and functional degradation impacted by TID,which has potential applications in the design of radiation-hardening tolerance in digital ICs.

Fluid-chemical modeling of the near-cathode sheath formation process in a high current broken in DC air circuit breaker

When the contacts of a medium-voltage DC air circuit breaker(DCCB) are separated, the energy distribution of the arc is determined by the formation process of the near-electrode sheath. Therefore, the voltage drop through the near-electrode sheath is an important means to build up the arc voltage, which directly determines the current-limiting performance of the DCCB. A numerical model to describe the near-electrode sheath formation process can provide insight into the physical mechanism of the arc formation, and thus provide a method for arc energy regulation. In this work, we establish a two-dimensional axisymmetric time-varying model of a medium-voltage DCCB arc when interrupted by high current based on a fluid-chemical model involving 16 kinds of species and 46 collision reactions. The transient distributions of electron number density, positive and negative ion number density, net space charge density, axial electric field, axial potential between electrodes, and near-cathode sheath are obtained from the numerical model. The computational results show that the electron density in the arc column increases, then decreases, and then stabilizes during the near-cathode sheath formation process, and the arc column's diameter gradually becomes wider. The 11.14 V–12.33 V drops along the17 μm space charge layer away from the cathode(65.5 k V/m–72.5 k V/m) when the current varies from 20 k A–80 k A.The homogeneous external magnetic field has little effect on the distribution of particles in the near-cathode sheath core,but the electron number density at the near-cathode sheath periphery can increase as the magnetic field increases and the homogeneous external magnetic field will lead to arc diffusion. The validity of the numerical model can be proven by comparison with the experiment.

Small-signal modeling and parameter extraction method for a multigate GaAs pHEMT switch

This paper presents an accurate small-signal model for multi-gate GaAs pHEMTs in switching-mode.The extraction method for the proposed model is developed.A 2-gate switch structure is fabricated on a commercial 0.5μm AlGaAs/GaAs pHEMT technology to verify the proposed model.Excellent agreement has been obtained between the measured and simulated results over a wide frequency range.

Modeling of Micropores Drilling Force for Printed Circuit Board Micro-holes Based on Energy Method

The quality of printed circuit board(PCB)micro-hole processing directly determines the stability of the inner and outer circuit connections.Micro-hole drilling technology is a typical method for PCB micro-hole processing.The problem of optimal control of its drilling force is one of the main factors affecting the quality of micro-hole machining.To address this problem,the thrust forces and torques in PCB drilling were first modeled and analyzed,and the corresponding prediction models were established.The drilling force analysis was carried out through the micro-hole drilling experiment,the specific cutting energy under different feed rates was calculated,the influence of the size effect was clarified,and the accuracy of the prediction model was verified.The result shows that during the drilling of glass fiber cloth,changes in the material removal mechanism are induced as the feed per revolution is varied.When the feed per revolution is less than the tool edge radius,the glass fiber is not cut by the main cutting edge,but is crushed and broken.When the feed per revolution is greater than the radius of the tool edge,the glass fiber is cut by the main cutting edge.At the same time,the established analytical model can accurately reflect the influence of the size effect on the drilling torque in PCB micro-hole drilling,and the error is within 10%.This method has certain practical application value in controlling PCB micro hole processing quality.

Reduced-order method for nuclear reactor primary circuit calculation

Accurate real-time simulations of nuclear reactor circuit systems are particularly important for system safety analysis and design.To effectively improve computational efficiency without reducing accuracy,this study establishes a thermal-hydraulics reduced-order model(ROM)for nuclear reactor circuit systems.The full-order circuit system calculation model is first established and verified and then used to calculate the thermal-hydraulic properties of the circuit system under different states as snapshots.The proper orthogonal decomposition method is used to extract the basis functions from snapshots,and the ROM is constructed using the least-squares method,effectively reducing the difficulty in constructing the ROM.A comparison between the full-order simulation and ROM prediction results of the AP1000 circuit system shows that the proposed ROM can improve computational efficiency by 1500 times while achieving a maximum relative error of 0.223%.This research develops a new direction and perspective for the digital twin modeling of nuclear reactor system circuits.

A complete small-signal HBT model including AC current crowding effect

An improved small-signal equivalent circuit of HBT concerning the AC current crowding effect is proposed in this paper. AC current crowding effect is modeled as a parallel RC circuit composed of Cbi and Rbi, with distributed base-collector junction capacitance also taken into account. The intrinsic portion is taken as a whole and extracted directly from the measured Sparameters in the whole frequency range of operation without any special test structures. An HBT device with a 2 × 20 μm^(2) emitter-area under three different biases were used to demonstrate the extraction and verify the accuracy of the equivalent circuit.

A Direct Parameter-Extraction Method for GaInP/GaAs Heterojunction Bipolar Transistors Small-Signal Model

An accurate and broad-band method for hetero-junction bipolar transistors(HBT) small-signal model parameters-extraction is presented in this paper. An equivalent circuit forthe HBT under a forward-bias condition is proposed for extraction of accessresistance and parasiticinductance. This method differs from previous ones by extracting the c-quivalent circuit parameterswithout using special test structure or global numerical optimization techniques. The mainadvantage of this method is that a unique and physically meaningful set of intrinsic parameters isextracted from impedance and admittance representation of the measured S-pa-rameters in thefrequency range of 1-12 GHz under different bias conditions. The method yields a deviation of lessthan 5% between measured and modeled S-parameters.

A Thermal-Conscious Integrated Circuit Power Model and Its Impact on Dynamic Voltage Scaling Techniques

We propose a novel thermal-conscious power model for integrated circuits that can accurately predict power and temperature under voltage scaling. Experimental results show that the leakage power consumption is underestimated by 52 % if thermal effects are omitted. Furthermore, an inconsistency arises when energy and temperature are simultaneously optimized by dynamic voltage scaling. Temperature is a limiting factor for future integrated circuits,and the thermal optimization approach can attain a temperature reduction of up to 12℃ with less than 1.8% energy penalty compared with the energy optimization one.

Small Signal Equivalent Circuit Model and Modulation Properties of Vertical Cavity-Surface Emitting Lasers

Small signal equivalent circuit model and modulation properties of vertical cavity surface emitting lasers(VCSEL's) are presented.The modulation properties both in analytic equation calculation and in circuit model simulation are studied.The analytic equation calculation of the modulation properties is calculated by using Mathcad program and the circuit model simulation is simulated by using Pspice program respectively.The results of calculation and the simulation are in good agreement with each other.Experiment is performed to testify the circuit model.

A Slice Analysis-Based Bayesian Inference Dynamic Power Model for CMOS Combinational Circuits

To improve the accuracy and speed in cycle-accurate power estimation, this paper uses multiple dimensional coefficients to build a Bayesian inference dynamic power model. By analyzing the power distribution and internal node state, we find the deficiency of only using port information. Then, we define the gate level number computing method and the concept of slice, and propose using slice analysis to distill switching density as coefficients in a special circuit stage and participate in Bayesian inference with port information. Experiments show that this method can reduce the power-per-cycle estimation error by 21.9% and the root mean square error by 25.0% compared with the original model, and maintain a 700 ＋ speedup compared with the existing gate-level power analysis technique.

Nonlinear Auto-Companding Method for Behavioral Modeling of Switched-Current Circuits

A wavelet collocation method with nonlinear auto companding is proposed for behavioral modeling of switched current circuits.The companding function is automatically constructed according to the initial error distribution obtained through approximating the input output function of the SI circuit by conventional wavelet collocation method.In practical applications,the proposed method is a general purpose approach,by which both the small signal effect and the large signal effect are modeled in a unified formulation to ease the process of modeling and simulation.Compared with the published modeling approaches,the proposed nonlinear auto companding method works more efficiently not only in controlling the error distribution but also in reducing the modeling errors.To demonstrate the promising features of the proposed method,several SI circuits are employed as examples to be modeled and simulated.

Design and Realization of CPW Circuits Using EC-ANN Models for CPW Discontinuities

Novel accurate and efficient equivalent circuit trained artificial neural-network （EC-ANN） models,which inherit and improve upon EC model and EM-ANN models＇ advantages,are developed for coplanar waveguide （CPW） discontinuities. Modeled discontinuities include ： CPW step, interdigital capacitor, symmetric cross junction, and spiral inductor, for which validation tests are performed. These models allow for circuit design, simulation, and optimization within a CAD simulator. Design and realization of a coplanar lumped element band pass filter on GaAs using the developed CPW EC-ANN models are demonstrated.

A Comparative Study on Open Circuit Voltage Models for Lithium-ion Batteries

The current research of state of charge(SoC) online estimation of lithium-ion battery(LiB) in electric vehicles(EVs)mainly focuses on adopting or improving of battery models and estimation filters. However, little attention has been paid to the accuracy of various open circuit voltage(OCV) models for correcting the SoC with aid of the ampere-hour counting method. This paper presents a comprehensive comparison study on eighteen OCV models which cover the majority of models used in literature. The low-current OCV tests are conducted on the typical commercial LiFePO/graphite(LFP) and LiNiMnCoO/graphite(NMC) cells to obtain the experimental OCV-SoC curves at different ambient temperature and aging stages. With selected OCV and SoC points from experimental OCV-SoC curves, the parameters of each OCV model are determined by curve fitting toolbox of MATLAB 2013. Then the fitting OCV-SoC curves based on diversified OCV models are also obtained. The indicator of root-mean-square error(RMSE) between the experimental data and fitted data is selected to evaluate the adaptabilities of these OCV models for their main features, advantages,and limitations. The sensitivities of OCV models to ambient temperatures, aging stages, numbers of data points,and SoC regions are studied for both NMC and LFP cells. Furthermore, the influences of these models on SoC estimation are discussed. Through a comprehensive comparison and analysis on OCV models, some recommendations in selecting OCV models for both NMC and LFP cells are given.

Simulation of second-order RC equivalent circuit model of lithium battery based on variable resistance and capacitance

With the rise of the electric vehicle industry,as the power source of electric vehicles,lithium battery has become a research hotspot.The state of charge(SOC)estimation and modelling of lithium battery are studied in this paper.The ampere-hour(Ah)integration method based on external characteristics is analyzed,and the open-circuit voltage(OCV)method is studied.The two methods are combined to estimate SOC.Considering the accuracy and complexity of the model,the second-order RC equivalent circuit model of lithium battery is selected.Pulse discharge and exponential fitting of lithium battery are used to obtain corresponding parameters.The simulation is carried out by using fixed resistance capacitance and variable resistance capacitor respectively.The accuracy of variable resistance and capacitance model is 2.9%,which verifies the validity of the proposed model.

LOW-FREQUENCY LOW-NOISE CIRCUITS DESIGN USING AN E_n-I_n MODEL

In view of the limitations of a Rn-Gn model in the low frequency range and the defects of an En-In model in common use now, this paper builds a complete En-In model according to the theory of random harmonic. The parameters for the low-noise design such as the equivalent input noisy voltage Ens, the optimum source impedance Zsopt and the minimum noise figure Fmin can be calculated accurately by using this En-In model because it considers the coherence between the noise sources fully. Moreover, this paper points out that it will cause the maximum 30% miscalculation when neglecting the effects of the correlation coefficient 7. Using the series-series circuits as an example, this paper discusses the methods for the En-In noise analysis of electronic circuits preliminarily and demonstrates its correctness through the comparison between the simulated and measured results of the minimum noise figure Fmin of a single current series negative feedback circuit.

BALANCED TRUNCATED MODELS OF C INTERCONNECT CIRCUITS AND THEIR SIMULATION

The Balanced Truncation Method (BTM) is applied to an even distributed RC interconnect case by using Wang's closed-forms of even distributed RC interconnect models. The results show that extremely high order RC interconnect can be high-accurately approximated by only third order balanced model. Related simulations are executed in both time domain and frequency domain. The results may be applied to VLSI interconnect model reduction and design.

Small Signal Circuit Model of Double Photodiodes

The transmission delay of photogenerated carriers in a CMOS-process-compatible double photodiode (DPD) is analyzed by using device simulation.The DPD small signal equivalent circuit model which includes transmission delay of photogenerated carriers is given.From analysis on the frequency domain of the circuit model the device has two poles.One has the relationship with junction capacitance and the DPD’s load,the other with the depth and the doping concentration of the N-well in the DPD.Different depth of the N-well and different area of the DPDs with bandwidth were compared.The analysis results are important to design the high speed DPDs.