A new digital transmitter based on delta sigma modulator( DSM) with bus-splitting is presented in this paper. The second order low pass error-feedback delta sigma modulator( EF-DSM) is focused. The signal to noise rat...A new digital transmitter based on delta sigma modulator( DSM) with bus-splitting is presented in this paper. The second order low pass error-feedback delta sigma modulator( EF-DSM) is focused. The signal to noise ratio( SNR) of the EF-DSM is derived for different bus-splitting bits.Following the EF-DSM,a multi-bit digital up mixer is used for carrier frequency transform. In order to validate the theory of bus-splitting,two types of transmitters are implemented on FPGA for comparison,in which one is with non-bus-splitting and the other is with bus-splitting. The FPGA implemented transmitter with bus-splitting promotes the maximum operation speed by 39%,and reduces hardware consumptions more than 16%. Both single tone and orthogonal frequency division multiplexing( OFDM) signal source are used to evaluate the proposed transmitter.展开更多
Time-interleaved structure can promote the equivalent processing speed of a digital signal processing system. An improved time-interleaved error feedback delta sigma modulator( TI-EF-DSM)for digital transmitter applic...Time-interleaved structure can promote the equivalent processing speed of a digital signal processing system. An improved time-interleaved error feedback delta sigma modulator( TI-EF-DSM)for digital transmitter application is presented in this paper. Two TI-EF-DSMs are compared,one is a conventional directly implemented and the other is the improved. The processing speed of the proposed two-channel improved time-interleaved error feedback delta sigma modulator( ITI-EF-DSM) is higher than the conventional directly implemented TI-EF-DSM for shortened critical path. A digital transmitter based on the ITI-EF-DSM is implemented on field progrmmable gate array( FPGA). The long term evolution( LTE) signals with different bandwidths of 5 MHz,10 MHz and 20 MHz are used as the signal source to evaluate the transmitter. The achieved SNR is 41 dB for the 20 MHz LTE signal with the processing clock of only 184 MHz.展开更多
The traditional orthogonal frequency divi-sion multiplexing(OFDM)transmitter is implemented by inverse fast Fourier transform(IFFT),up-sampling and low pass shaping filter(LPSF),which occupy a large number of hardware...The traditional orthogonal frequency divi-sion multiplexing(OFDM)transmitter is implemented by inverse fast Fourier transform(IFFT),up-sampling and low pass shaping filter(LPSF),which occupy a large number of hardware resources and have long la-tency.To further meet the 5G and future 6G commu-nication requirements,this paper proposes a novel di-rect digital synthesis(DDS)based OFDM transmitter structure that can replace these modules.Due to the strong parallelism of the system structure,it is very suitable for implementation on field programable gate array(FPGA)platform.After making two special sim-plifications to the primary structure,the refined struc-ture becomes very simple compared with the tradi-tional structures.Most attractively,the proposed struc-ture has the following three advantages that i)the data transformation from frequency domain to time domain has zero latency,ii)the transformation length does not need to be an integer power of 2 and iii)the struc-ture does not even need to use any multiplier,thus leading to low implementation complexity and high speed.Comparative experiments are carried out on Intel FPGA platform which show that our DDS based structure can save more than half of the resources com-pared with the traditional structures and can provide the same bit error rate(BER)performance under the condition without using any LPSF.展开更多
阐述数字幅度调制(Digital Amplitude Modulation,DAM)中波发射机模数(Analog to Digital,A/D)转换原理、A/D转换板主要组成部分及其作用,列举A/D转换板在实际运行中出现的常见故障案例,对常见故障给出分析和处理方法,为今后该板的故障...阐述数字幅度调制(Digital Amplitude Modulation,DAM)中波发射机模数(Analog to Digital,A/D)转换原理、A/D转换板主要组成部分及其作用,列举A/D转换板在实际运行中出现的常见故障案例,对常见故障给出分析和处理方法,为今后该板的故障分析和处理工作提供参考。展开更多
基金Supported by the National Natural Science Foundation of China(No.61674037)National Key Research and Development Program of China(No.2016YFC0800400)+1 种基金the Priority Academic Program Development of Jiangsu Higher Education Institutionsthe National Power Grid Corp Science and Technology Project(No.SGTYHT/16-JS-198)
文摘A new digital transmitter based on delta sigma modulator( DSM) with bus-splitting is presented in this paper. The second order low pass error-feedback delta sigma modulator( EF-DSM) is focused. The signal to noise ratio( SNR) of the EF-DSM is derived for different bus-splitting bits.Following the EF-DSM,a multi-bit digital up mixer is used for carrier frequency transform. In order to validate the theory of bus-splitting,two types of transmitters are implemented on FPGA for comparison,in which one is with non-bus-splitting and the other is with bus-splitting. The FPGA implemented transmitter with bus-splitting promotes the maximum operation speed by 39%,and reduces hardware consumptions more than 16%. Both single tone and orthogonal frequency division multiplexing( OFDM) signal source are used to evaluate the proposed transmitter.
基金Supported by the National Natural Science Foundation of China(No.61674037)the National Key Research and Development Program of China(No.2016YFC0800400)+2 种基金the Priority Academic Program Development of Jiangsu Higher Education Institutionsthe National Power Grid Corp Science and Technology Project(No.SGTYHT/16-JS-198)the State Grid Nanjing Power Supply Company Project(No.1701052)
文摘Time-interleaved structure can promote the equivalent processing speed of a digital signal processing system. An improved time-interleaved error feedback delta sigma modulator( TI-EF-DSM)for digital transmitter application is presented in this paper. Two TI-EF-DSMs are compared,one is a conventional directly implemented and the other is the improved. The processing speed of the proposed two-channel improved time-interleaved error feedback delta sigma modulator( ITI-EF-DSM) is higher than the conventional directly implemented TI-EF-DSM for shortened critical path. A digital transmitter based on the ITI-EF-DSM is implemented on field progrmmable gate array( FPGA). The long term evolution( LTE) signals with different bandwidths of 5 MHz,10 MHz and 20 MHz are used as the signal source to evaluate the transmitter. The achieved SNR is 41 dB for the 20 MHz LTE signal with the processing clock of only 184 MHz.
基金the Natural Science Foun-dation of Hubei Province under Grant 2019CFB593National Natural Science Foundation of China un-der Grant 61961016Starting Fund for Doc-toral Research in Hubei Minzu University under Grant MY2018B018.
文摘The traditional orthogonal frequency divi-sion multiplexing(OFDM)transmitter is implemented by inverse fast Fourier transform(IFFT),up-sampling and low pass shaping filter(LPSF),which occupy a large number of hardware resources and have long la-tency.To further meet the 5G and future 6G commu-nication requirements,this paper proposes a novel di-rect digital synthesis(DDS)based OFDM transmitter structure that can replace these modules.Due to the strong parallelism of the system structure,it is very suitable for implementation on field programable gate array(FPGA)platform.After making two special sim-plifications to the primary structure,the refined struc-ture becomes very simple compared with the tradi-tional structures.Most attractively,the proposed struc-ture has the following three advantages that i)the data transformation from frequency domain to time domain has zero latency,ii)the transformation length does not need to be an integer power of 2 and iii)the struc-ture does not even need to use any multiplier,thus leading to low implementation complexity and high speed.Comparative experiments are carried out on Intel FPGA platform which show that our DDS based structure can save more than half of the resources com-pared with the traditional structures and can provide the same bit error rate(BER)performance under the condition without using any LPSF.
文摘阐述数字幅度调制(Digital Amplitude Modulation,DAM)中波发射机模数(Analog to Digital,A/D)转换原理、A/D转换板主要组成部分及其作用,列举A/D转换板在实际运行中出现的常见故障案例,对常见故障给出分析和处理方法,为今后该板的故障分析和处理工作提供参考。
