Stack effect is a dominant driving force for building natural ventilation.Analytical models were developed for the evaluation of stack effect in a shaft,accounting for the heat transfer from shaft interior boundaries....Stack effect is a dominant driving force for building natural ventilation.Analytical models were developed for the evaluation of stack effect in a shaft,accounting for the heat transfer from shaft interior boundaries.Both the conditions with constant heat flux from boundaries to the airflow and the ones with constant boundary temperature were considered.The prediction capabilities of these analytical models were evaluated by using large eddy simulation(LES) for a hypothetical shaft.The results show that there are fairly good agreements between the predictions of the analytical models and the LES predictions in mass flow rate,vertical temperatures profile and pressure difference as well.Both the results of analytical models and LES show that the neutral plane could locate higher than one half of the shaft height when the upper opening area is identical with the lower opening area.Further,it is also shown that the analytical models perform better than KLOTE's model does in the mass flow rate prediction.展开更多
After comparing the mechanism of tilted plume under stack effect with that of spill plume,the tilted plume model induced by stack effect in a vertical shaft is developed simply based on the theoretical results and a s...After comparing the mechanism of tilted plume under stack effect with that of spill plume,the tilted plume model induced by stack effect in a vertical shaft is developed simply based on the theoretical results and a series of full-scale tests. It is shown that the two sides of plume are symmetrical and have an accordant regulation that the plume radius has a linear relation to the height z. The profile of fire plume under stack effect is similar to the windblown flame in wind tunnel,and the range of flame deflection angle is about from 50 to 60 degree.展开更多
Since stack effect that occurs in high-rise buildings has an effect on the indoor environment of the buildings, energy loss and smoke control in case of a fire, there is a need to conduct research on this. For an anal...Since stack effect that occurs in high-rise buildings has an effect on the indoor environment of the buildings, energy loss and smoke control in case of a fire, there is a need to conduct research on this. For an analysis of the stack effect, analysis methods on the leakage flow through gap of interior door shall be formulated. Until now, studies related to the gap leakage flow in buildings have mainly analyzed flow field and pressure in the buildings one-dimensionally using pressure difference-leakage flowrate relations of Orifice Equation and a network numerical analysis algorithm that as- sumes each compartment in the buildings as a single point. In this study, the Momentum Loss Model which enables pressure drop to be proportional to the flow velocity through the gap of door in computational domain of 3-dimensional numerical analysis was proposed to reflect the gap flow phenomenon effectively in 3-dimensional numerical analysis. Using the proposed model, 3-dimensional numerical analysis of the stack effect on the stairs in buildings was performed, and the effects of separation door and lobby between stair and accommodation on the stack effect were investigated.展开更多
Leakage current of CMOS circuit increases dramatically with the technologyscaling down and has become a critical issue of high performance system. Subthreshold, gate andreverse biased junction band-to-band tunneling (...Leakage current of CMOS circuit increases dramatically with the technologyscaling down and has become a critical issue of high performance system. Subthreshold, gate andreverse biased junction band-to-band tunneling (BTBT) leakages are considered three maindeterminants of total leakage current. Up to now, how to accurately estimate leakage current oflarge-scale circuits within endurable time remains unsolved, even though accurate leakage modelshave been widely discussed. In this paper, the authors first dip into the stack effect of CMOStechnology and propose a new simple gate-level leakage current model. Then, a table-lookup basedtotal leakage current simulator is built up according to the model. To validate the simulator,accurate leakage current is simulated at circuit level using popular simulator HSPICE forcomparison. Some further studies such as maximum leakage current estimation, minimum leakage currentgeneration and a high-level average leakage current macromodel are introduced in detail.Experiments on ISCAS85 and ISCAS89 benchmarks demonstrate that the two proposed leakage currentestimation methods are very accurate and efficient.展开更多
The stabilities of the complexes of three pyridine-like ligands with M(II)(ATP)^(2-) and M(II)(M=Ni,Co)were studied by spectrophotometry and by comparing the stability constants of the ternary complexes with these of ...The stabilities of the complexes of three pyridine-like ligands with M(II)(ATP)^(2-) and M(II)(M=Ni,Co)were studied by spectrophotometry and by comparing the stability constants of the ternary complexes with these of the binary complexes.A stacking interaction between the pyridine ring and the purine ring of ATP is indicated.The general existence of the stacking interaction encourages us to interpret the antitumor mechanism of a new class of antitumor drugs.展开更多
Higher-s dielectric LaLuO3, deposited by molecular beam deposition, with TiN as gate stack is integrated into high-mobility Si/SiGe/SOI quantum-well p-type metal-oxide-semiconduetor field effect transistors. Threshold...Higher-s dielectric LaLuO3, deposited by molecular beam deposition, with TiN as gate stack is integrated into high-mobility Si/SiGe/SOI quantum-well p-type metal-oxide-semiconduetor field effect transistors. Threshold voltage shift and capacitance equivalent thickness shrink are observed, resulting from oxygen scavenging effect in LaLuO3 with ti-rich TiN after high temperature annealing. The mechanism of oxygen scavenging and its potential for resistive memory applications are analyzed and discussed.展开更多
A stacked lateral double-diffused metal–oxide–semiconductor field-effect transistor(LDMOS) with enhanced depletion effect by surface substrate is proposed(ST-LDMOS), which is compatible with the traditional CMOS pro...A stacked lateral double-diffused metal–oxide–semiconductor field-effect transistor(LDMOS) with enhanced depletion effect by surface substrate is proposed(ST-LDMOS), which is compatible with the traditional CMOS processes. The new stacked structure is characterized by double substrates and surface dielectric trenches(SDT). The drift region is separated by the P-buried layer to form two vertically parallel devices. The doping concentration of the drift region is increased benefiting from the enhanced auxiliary depletion effect of the double substrates, leading to a lower specific on-resistance(Ron,sp). Multiple electric field peaks appear at the corners of the SDT, which improves the lateral electric field distribution and the breakdown voltage(BV). Compared to a conventional LDMOS(C-LDMOS), the BV in the ST-LDMOS increases from 259 V to 459 V, an improvement of 77.22%. The Ron,sp decreases from 39.62 m?·cm^2 to 23.24 m?·cm^2 and the Baliga's figure of merit(FOM) of is 9.07 MW/cm^2.展开更多
It is necessary to understand the features of air pressure in a drainage stack of a high-rise building for properly designing and operating a drainage system. This paper presents a mathematical model for predicting th...It is necessary to understand the features of air pressure in a drainage stack of a high-rise building for properly designing and operating a drainage system. This paper presents a mathematical model for predicting the stack performance. A step function is used to describe the effect of the air entrainment caused by the water discharged from branch pipes. An additional source term is introduced to reflect the gas-liquid interphase interaction (GLII) and stack base effect. The drainage stack is divided into upper and base parts. The air pressure in the upper part is predicted by a total variation diminishing (TVD) scheme, while in the base part, it is predicted by a characteristic line method (CLM). The predicted results are compared with the data measured in a real-scale high- rise test building. It is found that the additional source term in the present model is effective. It intensively influences the air pressure distribution in the stack. The air pressure is also sensitive to the velocity-adjusting parameter (VAP), the branch pipe air entrainment, and the conditions on the stack bottom.展开更多
Silicon-on-insulator (SOI) CMOS technology is a very attractive option for implementing digital integrated circuits for low power applications. This paper presents migration of standby subthreshold leakage control tec...Silicon-on-insulator (SOI) CMOS technology is a very attractive option for implementing digital integrated circuits for low power applications. This paper presents migration of standby subthreshold leakage control technique from a bulk CMOS to SOI CMOS technology. An improved SOI CMOS technology based circuit technique for effective reduction of standby subthreshold leakage power dissipation is proposed in this paper. The proposed technique is validated through design and simulation of a one-bit full adder circuit at a temperature of 27℃, supply voltage, VDD of 0.90 V in 120 nm SOI CMOS technology. Existing standby subthreshold leakage control techniques in CMOS bulk technology are compared with the proposed technique in SOI CMOS technology. Both the proposed and existing techniques are also implemented in SOI CMOS technology and compared. Reduction in standby subthreshold leakage power dissipation by reduction factors of 54x and 45x foraone-bit full adder circuit was achieved using our proposed SOI CMOS technology based circuit technique in comparison with existing techniques such as MTCMOS technique and SCCMOS technique respectively in CMOS bulk technology. Dynamic power dissipation was also reduced significantly by using this proposed SOI CMOS technology based circuit technique. Standby subthreshold leakage power dissipation and dynamic power dissipation were also reduced significantly using the proposed circuit technique in comparison with other existing techniques, when all circuit techniques were implemented in SOI CMOS technology. All simulations were performed using Microwindver 3.1 EDA tool.展开更多
In this paper, the effect of floating body effect (FBE) on a single event transient generation mechanism in fully depleted (FD) silicon-on-insulator (SOI) technology is investigated using three-dimensional techn...In this paper, the effect of floating body effect (FBE) on a single event transient generation mechanism in fully depleted (FD) silicon-on-insulator (SOI) technology is investigated using three-dimensional technology computer-aided design (3D- TCAD) numerical simulation. The results indicate that the main SET generation mechanism is not carder drift/diffusion but floating body effect (FBE) whether for positive or negative channel metal oxide semiconductor (PMOS or NMOS). Two stacking layout designs mitigating FBE are investigated as well, and the results indicate that the in-line stacking (IS) layout can mitigate FBE completely and is area penalty saving compared with the conventional stacking layout.展开更多
Based on the exact resultant solution of two-dimensional Poisson's equation, the novel two-dimensional models, which include surface potential, threshold voltage, subthreshold current and subthreshold swing, have bee...Based on the exact resultant solution of two-dimensional Poisson's equation, the novel two-dimensional models, which include surface potential, threshold voltage, subthreshold current and subthreshold swing, have been developed for gate stack symmetrical double-gate strained-Si MOSFETs. The models are verified by numerical simulation. Besides offering the physical insight into device physics, the model provides the basic designing guidance of further immunity of short channel effect of complementary metal-oxide-semiconductor (CMOS)-based device in a nanoscale regime.展开更多
基金Project(50838009) supported by the National Natural Science Foundation of ChinaProject(2010DFA72740-03) supported by the National Key Technology Research and Development Program of China
文摘Stack effect is a dominant driving force for building natural ventilation.Analytical models were developed for the evaluation of stack effect in a shaft,accounting for the heat transfer from shaft interior boundaries.Both the conditions with constant heat flux from boundaries to the airflow and the ones with constant boundary temperature were considered.The prediction capabilities of these analytical models were evaluated by using large eddy simulation(LES) for a hypothetical shaft.The results show that there are fairly good agreements between the predictions of the analytical models and the LES predictions in mass flow rate,vertical temperatures profile and pressure difference as well.Both the results of analytical models and LES show that the neutral plane could locate higher than one half of the shaft height when the upper opening area is identical with the lower opening area.Further,it is also shown that the analytical models perform better than KLOTE's model does in the mass flow rate prediction.
基金supported by the National Key Project of Scientific and Technical Supporting Programs Funded by Ministry of Science &Technology of China ( Grant No: 2006BAJ13B03)the RGCCERG Grant #CityU1253/04E from Hong Kong Re-search Grant Council, HKSAR
文摘After comparing the mechanism of tilted plume under stack effect with that of spill plume,the tilted plume model induced by stack effect in a vertical shaft is developed simply based on the theoretical results and a series of full-scale tests. It is shown that the two sides of plume are symmetrical and have an accordant regulation that the plume radius has a linear relation to the height z. The profile of fire plume under stack effect is similar to the windblown flame in wind tunnel,and the range of flame deflection angle is about from 50 to 60 degree.
文摘Since stack effect that occurs in high-rise buildings has an effect on the indoor environment of the buildings, energy loss and smoke control in case of a fire, there is a need to conduct research on this. For an analysis of the stack effect, analysis methods on the leakage flow through gap of interior door shall be formulated. Until now, studies related to the gap leakage flow in buildings have mainly analyzed flow field and pressure in the buildings one-dimensionally using pressure difference-leakage flowrate relations of Orifice Equation and a network numerical analysis algorithm that as- sumes each compartment in the buildings as a single point. In this study, the Momentum Loss Model which enables pressure drop to be proportional to the flow velocity through the gap of door in computational domain of 3-dimensional numerical analysis was proposed to reflect the gap flow phenomenon effectively in 3-dimensional numerical analysis. Using the proposed model, 3-dimensional numerical analysis of the stack effect on the stairs in buildings was performed, and the effects of separation door and lobby between stair and accommodation on the stack effect were investigated.
文摘Leakage current of CMOS circuit increases dramatically with the technologyscaling down and has become a critical issue of high performance system. Subthreshold, gate andreverse biased junction band-to-band tunneling (BTBT) leakages are considered three maindeterminants of total leakage current. Up to now, how to accurately estimate leakage current oflarge-scale circuits within endurable time remains unsolved, even though accurate leakage modelshave been widely discussed. In this paper, the authors first dip into the stack effect of CMOStechnology and propose a new simple gate-level leakage current model. Then, a table-lookup basedtotal leakage current simulator is built up according to the model. To validate the simulator,accurate leakage current is simulated at circuit level using popular simulator HSPICE forcomparison. Some further studies such as maximum leakage current estimation, minimum leakage currentgeneration and a high-level average leakage current macromodel are introduced in detail.Experiments on ISCAS85 and ISCAS89 benchmarks demonstrate that the two proposed leakage currentestimation methods are very accurate and efficient.
基金Supported by the National Natural Science Foundation of Chinathe Doctoral Program Foundation of Institution of High Education the Research Foundation of State Key Laboratory of Coordination Chemistry,Nanjing University.
文摘The stabilities of the complexes of three pyridine-like ligands with M(II)(ATP)^(2-) and M(II)(M=Ni,Co)were studied by spectrophotometry and by comparing the stability constants of the ternary complexes with these of the binary complexes.A stacking interaction between the pyridine ring and the purine ring of ATP is indicated.The general existence of the stacking interaction encourages us to interpret the antitumor mechanism of a new class of antitumor drugs.
基金Supported by the National Natural Science Foundation of China under Grant No 61306126
文摘Higher-s dielectric LaLuO3, deposited by molecular beam deposition, with TiN as gate stack is integrated into high-mobility Si/SiGe/SOI quantum-well p-type metal-oxide-semiconduetor field effect transistors. Threshold voltage shift and capacitance equivalent thickness shrink are observed, resulting from oxygen scavenging effect in LaLuO3 with ti-rich TiN after high temperature annealing. The mechanism of oxygen scavenging and its potential for resistive memory applications are analyzed and discussed.
基金supported by the National Natural Science Foundation of China(Grant No.61464003)the Guangxi Natural Science Foundation,China(Grant Nos.2015GXNSFAA139300 and 2018JJA170010)
文摘A stacked lateral double-diffused metal–oxide–semiconductor field-effect transistor(LDMOS) with enhanced depletion effect by surface substrate is proposed(ST-LDMOS), which is compatible with the traditional CMOS processes. The new stacked structure is characterized by double substrates and surface dielectric trenches(SDT). The drift region is separated by the P-buried layer to form two vertically parallel devices. The doping concentration of the drift region is increased benefiting from the enhanced auxiliary depletion effect of the double substrates, leading to a lower specific on-resistance(Ron,sp). Multiple electric field peaks appear at the corners of the SDT, which improves the lateral electric field distribution and the breakdown voltage(BV). Compared to a conventional LDMOS(C-LDMOS), the BV in the ST-LDMOS increases from 259 V to 459 V, an improvement of 77.22%. The Ron,sp decreases from 39.62 m?·cm^2 to 23.24 m?·cm^2 and the Baliga's figure of merit(FOM) of is 9.07 MW/cm^2.
基金Project supported by the National Natural Science Foundation of China (No. 10972212)
文摘It is necessary to understand the features of air pressure in a drainage stack of a high-rise building for properly designing and operating a drainage system. This paper presents a mathematical model for predicting the stack performance. A step function is used to describe the effect of the air entrainment caused by the water discharged from branch pipes. An additional source term is introduced to reflect the gas-liquid interphase interaction (GLII) and stack base effect. The drainage stack is divided into upper and base parts. The air pressure in the upper part is predicted by a total variation diminishing (TVD) scheme, while in the base part, it is predicted by a characteristic line method (CLM). The predicted results are compared with the data measured in a real-scale high- rise test building. It is found that the additional source term in the present model is effective. It intensively influences the air pressure distribution in the stack. The air pressure is also sensitive to the velocity-adjusting parameter (VAP), the branch pipe air entrainment, and the conditions on the stack bottom.
文摘Silicon-on-insulator (SOI) CMOS technology is a very attractive option for implementing digital integrated circuits for low power applications. This paper presents migration of standby subthreshold leakage control technique from a bulk CMOS to SOI CMOS technology. An improved SOI CMOS technology based circuit technique for effective reduction of standby subthreshold leakage power dissipation is proposed in this paper. The proposed technique is validated through design and simulation of a one-bit full adder circuit at a temperature of 27℃, supply voltage, VDD of 0.90 V in 120 nm SOI CMOS technology. Existing standby subthreshold leakage control techniques in CMOS bulk technology are compared with the proposed technique in SOI CMOS technology. Both the proposed and existing techniques are also implemented in SOI CMOS technology and compared. Reduction in standby subthreshold leakage power dissipation by reduction factors of 54x and 45x foraone-bit full adder circuit was achieved using our proposed SOI CMOS technology based circuit technique in comparison with existing techniques such as MTCMOS technique and SCCMOS technique respectively in CMOS bulk technology. Dynamic power dissipation was also reduced significantly by using this proposed SOI CMOS technology based circuit technique. Standby subthreshold leakage power dissipation and dynamic power dissipation were also reduced significantly using the proposed circuit technique in comparison with other existing techniques, when all circuit techniques were implemented in SOI CMOS technology. All simulations were performed using Microwindver 3.1 EDA tool.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61376109,61434007,and 61176030)the Advanced Research Project of National University of Defense Technology,China(Grant No.0100066314001)
文摘In this paper, the effect of floating body effect (FBE) on a single event transient generation mechanism in fully depleted (FD) silicon-on-insulator (SOI) technology is investigated using three-dimensional technology computer-aided design (3D- TCAD) numerical simulation. The results indicate that the main SET generation mechanism is not carder drift/diffusion but floating body effect (FBE) whether for positive or negative channel metal oxide semiconductor (PMOS or NMOS). Two stacking layout designs mitigating FBE are investigated as well, and the results indicate that the in-line stacking (IS) layout can mitigate FBE completely and is area penalty saving compared with the conventional stacking layout.
基金Project supported by the National Natural Science Foundation of China (Grant Nos. 60976068 and 60936005)Cultivation Fund of the Key Scientific and Technical Innovation Project, Ministry of Education of China (Grant No. 708083),Cultivation Fund of the Key Scientific and Technical Innovation Project, Ministry of Education of China (Grant No. 200807010010)
文摘Based on the exact resultant solution of two-dimensional Poisson's equation, the novel two-dimensional models, which include surface potential, threshold voltage, subthreshold current and subthreshold swing, have been developed for gate stack symmetrical double-gate strained-Si MOSFETs. The models are verified by numerical simulation. Besides offering the physical insight into device physics, the model provides the basic designing guidance of further immunity of short channel effect of complementary metal-oxide-semiconductor (CMOS)-based device in a nanoscale regime.