Compared with traditional waveform digitization with flash-ADCs, waveform digitization with switched-capacitor arrays (SCAs) is able to achieve the sampling speed above 1 GS/s without degrading the analog to digital c...Compared with traditional waveform digitization with flash-ADCs, waveform digitization with switched-capacitor arrays (SCAs) is able to achieve the sampling speed above 1 GS/s without degrading the analog to digital conversion precision significantly. In this paper, we present the implementation of a fast waveform digitization system with the use of SCAs, and evaluate its performance of waveform digitization and the waveform timing. At about 5 GS/s, the dynamic input range of the digitizer is about 66 dB, and its timing precision is about 20 ps (RMS).展开更多
This paper presents a novel method that is applied to realize the Linear Transformation(LT)Switched-Capacitor Filter(SCF).It adopts the Voltage Control Voltage Source(VCVS)equalized transfor-mation to revise the origi...This paper presents a novel method that is applied to realize the Linear Transformation(LT)Switched-Capacitor Filter(SCF).It adopts the Voltage Control Voltage Source(VCVS)equalized transfor-mation to revise the original LC ladder filter and induce it into 16 basic sections and then extend the princi-ple of the LT in order to fit active and 3 port networks and give out switched-capacitor circuits corre-sponding to the 16 basic sections,which can realize all four kinds of filters——LP,HP,BP,BS filters.De-signed examples are given here.An Nth order filter only requires N amplifiers and the circuit is insensitive toparasitic capacitances.The experimental results of a 3rd order elliptic LP and a 6th order elliptic BP are giv-en and agree with the theory.展开更多
In this paper the design and implementation of sixth-order lowpass elliptic switched-capacitor filter( SCF) for interface circuit of Micro-Electro-Mechanical System( MEMS) sensor are presented. This work aims to lower...In this paper the design and implementation of sixth-order lowpass elliptic switched-capacitor filter( SCF) for interface circuit of Micro-Electro-Mechanical System( MEMS) sensor are presented. This work aims to lower total harmonic distortion( THD) without deteriorating other performances. After system design in Simulink,the filter is realized in transistor level and finally fabricated in Central Semiconductor Manufacturing Corporation( CSMC) 0.5 μm metal-oxide-semiconductor( CMOS) technology. Typical measured results are: it operates with 25: 1 clock-to-corner frequency ratio and a 10 k Hz maximum corner frequency. The maximum passband ripple is about 0.49 d B and the minimum stopband rejection is 40 d B for the temperature from-20 ℃to 80 ℃. For the 250 k Hz clock frequency setting,given the 1 k Hz,- 8 d BVrms input signal,the measured worst case THD is-64 d B. The active area of the chip is 2.8 mm2 with 8 pads. The analog power dissipation is10 m W from a 5 V power supply.展开更多
To miniaturize a very low level dc current amplifier and to improve its output response speed, the switched capacitor negative feedback circuit (SCNF), instead of the conventionally used high-ohmage resistor, is prese...To miniaturize a very low level dc current amplifier and to improve its output response speed, the switched capacitor negative feedback circuit (SCNF), instead of the conventionally used high-ohmage resistor, is presented in this paper. In our system, a switched capacitor filter (SCF) and an offset controller are also used to decrease vibrations and offset voltage at the output of the amplifier using SCNF. The theoretical output voltage of the very low level dc current amplifier using SCNF is obtained. The experimental results show that the unnecessary components of the amplifier’s output are much decreased, and that the response speed of the amplifier with both the SCNF and SCF is faster than that using high-ohmage resistor.展开更多
This paper proposes third order tunable bandwidth active Switched-Capacitor filter. The circuit consists of only op-amps and switched capacitors. The circuit is designed for circuit merit factor Q = 10. The proposed c...This paper proposes third order tunable bandwidth active Switched-Capacitor filter. The circuit consists of only op-amps and switched capacitors. The circuit is designed for circuit merit factor Q = 10. The proposed circuit implements three filter functions low pass, band pass and high pass simultaneously in single circuit. The filter circuit can be used for both narrow as well as for wide bandwidth. For various values of cut-off frequencies the behaviour of circuit is studied. The circuit works properly only for higher central frequencies, when f0 > 10 kHz.展开更多
xThis study has as its objective to collaborate with the expansion in the market of electric energy in rural areas,offering as such an innovative prospect to the solution of associated problems through use of the asym...xThis study has as its objective to collaborate with the expansion in the market of electric energy in rural areas,offering as such an innovative prospect to the solution of associated problems through use of the asymmetric three-phase induction motor,supplied by a single-phase source.In this system,capacitor switching is applied during operation,while theoretical and practical results are presented for the application of this switching in a three-phase asymmetric induction motor of 20 hp.展开更多
In order to realize accurate bilinear transformation from s- to z-domain,a novelswitched-capacitor configuration is proposed in the light of principles of dual-rate sampling and chargeconservation,which has also been ...In order to realize accurate bilinear transformation from s- to z-domain,a novelswitched-capacitor configuration is proposed in the light of principles of dual-rate sampling and chargeconservation,which has also been used for building a 5th-order elliptic lowpass filter.The filter issimulated and measured in typical 0.34 μm/3.3 V Si CMOS process models,special full differentialoperational amplifiers and CMOS transfer gate switches,which achieves 80 MHz sampling rate,17.8MHz cutoff frequency,0.052 dB maximum passband ripple,42.1 dB minimum stopband attenuation and74 mW quiescent power dissipation.At the same time,the dual-rate sampling topology breaks thetraditional restrictions of filter introduced by unit-gain bandwidth and slew rate of operational amplifiersand also improves effectively their performances in high-frequency applications.It has been applied forthe design of an anti-alias filter in analog front-end of video decoder IC with 15 MHz signal frequencyyet.展开更多
The multi-phase implementation in the QR (quasi resonant) ZCS (zero current switching) SC (switched capacitor) bidirectional DC-DC converter structure has been proposed to reduce current ripple, switching loss a...The multi-phase implementation in the QR (quasi resonant) ZCS (zero current switching) SC (switched capacitor) bidirectional DC-DC converter structure has been proposed to reduce current ripple, switching loss and significantly increase the converter efficiency and power density. This approach provides a more precise output voltage to obtain voltage conversion ratios from the double-mode versus half-mode to n-mode versus 1/n mode. This is accomplished by adding a different number of switched-capacitors and power MOSFET switches with a small series connected resonant inductor for forward and reverse schemes. The size and cost can be reduced when the proposed converter has been designed with the coupled inductors. The simulation and experimental results have been used to demonstrate the performance of the two-phase with and without coupled inductor interleaved QR ZCS SC converters for bidirectional power flow control application, and an extending structure for N-phase is mentioned.展开更多
The purpose of this paper is to show a laboratory scale implementation of a Thyristor Switched Capacitors (TSC) as an alternative for voltage regulation during a direct on line three-phase induction motor starting o...The purpose of this paper is to show a laboratory scale implementation of a Thyristor Switched Capacitors (TSC) as an alternative for voltage regulation during a direct on line three-phase induction motor starting on an emulated weak transmission line. Thyristor switched capacitor bank was chosen because it is a well known topology, considering the very nature of the direct starting induction motors, which represents a highly inductive load, the use of switched reactors becomes unnecessary. Such fact minimizes the introduction of harmonics components, and also reduces the cost of the implementation. The binary disposition of the banks allows a variable Var compensation with sixteen steps, in this case. The solution makes use of low cost devices combined with sliding window voltage and current measurement algorithm and a PI control with dead band control for achieve the shown experimental results, where the system is able to manage a typically 20% voltage drop, reducing it to less than 4%. The schematic of the developed circuit, the control technique and a quite simple method to calculate the binary weight capacitors banks are also presented.展开更多
A high-speed high-accuracy fully differenttial operational amplifier (op-amp) is realized based on no-Miller-capacitor feedforward (NMCF) compensation scheme. In order to achieve a good phase margin, the NMCF comp...A high-speed high-accuracy fully differenttial operational amplifier (op-amp) is realized based on no-Miller-capacitor feedforward (NMCF) compensation scheme. In order to achieve a good phase margin, the NMCF compensation scheme uses the positive phase shift of left-half-plane (LHP) zero caused by the feedforvvard path to counteract the negative phase shift of the non-dominant pole. Compared to traditional Miller compensation method, the op-amp obtains high gain and wide band synchronously without the pole-splitting effect while saves significant chip area due to the absence of the Miller capacitor. Simulated by the 0.35 μm CMOS RF technology, the result shows that the open-loop gain of the op-amp is 118 dB with the unity gain-bandwidth (UGBW) of 1 GHz, and the phase margin is 61°while the settling time is 5.8 ns when achieving 0.01% accuracy. The op-amp is especially suitable for the front-end sample/hold (S/H) cell and the multiplying D/A converter (MDAC) module of the high-speed high-resolution pipelined A/D converters (AVCs).展开更多
In conformity with a fifth order RLC elliptic filter circuit prototype, it is easy to conceive the corresponding RC active filter circuit. Simple and feasible method presented here can be used to contrive...In conformity with a fifth order RLC elliptic filter circuit prototype, it is easy to conceive the corresponding RC active filter circuit. Simple and feasible method presented here can be used to contrive the equivalent switched capacitor filter circuit and switched current filter circuit. Consulting the technique data manual, we can expediently design a specific RLC filter. Therefore, it is of great convenience to design the switched current filter, which has the same performances. Such a kind of technology is useful in the domain of analogue sampled data signal processing.展开更多
This paper presents a unique voltage-raising topology for a single-phase seven-level inverter with triple output voltage gain using single input source and two switched capacitors.The output voltage has been boosted u...This paper presents a unique voltage-raising topology for a single-phase seven-level inverter with triple output voltage gain using single input source and two switched capacitors.The output voltage has been boosted up to three times the value of input voltage by configuring the switched capacitors in series and parallel combinations which eliminates the use of additional step-up converters and transformers.The selective harmonic elimination(SHE)approach is used to remove the lower-order harmonics.The optimal switching angles for SHE is determined using the genetic algorithm.These switching angles are com-bined with a level-shifted pulse width modulation(PWM)technique for pulse generation,resulting in reduced total harmonic distortion(THD).A detailed com-parison has been made against other relevant seven-level inverter topologies in terms of the number of switches,drivers,diodes,capacitors,and boosting facil-ities to emphasize the benefits of the proposed model.The proposed topology is simulated using MATLAB/SIMULINK and an experimental prototype has been developed to validate the results.The Digital Signal Processing(DSP)TMS320F2812 board is used to generate the switching pulses for the proposed technique and the experimental results concur with the simulated model outputs.展开更多
Renewable energy with sources such as photovoltaic(PV)or fuel cells can be utilized for the generation of elec-trical power.But these sources generate fewer voltage values and therefore require high gain converters to...Renewable energy with sources such as photovoltaic(PV)or fuel cells can be utilized for the generation of elec-trical power.But these sources generate fewer voltage values and therefore require high gain converters to match with DC bus voltage in microgrids.These high gain converters can be implemented with switched capacitors to meet the required DC bus voltage.Switched capacitors operate in a series and parallel combination during switch-ing operation and produce high static gain,limits reverse voltage that appears across the components.A novel converter is proposed that satisfies all the features such as high voltage gain,only one switch,forces less potential stress cross the components,ripple current is less.These features of the proposed converter are verified through MATLAB/SIMULINK.展开更多
Two novel switched-capacitor(SC)bandpass filters using a single operational am-plifier(op amp)are presented.Optimal designs for minimizing capacitor spread are also given.Gain-bandwidth product(GB)effects of op amps o...Two novel switched-capacitor(SC)bandpass filters using a single operational am-plifier(op amp)are presented.Optimal designs for minimizing capacitor spread are also given.Gain-bandwidth product(GB)effects of op amps on the proposed SC circuits are taken intoconsideration.Comparisons with the proposed circuits and the circuits given by the literatureshow that the new circuits require less chip area in monolithic integration and are less sensitiveto the GB effects.展开更多
In this paper, a practical method to establish Doubly Fed Induction Generator (DFIG) based wind farm equivalent model for switching transient analysis is demonstrated. In order to verify this method, a 3.6MW equivalen...In this paper, a practical method to establish Doubly Fed Induction Generator (DFIG) based wind farm equivalent model for switching transient analysis is demonstrated. In order to verify this method, a 3.6MW equivalent wind farm model is built. The steady state results and load switching results are verified with those of detailed models of four 0.9MW generators. Using this method, a model of 40MW wind farm, representing the capacity for a proposed South Carolina offshore wind farm is established. To study large wind farm switching transient impacts on a system, different switching operations such as cable energizing and three phase faults at different locations in wind farm are investigated and their impact on system are analysed. Finally, conclusions based on the switching cases are presented.展开更多
基金Supported by the Knowledge Innovation Program of the Chinese Academy of Sciences (KJCX2-YW-N27)the National Natural Science Foundation of China (No. 11175176)
文摘Compared with traditional waveform digitization with flash-ADCs, waveform digitization with switched-capacitor arrays (SCAs) is able to achieve the sampling speed above 1 GS/s without degrading the analog to digital conversion precision significantly. In this paper, we present the implementation of a fast waveform digitization system with the use of SCAs, and evaluate its performance of waveform digitization and the waveform timing. At about 5 GS/s, the dynamic input range of the digitizer is about 66 dB, and its timing precision is about 20 ps (RMS).
文摘This paper presents a novel method that is applied to realize the Linear Transformation(LT)Switched-Capacitor Filter(SCF).It adopts the Voltage Control Voltage Source(VCVS)equalized transfor-mation to revise the original LC ladder filter and induce it into 16 basic sections and then extend the princi-ple of the LT in order to fit active and 3 port networks and give out switched-capacitor circuits corre-sponding to the 16 basic sections,which can realize all four kinds of filters——LP,HP,BP,BS filters.De-signed examples are given here.An Nth order filter only requires N amplifiers and the circuit is insensitive toparasitic capacitances.The experimental results of a 3rd order elliptic LP and a 6th order elliptic BP are giv-en and agree with the theory.
基金Sponsored by the Fundamental Research Funds for the Central Universities(Grant No.HIT.NSRIF.2013040)
文摘In this paper the design and implementation of sixth-order lowpass elliptic switched-capacitor filter( SCF) for interface circuit of Micro-Electro-Mechanical System( MEMS) sensor are presented. This work aims to lower total harmonic distortion( THD) without deteriorating other performances. After system design in Simulink,the filter is realized in transistor level and finally fabricated in Central Semiconductor Manufacturing Corporation( CSMC) 0.5 μm metal-oxide-semiconductor( CMOS) technology. Typical measured results are: it operates with 25: 1 clock-to-corner frequency ratio and a 10 k Hz maximum corner frequency. The maximum passband ripple is about 0.49 d B and the minimum stopband rejection is 40 d B for the temperature from-20 ℃to 80 ℃. For the 250 k Hz clock frequency setting,given the 1 k Hz,- 8 d BVrms input signal,the measured worst case THD is-64 d B. The active area of the chip is 2.8 mm2 with 8 pads. The analog power dissipation is10 m W from a 5 V power supply.
文摘To miniaturize a very low level dc current amplifier and to improve its output response speed, the switched capacitor negative feedback circuit (SCNF), instead of the conventionally used high-ohmage resistor, is presented in this paper. In our system, a switched capacitor filter (SCF) and an offset controller are also used to decrease vibrations and offset voltage at the output of the amplifier using SCNF. The theoretical output voltage of the very low level dc current amplifier using SCNF is obtained. The experimental results show that the unnecessary components of the amplifier’s output are much decreased, and that the response speed of the amplifier with both the SCNF and SCF is faster than that using high-ohmage resistor.
文摘This paper proposes third order tunable bandwidth active Switched-Capacitor filter. The circuit consists of only op-amps and switched capacitors. The circuit is designed for circuit merit factor Q = 10. The proposed circuit implements three filter functions low pass, band pass and high pass simultaneously in single circuit. The filter circuit can be used for both narrow as well as for wide bandwidth. For various values of cut-off frequencies the behaviour of circuit is studied. The circuit works properly only for higher central frequencies, when f0 > 10 kHz.
文摘xThis study has as its objective to collaborate with the expansion in the market of electric energy in rural areas,offering as such an innovative prospect to the solution of associated problems through use of the asymmetric three-phase induction motor,supplied by a single-phase source.In this system,capacitor switching is applied during operation,while theoretical and practical results are presented for the application of this switching in a three-phase asymmetric induction motor of 20 hp.
基金Supported by the National Nature Science Foundation(No. 60072004)and the University Postgraduate Station Foundation of China(No.2000061402)
文摘In order to realize accurate bilinear transformation from s- to z-domain,a novelswitched-capacitor configuration is proposed in the light of principles of dual-rate sampling and chargeconservation,which has also been used for building a 5th-order elliptic lowpass filter.The filter issimulated and measured in typical 0.34 μm/3.3 V Si CMOS process models,special full differentialoperational amplifiers and CMOS transfer gate switches,which achieves 80 MHz sampling rate,17.8MHz cutoff frequency,0.052 dB maximum passband ripple,42.1 dB minimum stopband attenuation and74 mW quiescent power dissipation.At the same time,the dual-rate sampling topology breaks thetraditional restrictions of filter introduced by unit-gain bandwidth and slew rate of operational amplifiersand also improves effectively their performances in high-frequency applications.It has been applied forthe design of an anti-alias filter in analog front-end of video decoder IC with 15 MHz signal frequencyyet.
文摘The multi-phase implementation in the QR (quasi resonant) ZCS (zero current switching) SC (switched capacitor) bidirectional DC-DC converter structure has been proposed to reduce current ripple, switching loss and significantly increase the converter efficiency and power density. This approach provides a more precise output voltage to obtain voltage conversion ratios from the double-mode versus half-mode to n-mode versus 1/n mode. This is accomplished by adding a different number of switched-capacitors and power MOSFET switches with a small series connected resonant inductor for forward and reverse schemes. The size and cost can be reduced when the proposed converter has been designed with the coupled inductors. The simulation and experimental results have been used to demonstrate the performance of the two-phase with and without coupled inductor interleaved QR ZCS SC converters for bidirectional power flow control application, and an extending structure for N-phase is mentioned.
文摘The purpose of this paper is to show a laboratory scale implementation of a Thyristor Switched Capacitors (TSC) as an alternative for voltage regulation during a direct on line three-phase induction motor starting on an emulated weak transmission line. Thyristor switched capacitor bank was chosen because it is a well known topology, considering the very nature of the direct starting induction motors, which represents a highly inductive load, the use of switched reactors becomes unnecessary. Such fact minimizes the introduction of harmonics components, and also reduces the cost of the implementation. The binary disposition of the banks allows a variable Var compensation with sixteen steps, in this case. The solution makes use of low cost devices combined with sliding window voltage and current measurement algorithm and a PI control with dead band control for achieve the shown experimental results, where the system is able to manage a typically 20% voltage drop, reducing it to less than 4%. The schematic of the developed circuit, the control technique and a quite simple method to calculate the binary weight capacitors banks are also presented.
文摘A high-speed high-accuracy fully differenttial operational amplifier (op-amp) is realized based on no-Miller-capacitor feedforward (NMCF) compensation scheme. In order to achieve a good phase margin, the NMCF compensation scheme uses the positive phase shift of left-half-plane (LHP) zero caused by the feedforvvard path to counteract the negative phase shift of the non-dominant pole. Compared to traditional Miller compensation method, the op-amp obtains high gain and wide band synchronously without the pole-splitting effect while saves significant chip area due to the absence of the Miller capacitor. Simulated by the 0.35 μm CMOS RF technology, the result shows that the open-loop gain of the op-amp is 118 dB with the unity gain-bandwidth (UGBW) of 1 GHz, and the phase margin is 61°while the settling time is 5.8 ns when achieving 0.01% accuracy. The op-amp is especially suitable for the front-end sample/hold (S/H) cell and the multiplying D/A converter (MDAC) module of the high-speed high-resolution pipelined A/D converters (AVCs).
文摘In conformity with a fifth order RLC elliptic filter circuit prototype, it is easy to conceive the corresponding RC active filter circuit. Simple and feasible method presented here can be used to contrive the equivalent switched capacitor filter circuit and switched current filter circuit. Consulting the technique data manual, we can expediently design a specific RLC filter. Therefore, it is of great convenience to design the switched current filter, which has the same performances. Such a kind of technology is useful in the domain of analogue sampled data signal processing.
文摘This paper presents a unique voltage-raising topology for a single-phase seven-level inverter with triple output voltage gain using single input source and two switched capacitors.The output voltage has been boosted up to three times the value of input voltage by configuring the switched capacitors in series and parallel combinations which eliminates the use of additional step-up converters and transformers.The selective harmonic elimination(SHE)approach is used to remove the lower-order harmonics.The optimal switching angles for SHE is determined using the genetic algorithm.These switching angles are com-bined with a level-shifted pulse width modulation(PWM)technique for pulse generation,resulting in reduced total harmonic distortion(THD).A detailed com-parison has been made against other relevant seven-level inverter topologies in terms of the number of switches,drivers,diodes,capacitors,and boosting facil-ities to emphasize the benefits of the proposed model.The proposed topology is simulated using MATLAB/SIMULINK and an experimental prototype has been developed to validate the results.The Digital Signal Processing(DSP)TMS320F2812 board is used to generate the switching pulses for the proposed technique and the experimental results concur with the simulated model outputs.
文摘Renewable energy with sources such as photovoltaic(PV)or fuel cells can be utilized for the generation of elec-trical power.But these sources generate fewer voltage values and therefore require high gain converters to match with DC bus voltage in microgrids.These high gain converters can be implemented with switched capacitors to meet the required DC bus voltage.Switched capacitors operate in a series and parallel combination during switch-ing operation and produce high static gain,limits reverse voltage that appears across the components.A novel converter is proposed that satisfies all the features such as high voltage gain,only one switch,forces less potential stress cross the components,ripple current is less.These features of the proposed converter are verified through MATLAB/SIMULINK.
文摘Two novel switched-capacitor(SC)bandpass filters using a single operational am-plifier(op amp)are presented.Optimal designs for minimizing capacitor spread are also given.Gain-bandwidth product(GB)effects of op amps on the proposed SC circuits are taken intoconsideration.Comparisons with the proposed circuits and the circuits given by the literatureshow that the new circuits require less chip area in monolithic integration and are less sensitiveto the GB effects.
文摘In this paper, a practical method to establish Doubly Fed Induction Generator (DFIG) based wind farm equivalent model for switching transient analysis is demonstrated. In order to verify this method, a 3.6MW equivalent wind farm model is built. The steady state results and load switching results are verified with those of detailed models of four 0.9MW generators. Using this method, a model of 40MW wind farm, representing the capacity for a proposed South Carolina offshore wind farm is established. To study large wind farm switching transient impacts on a system, different switching operations such as cable energizing and three phase faults at different locations in wind farm are investigated and their impact on system are analysed. Finally, conclusions based on the switching cases are presented.