A novel low-swing interface circuit for high-speed on-chip asynchronous interconnection is proposed in this paper. It takes a differential level-triggered latch to recover digital signal with ultra low-swing voltage l...A novel low-swing interface circuit for high-speed on-chip asynchronous interconnection is proposed in this paper. It takes a differential level-triggered latch to recover digital signal with ultra low-swing voltage less than 50 mV, and the driver part of the interface circuit is optimized for low power using the driver-array method, With a capacity to work up to 500 MHz, the proposed circuit, which is simulated and fabricated using SMIC 0.18-pm 1.8-V digital CMOS technology, consumes less power than previously reported designs.展开更多
Available Bit Rate (ABR) service has been developed to support data applications to asynchronous transfer mode (ATM) networks.Since a ratebased feedback flow control mechanism has been selected as a standard by ATM Fo...Available Bit Rate (ABR) service has been developed to support data applications to asynchronous transfer mode (ATM) networks.Since a ratebased feedback flow control mechanism has been selected as a standard by ATM Forum,buffering becomes an issue that needs intensive study.In this paper,the queuing performance in a switch is studied in detail.It is theoretically proven that the goals of no cell loss and full utilization of link capacity can be achieved by choosing an appropriate buffersize and threshold of the switch buffer which is supported by our simulation results of a complex network.展开更多
分析了AFDX(avionics full duplex switched Ethernet)高速数据采集记录系统的需求,设计了系统的执行流程,确定了系统的模块组成,介绍了各模块的实现方案。利用多线程、循环缓冲区等技术,实现AFDX总线高速长时间无故障数据采集。该数据...分析了AFDX(avionics full duplex switched Ethernet)高速数据采集记录系统的需求,设计了系统的执行流程,确定了系统的模块组成,介绍了各模块的实现方案。利用多线程、循环缓冲区等技术,实现AFDX总线高速长时间无故障数据采集。该数据采集记录系统采用MFC实现,并利用了TeeChart控件。展开更多
基金the 973 Program of China (Grant No.G1999032903)the National Science Fund for Distinguished Young Scholars (Grant No.60025101)the Major Program of National Natural Science Foundation of China (Grant No.90707002)
文摘A novel low-swing interface circuit for high-speed on-chip asynchronous interconnection is proposed in this paper. It takes a differential level-triggered latch to recover digital signal with ultra low-swing voltage less than 50 mV, and the driver part of the interface circuit is optimized for low power using the driver-array method, With a capacity to work up to 500 MHz, the proposed circuit, which is simulated and fabricated using SMIC 0.18-pm 1.8-V digital CMOS technology, consumes less power than previously reported designs.
文摘Available Bit Rate (ABR) service has been developed to support data applications to asynchronous transfer mode (ATM) networks.Since a ratebased feedback flow control mechanism has been selected as a standard by ATM Forum,buffering becomes an issue that needs intensive study.In this paper,the queuing performance in a switch is studied in detail.It is theoretically proven that the goals of no cell loss and full utilization of link capacity can be achieved by choosing an appropriate buffersize and threshold of the switch buffer which is supported by our simulation results of a complex network.
文摘分析了AFDX(avionics full duplex switched Ethernet)高速数据采集记录系统的需求,设计了系统的执行流程,确定了系统的模块组成,介绍了各模块的实现方案。利用多线程、循环缓冲区等技术,实现AFDX总线高速长时间无故障数据采集。该数据采集记录系统采用MFC实现,并利用了TeeChart控件。