Through-silicon-via (TSV) to TSV crosstalk noise is one of the key factors affecting the signal integrity of three- dimensional integrated circuits (3D ICs). Based on the frequency dependent equivalent electrical ...Through-silicon-via (TSV) to TSV crosstalk noise is one of the key factors affecting the signal integrity of three- dimensional integrated circuits (3D ICs). Based on the frequency dependent equivalent electrical parameters for the TSV channel, an analytical crosstalk noise model is established to capture the TSV induced crosstalk noise. The impact of various design parameters including insulation dielectric, via pitch, via height, silicon conductivity, and terminal impedance on the crosstalk noise is analyzed with the proposed model. Two approaches are proposed to alleviate the TSV noise, namely, driver sizing and via shielding, and the SPICE results show 241 rnV and 379 mV reductions in the peak noise voltage, respectively.展开更多
A two-dimensional thermal-stress model of through-silicon via(TSV) is proposed considering the anisotropic elastic property of the silicon substrate. By using the complex variable approach, the distribution of therm...A two-dimensional thermal-stress model of through-silicon via(TSV) is proposed considering the anisotropic elastic property of the silicon substrate. By using the complex variable approach, the distribution of thermalstress in the substrate can be characterized more accurately. TCAD 3-D simulations are used to verify the model accuracy and well agree with analytical results(< ±5%). The proposed thermal-stress model can be integrated into stress-driven design flow for 3-D IC, leading to the more accurate timing analysis considering the thermal-stress effect.展开更多
Two innovative de-embedding methods are proposed for extracting an electrical model for a through- silicon-via (TSV) pair consisting of a ground-signal (GS) structure. In addition, based on microwave network theor...Two innovative de-embedding methods are proposed for extracting an electrical model for a through- silicon-via (TSV) pair consisting of a ground-signal (GS) structure. In addition, based on microwave network theory, a new solution scheme is developed for dealing with multiple solutions of the transfer matrix during the process of de-embedding. A unique solution is determined based on the amplitude and the phase characteristic of S parameters. In the first de-embedding method, a typical "π" type model of the TSV pair is developed, which illustrates the need to allow for frequency dependence in the equivalent TSV pair Spice model. This de-embedding method is shown to be effective for extracting the electrical properties of the TSVs. The feasibility of a second de-embedding method is also investigated.展开更多
A novel low-cost and high-speed via filling method using Cu-cored solder balls was investigated for through-silicon via manufacture.Cu-cored solder balls with a total diameter of 100μm were used to fill 150μm deep,...A novel low-cost and high-speed via filling method using Cu-cored solder balls was investigated for through-silicon via manufacture.Cu-cored solder balls with a total diameter of 100μm were used to fill 150μm deep,110μm wide vias in silicon.The wafer-level filling process can be completed in a few seconds,which is much faster than using the traditional electroplating process.Thermo-mechanical analysis of via filling using solder,Cu and Cu-cored solder was carried out to assess the thermo-mechanical properties of the different filling materials.It was found that the vias filled with Cu-cored solder exhibit less thermal-mechanical stresses than solder-filled vias, but more than Cu-filled vias.展开更多
In this paper, a new type of through-silicon via(TSV) for via-first process namely bare TSV, is proposed and analyzed with the aim of mitigating noise coupling problems in 3D integrated systems for advanced technolo...In this paper, a new type of through-silicon via(TSV) for via-first process namely bare TSV, is proposed and analyzed with the aim of mitigating noise coupling problems in 3D integrated systems for advanced technology nodes. The bare TSVs have no insulation layers, and are divided into two types: bare signal TSVs and bare ground TSVs. First, by solving Poisson's equation for cylindrical P–N junctions, the bare signal TSVs are shown to be equivalent to conventional signal TSVs according to the simulation results. Then the bare ground TSV is proved to have improved noise-absorption capability when compared with a conventional ground TSV. Also, the proposed bare TSVs offer more advantages to circuits than other noise isolation methods, because the original circuit design,routing and placement can be retained after the application of the bare TSVs.展开更多
Polymer insulating through-silicon-vias(TSVs)is an attractive approach for high-performance 3D integration systems.To further demonstrate the polymer insulating TSVs,this paper investigates the thermal stability by me...Polymer insulating through-silicon-vias(TSVs)is an attractive approach for high-performance 3D integration systems.To further demonstrate the polymer insulating TSVs,this paper investigates the thermal stability by measuring the leakage current under bias-temperature condition,studies the thermal stress characteristics with Finite Element Analysis(FEA),and tries to improve the thermal mechanical reliability of high-density TSVs array by optimizing the geometry parameters of pitch,liner and redistribution layer(RDL).The electrical measurements show the polymer insulating TSVs can maintain good insulation capability(less than 2 10 11A)under challenging bias-temperature conditions of 20 V and 200 C,despite the leakage degradation observation.The FEA results show that the thermal stress is significantly reduced at the sidewall,but highly concentrates at the surface,which is the potential location of mechanical failure.And,the analysis results indicate that the polymer insulating TSVs(diameter of 10 m,depth of 50 m)array with a pitch of 20 m,liner thickness of 1 m and RDL radius of 9m has an optimized thermal-mechanical reliability for application.展开更多
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61131001,61322405,61204044,61376039,and 61334003)
文摘Through-silicon-via (TSV) to TSV crosstalk noise is one of the key factors affecting the signal integrity of three- dimensional integrated circuits (3D ICs). Based on the frequency dependent equivalent electrical parameters for the TSV channel, an analytical crosstalk noise model is established to capture the TSV induced crosstalk noise. The impact of various design parameters including insulation dielectric, via pitch, via height, silicon conductivity, and terminal impedance on the crosstalk noise is analyzed with the proposed model. Two approaches are proposed to alleviate the TSV noise, namely, driver sizing and via shielding, and the SPICE results show 241 rnV and 379 mV reductions in the peak noise voltage, respectively.
基金supported by the Aerospace Advanced Manufacturing Technology Research Joint Fund(No.U1537208)
文摘A two-dimensional thermal-stress model of through-silicon via(TSV) is proposed considering the anisotropic elastic property of the silicon substrate. By using the complex variable approach, the distribution of thermalstress in the substrate can be characterized more accurately. TCAD 3-D simulations are used to verify the model accuracy and well agree with analytical results(< ±5%). The proposed thermal-stress model can be integrated into stress-driven design flow for 3-D IC, leading to the more accurate timing analysis considering the thermal-stress effect.
基金Project supported by the Opening Project of Key Laboratory of Microelectronics Devices & Integrated Technology,Institute of Microelectronics, Chinese Academy of Sciencessupport by 100 Talents Program(No.Y0YB049001) of Chinese Academy of Sciences
文摘Two innovative de-embedding methods are proposed for extracting an electrical model for a through- silicon-via (TSV) pair consisting of a ground-signal (GS) structure. In addition, based on microwave network theory, a new solution scheme is developed for dealing with multiple solutions of the transfer matrix during the process of de-embedding. A unique solution is determined based on the amplitude and the phase characteristic of S parameters. In the first de-embedding method, a typical "π" type model of the TSV pair is developed, which illustrates the need to allow for frequency dependence in the equivalent TSV pair Spice model. This de-embedding method is shown to be effective for extracting the electrical properties of the TSVs. The feasibility of a second de-embedding method is also investigated.
基金Project supported by the National S & T Major Projects(Nos.2009ZX02038,2011ZX02709)the 100 Talents Programme of the Chinese Academy of Sciences
文摘A novel low-cost and high-speed via filling method using Cu-cored solder balls was investigated for through-silicon via manufacture.Cu-cored solder balls with a total diameter of 100μm were used to fill 150μm deep,110μm wide vias in silicon.The wafer-level filling process can be completed in a few seconds,which is much faster than using the traditional electroplating process.Thermo-mechanical analysis of via filling using solder,Cu and Cu-cored solder was carried out to assess the thermo-mechanical properties of the different filling materials.It was found that the vias filled with Cu-cored solder exhibit less thermal-mechanical stresses than solder-filled vias, but more than Cu-filled vias.
基金Project supported by the National Basic Research Program of China (No. 2015CB0572)the Importation and Development of HighCaliber Talents Project of Beijing Municipal Institutions (No. CIT&TCD20150320)the National Natural Science Foundation of China (No. 61176102)
文摘In this paper, a new type of through-silicon via(TSV) for via-first process namely bare TSV, is proposed and analyzed with the aim of mitigating noise coupling problems in 3D integrated systems for advanced technology nodes. The bare TSVs have no insulation layers, and are divided into two types: bare signal TSVs and bare ground TSVs. First, by solving Poisson's equation for cylindrical P–N junctions, the bare signal TSVs are shown to be equivalent to conventional signal TSVs according to the simulation results. Then the bare ground TSV is proved to have improved noise-absorption capability when compared with a conventional ground TSV. Also, the proposed bare TSVs offer more advantages to circuits than other noise isolation methods, because the original circuit design,routing and placement can be retained after the application of the bare TSVs.
文摘Polymer insulating through-silicon-vias(TSVs)is an attractive approach for high-performance 3D integration systems.To further demonstrate the polymer insulating TSVs,this paper investigates the thermal stability by measuring the leakage current under bias-temperature condition,studies the thermal stress characteristics with Finite Element Analysis(FEA),and tries to improve the thermal mechanical reliability of high-density TSVs array by optimizing the geometry parameters of pitch,liner and redistribution layer(RDL).The electrical measurements show the polymer insulating TSVs can maintain good insulation capability(less than 2 10 11A)under challenging bias-temperature conditions of 20 V and 200 C,despite the leakage degradation observation.The FEA results show that the thermal stress is significantly reduced at the sidewall,but highly concentrates at the surface,which is the potential location of mechanical failure.And,the analysis results indicate that the polymer insulating TSVs(diameter of 10 m,depth of 50 m)array with a pitch of 20 m,liner thickness of 1 m and RDL radius of 9m has an optimized thermal-mechanical reliability for application.